CN104793699A - Development board card - Google Patents
Development board card Download PDFInfo
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- CN104793699A CN104793699A CN201510001795.2A CN201510001795A CN104793699A CN 104793699 A CN104793699 A CN 104793699A CN 201510001795 A CN201510001795 A CN 201510001795A CN 104793699 A CN104793699 A CN 104793699A
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Abstract
The invention provides a development board card. The development board card comprises a main chip and an EMCP chip. The EMCP chip is used for storing system running codes. The main chip is used for serving as a central processing unit. The development board card further comprises a communication interface, a debugging interface, a debugging test point, a reserved test point, a power button, a burning button and a restart button, wherein the communication interface is connected with the main chip and used for achieving serial port communication between the outside and the main chip; the debugging interface is connected with the main chip and used for running a code program step by step; the debugging test point is connected with the main chip and used for debugging the functions of the development board card; the reserved test point is connected with the main chip and serves as a reserved interface; the power button, the burning button and the restart button are connected with the main chip and control operation of the main chip. The development board card only comprises a minimum unit for system running, and other interfaces are all reserved as test points; the corresponding test point can be connected when any interface needs to be used; the test points can be dismantled when not in use, and the flexibility of a development board is realized to a great extent.
Description
Technical field
The present invention relates to technical field of electronic products, particularly relate to a kind of development board board.
Background technology
Along with the fast development of electronics technology, electronic product dog-eat-dog, each chip manufacturer is in order to better release the product of oneself, make a lot of development board, each chip product manufacturer is facilitated to use, so not only substantially reduce R&D cycle and the cost of product, also the more effective performance that make use of chip itself.
There is the system development plate board kind of electronic product day by day various at present, such as, have the system development plate board of the development board board of the development board board of mobile phone, the development board board of panel computer and intelligent watch etc. various intelligent artifact.And in recent years, each chip manufacturer, in order to services client better, has also carried out the business of degree of depth customized development plate board.
Realizing in process of the present invention, inventor finds at least there is following shortcoming in prior art: although the development board board specific aim of customization is very strong, be very beneficial for the follow-up design of product and research and development, but simultaneously, also limit follow-up expansion, if the market demand changes, the practicality of development board board will reduce greatly.
Summary of the invention
The invention provides a kind of development board board, the defect that during in order to solve that in prior art, the market demand changes, the practicality of development board board reduces, strengthens the practicality of development board board.
The invention provides a kind of system development plate board, comprise master chip and EMCP chip, described EMCP chip is used for the code that storage system is run; Described master chip is for serving as the function of central processing unit;
Described development board board also comprises communication interface, debugging interface, debugging test point, reserved test point, key, burning key and restarts key;
Wherein said communication interface is connected with described master chip, for realizing serial communication that is outside and described master chip; Described debugging interface is also connected with described master chip, for substep operation code program; Described debugging test point is also connected with described master chip, and for debugging the function of described development board board, described reserved test point is also connected with described master chip, as spare interface; Described key, described burning key are restarted key be also connected with described master chip respectively with described, control described master chip work.
Alternatively, in development board board as above, described EMCP chip comprises the DDR storer and flash storage with temporary storaging data.
Alternatively, in development board board as above, described communication interface comprises RS232-M male and/or RS232-FM female; Described RS232-M male and described RS232-FM female are connected on described master chip respectively by socket DB9 signaling interface, realize serial communication that is outside and described master chip.
Alternatively, in development board board as above, described communication interface also comprises USB (universal serial bus), and described USB (universal serial bus) is connected with described master chip.
Alternatively, in development board board as above, when described key and described burning key are pressed simultaneously time, described master chip is downloaded to described EMCP chip by described USB (universal serial bus).
Alternatively, in development board board as above, when described restart key be pressed time, described master chip reruns system program.
Alternatively, in development board board as above, described development board board also comprises power supply chip, and described power supply chip is connected with described master chip and described EMCP chip respectively, for providing power supply for described master chip and described EMCP chip.
Development board board provided by the invention, by adopting said structure, only comprises the minimum unit of system cloud gray model, other interfaces all adopt measuring point formula to reserve, and want to use which interface, only need to connect measuring point, the used time can not remove, the dirigibility achieving development board of high degree.And, adopt development board board of the present invention, be very beneficial for the follow-up design of product and research and development, there is stronger practicality.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
The structural representation of the development board board that Fig. 1 provides for one embodiment of the invention.
The structural representation of the development board board that Fig. 2 provides for another embodiment of the present invention.
Embodiment
For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
The structural representation of the development board board that Fig. 1 provides for one embodiment of the invention.As shown in Figure 1, the development board board of the present embodiment comprises the code that master chip 1 and EMCP chip 2, EMCP chip 2 run for storage system; Master chip 1 is for serving as the function of central processing unit.Development board board also comprises communication interface 3, debugging interface 4, debugging test point 5, reserved test point 6, key 7, burning key 8 and restarts key 9.Debugging test point 5 and reserved test point 6 can adopt I/O (Input/Output; Being called for short I/O) form of interface exists, and such as debug test point 5 and can comprise 20 I/O interfaces, such as these interfaces respectively can as internal integrated circuit (Inter-Integrated Circuit; Be called for short I2C), universal asynchronous receiving-transmitting transmitter (Universal Asynchronous Receiver andTransmitter; UART), Serial Peripheral Interface (SPI) (Serial Peripheral Interface; SPI), mobile Industry Processor Interface (Mobile Industry Processor Interface; Etc. MIPI) functional interface uses.In like manner, reserved test point 6 also can comprise as above these I/O interfaces.
In the development board board of the present embodiment, communication interface 3 is connected with master chip 1, and communication interface 3 is connected with external unit, for realizing serial communication that is outside and master chip 1; Debugging interface 4 is also connected with master chip 1, for substep operation code program; Such as, communication interface 3 is connected to computer by card extender, and computer runs corresponding software, can substep operation code program.
Debugging test point 5 is also connected with master chip 1, for debugging the function of development board board.Such as: the clock that control master chip 1 exports 32MHz is supplied to certain external unit, due to the detection easy to use of external unit, uses this debugging test point 5 to export simultaneously, as long as detect the detection that debugging test point 5 can realize the function to development board board.
Reserved test point 6 is also connected with master chip 1, and reserved test point 6 is as spare interface.In actual use, when the development board board of the present embodiment can not satisfy the demands, when wanting to further expand the function of development board board, reserved test point 6 can be used to realize the New function of development board board, very easy to use.
Key 7, burning key 8 with restart key 9 and be also connected with master chip 1 respectively, control master chip 1 and work.Such as, key 7 controls to open this and opens clamp board, and when key 7 is pressed, master chip 1 is started working.When burning key 8 is pressed, can by communication interface 3 to master chip 1 written information.Restart key 9 when being pressed, no matter development board board is in any state, and this development board board all restarts.
The development board board of the present embodiment, by adopting said structure, only comprises the minimum unit of system cloud gray model, other interfaces all adopt measuring point formula to reserve, and want to use which interface, only need to connect measuring point, the used time can not remove, the dirigibility achieving development board of high degree.And, adopt the development board board of the present embodiment, be very beneficial for the follow-up design of product and research and development, there is stronger practicality.
The structural representation of the development board board that Fig. 2 provides for another embodiment of the present invention.The development board board of the present embodiment, on the basis of above-mentioned technical scheme embodiment illustrated in fig. 1, comprises following technical scheme further.
First, in the development board board of the present embodiment, EMCP chip comprises Double Data Rate synchronous DRAM (the Double Data Rate Synchronous DynamicRandom Access Memory with temporary storaging data; Be called for short DDR SDRAM; Custom is called DDR storer) and FlashMemory (abbreviation flash memory; Also flash storage is referred to as).
In the development board board of the present embodiment, communication interface 3 comprises RS232-M male 31 and/or RS232-FM female 32; RS232-M male 31 and RS232-FM female 32 are connected on master chip 1 by socket DB9 signaling interface, realize serial communication that is outside and master chip 1.As shown in Figure 2, in the present embodiment, comprise RS232-M male 31 and RS232-FM female 32 so that technical scheme of the present invention to be described for communication interface 3, in practical application, communication interface 3 also only can comprise one in RS232-M male 31 and RS232-FM female 32.
In the development board board of the present embodiment, communication interface 3 also comprises USB (universal serial bus) (UniversalSerial Bus; USB) interface 33, USB interface 33 is connected with master chip 1.Such as when key 7 and burning key 8 are pressed simultaneously time, master chip 1 is downloaded by USB interface 33, and deposits to EMCP chip 2, the code of system cloud gray model during these programs of download.
Further, when restarting key 9 and being pressed, no matter be in what state, master chip 1 reruns system program.
The development board board of above-described embodiment can external power supply, is that master chip 1 is powered, whole development board board is normally worked by external power supply.As shown in Figure 2, actual to use, the development board board of the present embodiment can also comprise power supply chip 10, and power supply chip 10 can be connected with master chip 1 with EMCP chip 2 respectively, for for comprising master chip 1 and providing power supply with the mainboard of EMCP chip 2.Such as this power supply chip 10 is for connecting, for powering for all IC on this Development Office's board for all IC on development board board.
The development board board of the present embodiment, by adopting said structure, only comprises the minimum unit of system cloud gray model, other interfaces all adopt measuring point formula to reserve, and want to use which interface, only need to connect measuring point, the used time can not remove, the dirigibility achieving development board of high degree.And, adopt the development board board of the present embodiment, be very beneficial for the follow-up design of product and research and development, there is stronger practicality.
Last it is noted that above embodiment is only in order to illustrate technical scheme of the present invention, be not intended to limit; Although with reference to previous embodiment to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein portion of techniques feature; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (7)
1. a development board board, is characterized in that, comprises master chip and EMCP chip, and described EMCP chip is used for the code that storage system is run; Described master chip is for serving as the function of central processing unit;
Described development board board also comprises communication interface, debugging interface, debugging test point, reserved test point, key, burning key and restarts key;
Wherein said communication interface is connected with described master chip, for realizing serial communication that is outside and described master chip; Described debugging interface is also connected with described master chip, for substep operation code program; Described debugging test point is also connected with described master chip, and for debugging the function of described development board board, described reserved test point is also connected with described master chip, as spare interface; Described key, described burning key are restarted key be also connected with described master chip respectively with described, control described master chip work.
2. development board board according to claim 1, is characterized in that, described EMCP chip comprises the DDR storer and flash storage with temporary storaging data.
3. development board board according to claim 1, is characterized in that, described communication interface comprises RS232-M male and/or RS232-FM female; Described RS232-M male and described RS232-FM female are connected on described master chip respectively by socket DB9 signaling interface, realize serial communication that is outside and described master chip.
4. development board board according to claim 3, is characterized in that, described communication interface also comprises USB (universal serial bus), and described USB (universal serial bus) is connected with described master chip.
5. development board board according to claim 4, is characterized in that, when described key and described burning key are pressed simultaneously time, described master chip is downloaded to described EMCP chip by described USB (universal serial bus).
6. development board board according to claim 1, is characterized in that, when described restart key be pressed time, described master chip reruns system program.
7. according to the arbitrary described development board board of claim 1-6, it is characterized in that, described development board board also comprises power supply chip, and described power supply chip is connected with described master chip and described EMCP chip respectively, for providing power supply for described master chip and described EMCP chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510001795.2A CN104793699A (en) | 2015-01-04 | 2015-01-04 | Development board card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510001795.2A CN104793699A (en) | 2015-01-04 | 2015-01-04 | Development board card |
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| CN104793699A true CN104793699A (en) | 2015-07-22 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201510001795.2A Pending CN104793699A (en) | 2015-01-04 | 2015-01-04 | Development board card |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106385268A (en) * | 2016-08-31 | 2017-02-08 | 新智数字科技有限公司 | Development board and integrated circuit card |
| CN109656583A (en) * | 2018-12-28 | 2019-04-19 | 北京深思数盾科技股份有限公司 | Method for burning chip, host computer and chip burn-recording system |
| CN110988661A (en) * | 2019-12-09 | 2020-04-10 | 思尔芯(上海)信息科技有限公司 | FPGA prototype verification development board time division analysis system, method, medium and terminal |
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| CN101059790A (en) * | 2006-04-19 | 2007-10-24 | 环达电脑(上海)有限公司 | System and method for processing BIOS file burning based on main board communication interface |
| CN101330399A (en) * | 2007-06-19 | 2008-12-24 | 上海风格信息技术有限公司 | Method for upgrading built-in equipment |
| CN201293935Y (en) * | 2008-11-24 | 2009-08-19 | 西安科技大学 | Embedded digital signal processing module |
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2015
- 2015-01-04 CN CN201510001795.2A patent/CN104793699A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US20030177345A1 (en) * | 2002-03-13 | 2003-09-18 | Insyde Software Corp. | Method for updating a BIOS in a notebook computer |
| CN101059790A (en) * | 2006-04-19 | 2007-10-24 | 环达电脑(上海)有限公司 | System and method for processing BIOS file burning based on main board communication interface |
| CN101330399A (en) * | 2007-06-19 | 2008-12-24 | 上海风格信息技术有限公司 | Method for upgrading built-in equipment |
| CN201293935Y (en) * | 2008-11-24 | 2009-08-19 | 西安科技大学 | Embedded digital signal processing module |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106385268A (en) * | 2016-08-31 | 2017-02-08 | 新智数字科技有限公司 | Development board and integrated circuit card |
| CN109656583A (en) * | 2018-12-28 | 2019-04-19 | 北京深思数盾科技股份有限公司 | Method for burning chip, host computer and chip burn-recording system |
| CN109656583B (en) * | 2018-12-28 | 2021-04-20 | 北京深思数盾科技股份有限公司 | Chip burning method, upper computer and chip burning system |
| CN110988661A (en) * | 2019-12-09 | 2020-04-10 | 思尔芯(上海)信息科技有限公司 | FPGA prototype verification development board time division analysis system, method, medium and terminal |
| CN110988661B (en) * | 2019-12-09 | 2022-11-11 | 上海思尔芯技术股份有限公司 | FPGA prototype verification development board time division analysis system, method, medium and terminal |
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