CN104793166A - Testing device and method for arc fault detecting device (AFDD) - Google Patents
Testing device and method for arc fault detecting device (AFDD) Download PDFInfo
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Abstract
The invention provides a testing device for arc fault detecting device (AFDD). The testing device comprises a transformer, a current transformer, a precise rectifying circuit, a zero cross detecting circuit, an integral circuit, a microprocessor and a display. The invention further provides a testing method for AFDD. The method includes: voltage signals and current signals are input to the zero cross detecting circuit to obtain zero cross signals, the microprocessor controls the integral circuit to perform integration to obtain integral values, and whether voltage and current signals are arc half waves or not by judging whether the voltage and current integral values are larger than the corresponding threshold or not at the same time; an AFDD response output signal are input to the microprocessor to serve as signals for stopping integration, a timer is turned on when the microprocessor judges the first arc half wave, the timer is turned off when the AFDD response signal is detected, and AFDD response time is obtained. By processing arc voltage and current signals, arc half wave number and the AFDD response time can be obtained accurately, and an existing AFDD can be comprehensively evaluated through the arc half wave number and the AFDD response time.
Description
Technical field
The invention belongs to arc-detection field, particularly one is used for arc fault detection device AFDD proving installation and method thereof.
Background technology
Arc fault detection device (AFDD) is a kind of circuit protection device of making acousto-optic early warning or line disconnection in time when detecting that circuit has arc fault to occur.Particularly, AFDD detects in circuit electric arc electric phenomenon, makes acousto-optic early warning or cuts off the circuit of this equipment protection.Arc fault be due to household lines insulation ag(e)ing, loose contact, damage in insulation, connection loosen etc. cause.
For the research and development of arc fault detection device, " General Requirements of arc fault detection device (AFDD) " standard has been drafted by China, the technical requirement necessary to arc fault detection device (AFDD) regulation and test routine.
Existing AFDD develops at home and is in the starting stage, and commercialization will move towards market from now on, the AFDD come into the market must meet national standard, and this just must carry out strict test to AFDD.
For test AFDD equipment prior art usually in the serial arc discharge equipment of such as machine arc gap and point cantact relay and so on, production simulation AC electric system the test signal of the characteristics of signals of serial arc electric discharge to test AFDD, to set up typical fault arc data storehouse, output to AFDD for test.Can these testing apparatuss be all work by producing the arc fault AFDD that tests development from qualitative angle, quantitatively cannot determine that whether AFDD fixs at master gauge and make action accurately.As standard regulation AFDD must respond in certain electric arc half wave number, certain hour.Therefore, the present invention eliminates the problems referred to above, tests electric arc half wave number of AFDD action, sensitivity.
Summary of the invention
An object of the present invention is to solve at least the problems referred to above and/or defect, and the advantage will illustrated at least is below provided.
In order to realize these objects and other advantage of the invention of this reality, provide a kind of proving installation for arc fault detection device AFDD, it comprises:
Transformer, it is connected in parallel on the two ends of arc generating device, for gathering the magnitude of voltage of described arc generating device;
Current transformer, it is connected with described arc generating device, and for gathering the current value of described arc generating device;
Rectification circuit, its input end is connected with described transformer and described current transformer, and obtains absolute value of voltage signal and current absolute value signal for described magnitude of voltage and described current value being carried out respectively rectification and export;
Zero cross detection circuit, it receives described absolute value of voltage signal and current absolute value signal that described rectification circuit exports, carries out process respectively and obtains voltage zero-crossing signal and current zero-crossing signal and export;
Integrating circuit, it is connected with described rectification circuit, and described absolute value of voltage signal and described current absolute value signal are obtained voltage half cycle integrated value and the current half integrated value of half power frequency period through process;
And microprocessor, it connects arc fault detection device, receive the output of described integrating circuit and described zero cross detection circuit, and according to being previously stored with voltage half cycle integral threshold and current half integral threshold in it, calculate response time and electric arc half wave number of described arc fault detection device.
Preferably, in the described proving installation for arc fault detection device AFDD, described microprocessor obtains described response time and electric arc half wave number by following steps: described microprocessor receives described voltage zero-crossing signal and described current zero-crossing signal, and open described integrating circuit, accept described voltage half cycle integrated value and described current half integrated value and be stored in integrated value database, voltage half cycle integral threshold and current half integral threshold is also previously stored with in described microprocessor, when described voltage half cycle integrated value is greater than described voltage half cycle integral threshold, and described current half integrated value is when being greater than described current half integral threshold, be judged to be an electric arc half-wave, open counter and timer simultaneously, described microprocessor is also connected with described electric arc detecting device to be tested, for receiving the response signal of described electric arc detecting device to be tested, when receiving first response signal, described microprocessor cuts out described integrating circuit, close described timer and described counter simultaneously, obtain response time and electric arc half wave number of described arc fault detection device.
Preferably, in the described proving installation for arc fault detection device AFDD, described transformer primary side is attempted by the two ends of described electric arc detecting device to be tested, secondary side joint build-out resistor.
Preferably, in the described proving installation for arc fault detection device AFDD, described rectification circuit is precise rectification circuit.
Preferably, in the described proving installation for arc fault detection device AFDD, the external display device of described microprocessor, for showing described response time and described electric arc half wave number.
The present invention also provides a kind of method of testing of the proving installation for arc fault detection device AFDD, and it comprises:
Obtain magnitude of voltage and the current value of Electric arc monitoring device to be detected;
Described magnitude of voltage and described current value obtain absolute value of voltage signal and current absolute value signal respectively through rectification circuit;
Described absolute value of voltage signal and described current absolute value signal obtain voltage zero-crossing signal and current zero-crossing signal respectively through zero cross detection circuit process;
Microprocessor obtains voltage half cycle integrated value and current half integrated value to the Integral Processing that described voltage zero-crossing signal and described current zero-crossing signal carry out half power frequency period, voltage half cycle integral threshold and current half integral threshold is also previously stored with in described microprocessor, when described voltage half cycle integrated value is greater than described voltage half cycle integral threshold, and described current half integrated value is when being greater than described current half integral threshold, be judged to be an electric arc half-wave, start to add up electric arc half wave number and timing simultaneously; Described microprocessor is also connected with described electric arc detecting device to be tested, for receiving the response signal of described electric arc detecting device to be tested, when receiving first response signal, stopping counting and timing, obtaining response time and electric arc half wave number of described electric arc detecting device to be detected.
Preferably, in the described method of testing for arc fault detection device AFDD, described Integral Processing comprises:
Microprocessor accepts described voltage zero-crossing signal and described current zero-crossing signal, and open integrating circuit, described integrating circuit is connected with described rectification circuit, and described absolute value of voltage signal and described current absolute value signal are obtained voltage half cycle integrated value and the current half integrated value of half power frequency period through process.
Preferably, in the described method of testing for arc fault detection device AFDD, when receiving first response signal, described integrating circuit is closed.
Preferably, in the described method of testing for arc fault detection device AFDD, the algorithm of described microprocessor statistics electric arc half wave number is: define a variable temp for storing the result of determination of current demand signal, when current demand signal is judged to be the electric arc semiperiod, temp+1, otherwise do not add; Until microprocessor obtains the response signal that AFDD exports, the electric arc half wave number N that statistics is accumulative.
The invention provides a kind of proving installation for arc fault detection device AFDD, comprise transformer, current transformer, precise rectification circuit, zero cross detection circuit, integrating circuit, microprocessor and display.The present invention also provides a kind of method of testing for arc fault detection device AFDD, the voltage signal of arc fault is obtained by transformer, load current signal is detected by current transformer, voltage signal, current signal is input to rectification circuit and carries out amplification and rectification, obtain the absolute value signal of proper ratio, absolute value signal carries out integration by integrating circuit to absolute value signal again, current signal is input to zero cross detection circuit simultaneously, obtain zero cross signal, zero cross signal is outputted to microprocessor, microprocessor obtains zero cross signal, control integrating circuit and carry out integration acquisition integrated value, by judging whether electric current and voltage integrated value is greater than corresponding threshold value simultaneously, judge current flow half-wave whether as electric arc half-wave, AFDD is responded output signal and is input to microprocessor, this signal, as the signal stopping integration, when microprocessor determines first electric arc half-wave Open Timer device, detects that AFDD response signal closes timer, obtains the AFDD response time.The present invention, by accurately obtaining electric arc half wave number, AFDD response time to the process of arc voltage current signal, can carry out comprehensive eye exam to existing AFDD from electric arc half wave number, response time two angles.
Part is embodied by explanation below by other advantage of the present invention, target and feature, part also will by research and practice of the present invention by those skilled in the art is understood.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of the proving installation for arc fault detection device AFDD provided by the invention;
Fig. 2 is the circuit diagram for the rectification circuit in the proving installation of arc fault detection device AFDD provided by the invention;
Fig. 3 is the circuit diagram for the zero cross detection circuit in the proving installation of arc fault detection device AFDD provided by the invention;
Fig. 4 is the circuit diagram for the integrating circuit in the proving installation of arc fault detection device AFDD provided by the invention;
Fig. 5 is the process flow diagram of the method for testing for arc fault detection device AFDD provided by the invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in further detail, can implement according to this with reference to instructions word to make those skilled in the art.
Should be appreciated that used hereinly such as " to have ", other element one or more do not allotted in " comprising " and " comprising " term or the existence of its combination or interpolation.
Here the number of devices illustrated and treatment scale are used to simplify explanation of the present invention.Application of the present invention, modifications and variations be will be readily apparent to persons skilled in the art.
As shown in Figure 1, the invention provides a kind of proving installation for arc fault detection device AFDD, comprise the transformer 1 of the voltage signal for gathering arc generating device two ends, for gathering the current transformer 2 of load current signal, for voltage signal current signal being carried out the rectification circuit 3 of rectification, voltage and current signal for exporting rectification circuit carries out integration to obtain the integrating circuit 5 of half-cycle integral in the semiperiod schedule time, for the signal after rectification is carried out zero passage detection obtain zero crossing zero cross detection circuit 4 and by catching half-cycle integral that integrating circuit exports and using the microprocessor 6 of arc fault detection algorithm, for showing the LCDs 8 of result and tested AFDD equipment 7.Described transformer 1 is connected to arc generating device two ends, described current transformer 2 is serially connected with in circuit, described rectification circuit 3 adopts precise rectification circuit, described microprocessor 6 obtains zero cross signal that zero cross detection circuit provides and the response signal that AFDD equipment 7 provides respectively, microprocessor 6 output terminal connecting fluid crystal display screen 8.
As shown in Figure 2, described rectification circuit, its input end is connected with described transformer and described current transformer, and obtains absolute value of voltage signal and current absolute value signal for described magnitude of voltage and described current value being carried out respectively rectification and export.
As shown in Figure 3, zero cross detection circuit, it receives described absolute value of voltage signal and current absolute value signal that described rectification circuit exports, carries out process respectively and obtains voltage zero-crossing signal and current zero-crossing signal and export.
As shown in Figure 4, integrating circuit, it is connected with described rectification circuit, and described absolute value of voltage signal and described current absolute value signal are obtained voltage half cycle integrated value and the current half integrated value of half power frequency period through process.
As shown in Figure 1 and Figure 5, the present invention also provides the method for detecting arc of the proving installation of AFDD, determines whether to produce arc fault, comprise the following steps by the voltage current waveform change detecting protected circuit:
1. sampled by transformer 1 pair of arc generating device both end voltage, obtain voltage signal; Sampled by the electric current of current transformer 2 pairs of protected circuits, obtain load current signal; Voltage, current signal are input to rectification circuit 3 and carry out rectification; The electric current and voltage semi-invariant that the voltage current waveform signal obtained after rectification is obtained on the semiperiod schedule time by integrating circuit 5; Signal after rectification is input to zero cross detection circuit 4 simultaneously and obtains power frequency zero crossing.
2. microprocessor 6 runs arc fault detection algorithm and carries out fault verification:
The zero cross signal of the zero cross detection circuit that microprocessor 6 obtains obtains the half-cycle integral of voltage and current signal by timing A/D conversion, judge whether two integrated values are greater than the respective threshold of setting simultaneously, if then judge that this semiperiod is the electric arc semiperiod, start electric arc half-wave counting number, from first the electric arc half-wave obtained, open timer start timing.
3., when microprocessor 6 detects that tested AFDD equipment 7 has response to export, terminate the computing of arc fault detection algorithm, timeing closing device, timing terminates, and electric arc half-wave number, timer timing time are shown in LCDs 8.
In LCDs 8, electric arc half wave number of display is tested AFDD and responds under this electric arc half wave number action, and the time that LCDs 8 shows, to be tested AFDD be occurs at first electric arc half-wave the time that tested AFDD responds.
Electric arc half wave number obtained by the proving installation of AFDD, time can be quantitative from electric arc half wave number, response time two aspect to AFDD equipment test.
Although embodiment of the present invention are open as above, it is not restricted to listed in instructions and embodiment utilization.It can be applied to various applicable the field of the invention completely.For those skilled in the art, can easily realize other amendment.Therefore do not deviating under the universal that claim and equivalency range limit, the present invention is not limited to specific details and illustrates here and the legend described.
Claims (9)
1. for a proving installation of arc fault detection device AFDD, it is characterized in that, comprising:
Transformer, it is connected in parallel on the two ends of arc generating device, for gathering the magnitude of voltage of described arc generating device;
Current transformer, it is connected with described arc generating device, and for gathering the current value of described arc generating device;
Rectification circuit, its input end is connected with described transformer and described current transformer, and obtains absolute value of voltage signal and current absolute value signal for described magnitude of voltage and described current value being carried out respectively rectification and export;
Zero cross detection circuit, it receives described absolute value of voltage signal and current absolute value signal that described rectification circuit exports, carries out process respectively and obtains voltage zero-crossing signal and current zero-crossing signal and export;
Integrating circuit, it is connected with described rectification circuit, and described absolute value of voltage signal and described current absolute value signal are obtained voltage half cycle integrated value and the current half integrated value of half power frequency period through process;
And microprocessor, it connects arc fault detection device, receive the output of described integrating circuit and described zero cross detection circuit, and according to being previously stored with voltage half cycle integral threshold and current half integral threshold in it, calculate response time and electric arc half wave number of described arc fault detection device.
2. as claimed in claim 1 for the proving installation of arc fault detection device AFDD, it is characterized in that, described microprocessor obtains described response time and electric arc half wave number by following steps: described microprocessor receives described voltage zero-crossing signal and described current zero-crossing signal, and open described integrating circuit, accept described voltage half cycle integrated value and described current half integrated value and be stored in integrated value database, voltage half cycle integral threshold and current half integral threshold is also previously stored with in described microprocessor, when described voltage half cycle integrated value is greater than described voltage half cycle integral threshold, and described current half integrated value is when being greater than described current half integral threshold, be judged to be an electric arc half-wave, open counter and timer simultaneously, described microprocessor is also connected with described electric arc detecting device to be tested, for receiving the response signal of described electric arc detecting device to be tested, when receiving first response signal, described microprocessor cuts out described integrating circuit, close described timer and described counter simultaneously, obtain response time and electric arc half wave number of described arc fault detection device.
3., as claimed in claim 1 for the proving installation of arc fault detection device AFDD, it is characterized in that, described transformer primary side is attempted by the two ends of described electric arc detecting device to be tested, secondary side joint build-out resistor.
4., as claimed in claim 1 for the proving installation of arc fault detection device AFDD, it is characterized in that, described rectification circuit is precise rectification circuit.
5., as claimed in claim 1 for the proving installation of arc fault detection device AFDD, it is characterized in that, the external display device of described microprocessor, for showing described response time and described electric arc half wave number.
6. adopt a method of testing for the AFDD proving installation as described in any one of claim 1 to 5, it is characterized in that, comprising:
Obtain magnitude of voltage and the current value of Electric arc monitoring device to be detected;
Described magnitude of voltage and described current value obtain absolute value of voltage signal and current absolute value signal respectively through rectification circuit;
Described absolute value of voltage signal and described current absolute value signal obtain voltage zero-crossing signal and current zero-crossing signal respectively through zero cross detection circuit process;
Microprocessor obtains voltage half cycle integrated value and current half integrated value to the Integral Processing that described voltage zero-crossing signal and described current zero-crossing signal carry out half power frequency period, voltage half cycle integral threshold and current half integral threshold is also previously stored with in described microprocessor, when described voltage half cycle integrated value is greater than described voltage half cycle integral threshold, and described current half integrated value is when being greater than described current half integral threshold, be judged to be an electric arc half-wave, start to add up electric arc half wave number and timing simultaneously; Described microprocessor is also connected with described electric arc detecting device to be tested, for receiving the response signal of described electric arc detecting device to be tested, when receiving first response signal, stopping counting and timing, obtaining response time and electric arc half wave number of described electric arc detecting device to be detected.
7. the method for testing of AFDD as claimed in claim 6, it is characterized in that, described Integral Processing comprises:
Microprocessor accepts described voltage zero-crossing signal and described current zero-crossing signal, and open integrating circuit, described integrating circuit is connected with described rectification circuit, and described absolute value of voltage signal and described current absolute value signal are obtained voltage half cycle integrated value and the current half integrated value of half power frequency period through process.
8. the method for testing of AFDD as claimed in claim 7, is characterized in that, when receiving first response signal, closing described integrating circuit.
9. the method for testing of AFDD as claimed in claim 6, it is characterized in that, the algorithm of described microprocessor statistics electric arc half wave number is: define a variable temp for storing the result of determination of current demand signal, when current demand signal is judged to be the electric arc semiperiod, temp+1, otherwise do not add; Until microprocessor obtains the response signal that AFDD exports, the electric arc half wave number N that statistics is accumulative.
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| CN106707145A (en) * | 2015-11-12 | 2017-05-24 | 上海电科电器科技有限公司 | Arc fault detection device test device and test method |
| CN108152774A (en) * | 2018-02-25 | 2018-06-12 | 公安部沈阳消防研究所 | The field test equipment and its control method of a kind of fault electric arc detector |
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