CN104779959B - The conversion equipment and method of deviant is added - Google Patents
The conversion equipment and method of deviant is added Download PDFInfo
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- CN104779959B CN104779959B CN201410010335.1A CN201410010335A CN104779959B CN 104779959 B CN104779959 B CN 104779959B CN 201410010335 A CN201410010335 A CN 201410010335A CN 104779959 B CN104779959 B CN 104779959B
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Abstract
The invention discloses conversion equipments and method that deviant is added.Conversion equipment includes a switching circuit, one first capacitance, multiple additional capacitor units and an operational amplifier.Switching circuit includes multiple switch.First capacitance according to the switching of switching circuit storing one first charge value.Multiple additional capacitor units include one first additional capacitor unit and one second additional capacitor unit with a capacitive differential, to store polarity one second charge value and a third charge value of different sizes respectively according to the switching of switching circuit.Operational amplifier generates a Dc bias according to the first charge value, and Dc bias includes a DC offset value, and difference of the operational amplifier also according to the second charge value and third charge generates a reverse phase DC offset value, with compensating DC offset value.
Description
Technical field
The present invention relates to a kind of electronic devices；In particular it relates to a kind of D/A conversion device of additional offset value with
Analog/digital conversion device
Background technology
The offset (offset) of general circuit signal often causes many problems.Such as in voice applications, voicefrequency circuit is defeated
The direct current offset (DC offset) gone out often causes human ear to hear plosive (pop-noise).This direct current offset is solved at present to cause
The method of plosive is single reverse phase direct current offset to be added to reduce the direct current offset, but have because of the variation of technique and environment
It is limited.
The above method can be applied to analog/digital converter (Analog-to-Digital Converter, ADC) and number
Word/analog converter (Digital-to-Analog Converter, DAC), but the elimination of direct current offset or plosive still has
Limit.The analog/digital converter 100a of switching capacity (switch-cap) form is used as shown in Figure 1A.Analog/digital conversion
Device 100a include loop filter (Loop Filter) 100a1, a N quantizer (N-bit Quantizer) 100a2,
One N internal digital/analog converter (N-bit Internal DAC) 100a3.The above method can also be applied to such as Figure 1B institutes
The digital/analog converter 100b using switching capacity (switch-cap) form shown.Digital/analog converter 100b includes
There are an operational amplifier 100b1, pairs of capacitance C1 and C2, pairs of switch S1, S2, S3, S4.
It is said by taking existing three increment accumulations (Three bits Sigma-Delta DAC) digital/analog converter as an example
It is bright.B, Fig. 2A are please referred to Fig.1, as shown in Figure 2 A, the capacitance C1 of digital/analog converter 100b includes seven capacitor cells
(Cell)-capacitor cell 1~7.This seven capacitor cell 1~7 according to three input codes numerical value 000,001,010,011,
100, it 101,110,111 determines to provide reference voltage VRP or negative reference voltage VRN to capacitor cell 1~7, it is opposite to generate
The eight kinds of different conditions answered.When digital/analog converter 100b is according to frequency signal CK1 and CK2 switching switches S1, S2, S3, S4
When, digital/analog converter 100b can generate the charge value of following eight kinds of sizes according to eight numerical value of digital code：
(+1+1+1+1+1+1+1) * (C1/C2)=>+7*(C1/C2)
(+1+1+1+1+1+1-1) * (C1/C2)=>+5*(C1/C2)
(+1+1+1+1+1-1-1) * (C1/C2)=>+3*(C1/C2)
(+1+1+1+1-1-1-1) * (C1/C2)=>+1*(C1/C2)
(+1+1+1-1-1-1-1) * (C1/C2)=>-1*(C1/C2)
(+1+1-1-1-1-1-1) * (C1/C2)=>-3*(C1/C2)
(+1-1-1-1-1-1-1) * (C1/C2)=>-5*(C1/C2)
(- 1-1-1-1-1-1-1) * (C1/C2)=>-7*(C1/C2)
With charge value (+1+1+1-1-1-1-1) * (C1/C2)=>Illustrate for -1* (C1/C2).Assuming that reference voltage
VRP is+1V, negative reference voltage VRN is -1V.Then, charge value -1* (C1/C2) allows capacitor cell 7,6,5 according to input code 100
It receives reference voltage VRP and obtains numerical value+1 (white circle), and capacitor cell 4,3,2,1 is allowed to receive negative reference voltage VRN
And obtain numerical value -1 (black circle).Therefore, it is (+1+1+1-1-1-1-1) * (C1/C2)=- 1* (C1/ that charge value, which can be obtained,
C2), if assuming C1=C2, charge value can be obtained and be equal to -1.The rest may be inferred for the charge value that other input codes obtain.Side according to this
Formula can generate the Dc bias Vop or Von that charge value is+7 ,+5 ,+3 ,+1, -1, -3, -5, -7 by operational amplifier 100b1.
However, probably due to process drift, ring between the capacitance of general digital/analog converter or analog/digital converter
Border becomes the factors such as exclusive or asymmetry, causes capacitance that size non-matching phenomenon (capacitor mismatch) occurs each other and causes
The direct current offset of Dc bias Vop or Von.As shown in Figure 2 B, it is assumed that the capacitance of capacitor cell 7 and other capacitor cells 1~6
Size mismatches.As shown in the drawing, such as the capacitance actual size of capacitor cell 7 is at solid line circle；And capacitor cell 7
Then it is used for indicating the size when capacitance of capacitor cell 7 is matched with other capacitor cells at dotted line circle.The prior art is herein
When, a single minimum capacitance, capacitor cell 0 as shown in Figure 2 B, to attempt to fill up the capacitance sky of capacitor cell 7 can be used
Place's (difference in areas of dotted line and solid line) is lacked, capacitor cell 7 is eliminated to generate a very small single reverse phase DC offset value
Capacitance mismatches caused direct current offset (DC offset).But often because of the drift of technique, and can not be accurately pre-
Know and produces the minimum capacitance (or variation value of capacitor cell).Therefore the prior art can not still solve digital-to-analog
The DC offset problem of conversion equipment and analog/digital conversion device.
Invention content
In view of the above-mentioned problems, a kind of multiple default sizes can be added providing in the first purpose of embodiment of the present invention
The conversion equipment of opposite phase shift value.
In view of the above-mentioned problems, the first purpose of embodiment of the present invention provide it is a kind of using multiple additional capacitor units
Difference generates the conversion equipment for the opposite phase shift value for presetting size, to compensate the DC offset value of conversion equipment generation.
The conversion equipment of embodiment of the present invention can be a trigonometric integral kenel D/A conversion device or simulation/
Digital switching device.
Embodiment there is provided a kind of conversion equipments by one according to the present invention.Conversion equipment includes a switching circuit, one
First capacitance, multiple additional capacitor units and an operational amplifier.Switching circuit includes multiple switch.First capacitance is used
To store one first charge value according to the switching of switching circuit.Multiple additional capacitor units include one with a capacitive differential
First additional capacitor unit and one second additional capacitor unit, to store polarity size respectively according to the switching of switching circuit
Different one second charge values and a third charge value.Operational amplifier generates a Dc bias, direct current according to the first charge value
Bias includes a DC offset value, and it is straight that operational amplifier and the difference according to the second charge value and third charge generate a reverse phase
Deviant is flowed, with compensating DC offset value.
Embodiment there is provided a kind of conversion equipments by according to the present invention another, include an operational amplifier, one first
Capacitance, one first additional capacitor unit, one second additional capacitor unit.Operational amplifier is generating a Dc bias.First
Capacitance includes multiple first capacitor cells, and to generate one first charge value, the first charge value has a charge error value,
Wherein at least one first capacitor cell has a capacitance error value, charge error value related with capacitance error value.First additional electrical
Hold unit to store a positive charge values.Second additional capacitor unit to store a negative electricity charge values, wherein positive charge values with it is negative
Charge value has a charge difference.Wherein, operational amplifier generates direct current according to the first charge value, positive charge values, negative electricity charge values
Bias, and charge difference is compensating charge error value.
According to the present invention it is another embodiment there is provided it is a kind of compensation conversion equipment deviant method, under including
Row step：First, a switching circuit is provided, it includes multiple switches.One first capacitance is utilized according to the switching of switching circuit
One first charge value is stored to generate a Dc bias, wherein the first capacitance includes multiple first capacitor cells, Dc bias
Include a DC offset value, DC offset value is generated due to being mismatched between multiple first capacitor cells.According to switch
A capacitive differential between the switching of circuit and one first additional capacitor unit and one second additional capacitor unit is straight to compensate
Flow deviant.
The conversion equipment and method of embodiment of the present invention are produced more using the difference between multiple additional capacitor units
The combination of a minimum opposite phase shift value to generate the DC offset value of compensation script circuit direct bias, and can solve existing skill
The unmatched problem of art conversion equipment capacitance.
Description of the drawings
Figure 1A shows the schematic diagram of an existing analog/digital converter using switching capacity (switch-cap) form.
Figure 1B shows the schematic diagram of an existing digital/analog converter using switching capacity (switch-cap) form.
Fig. 2A shows the schematic diagram of the capacitor array of existing digital/analog converter capacitance.
Fig. 2 B show another schematic diagram of the capacitor array of existing digital/analog converter capacitance.
Fig. 3 A show a kind of schematic diagram of the conversion equipment of addition deviant of an embodiment of the present invention.
Fig. 3 B show that the conversion equipment of an embodiment of the present invention is the fortune of the embodiment of a D/A conversion device
Make state diagram.
The conversion equipment of another embodiment of Fig. 3 C display present invention is the embodiment of a D/A conversion device
Operating state figure.
Fig. 4 A show that the conversion equipment of an embodiment of the present invention is the fortune of the embodiment of an analog/digital conversion device
Make state diagram.
Fig. 4 B show the schematic diagram of an equivalent circuit of an embodiment of the present invention Fig. 4 A conversion equipments.
Fig. 4 C show the schematic diagram of an equivalent circuit of an embodiment of the present invention Fig. 4 A conversion equipments.
Fig. 5 A show that the conversion equipment of an embodiment of the present invention is the fortune of the embodiment of an analog/digital conversion device
Make state diagram.
Fig. 5 B show the schematic diagram of an equivalent circuit of an embodiment of the present invention Fig. 5 A conversion equipments.
Fig. 5 C show the schematic diagram of an equivalent circuit of an embodiment of the present invention Fig. 5 A conversion equipments.
Fig. 6 A show the schematic diagram of first capacitor cell and additional capacitor unit of an embodiment of the present invention.
The schematic diagram of the first capacitor cell and additional capacitor unit of another embodiment of Fig. 6 B display present invention.
6C figures show the schematic diagram of the first capacitor cell and additional capacitor unit of another embodiment of the present invention.
Fig. 7 shows a kind of flow chart of method of the offer deviant of an embodiment of the present invention in conversion equipment.
Specific implementation mode
Fig. 3 A show a kind of schematic diagram of the conversion equipment 300 of addition deviant of an embodiment of the present invention.This implementation
The conversion equipment 300 of mode can be a D/A conversion device (Digital to Analog Converter, DAC).Turn
Changing device 300 includes an operational amplifier 301, a first switch condenser network 302a and a second switch condenser network
302b。
First switch condenser network 302a includes the multiple switch S1~S8 to form a switching circuit, one first capacitance C1
(can be a sampling capacitor), one second capacitance C2 (can be a holding capacitor) and multiple additional capacitor unit C0a, C0b.The
Two switched-capacitor circuit 302b also include multiple switch S1~S8, one first capacitance C1, one second capacitance C2 and multiple attached
Add capacitor cell C0a, C0b.Wherein, the first additional capacitor unit C0a is the capacitor cell of a storage positive charge, the second additional electrical
Hold the capacitor cell that unit C0b is a storage negative electrical charge.
Operational amplifier 301 includes at least output of Dc bias a Vop or Von to generate, and due to the first capacitance
C1 may be because that the factors such as technique drift, environmental modification or asymmetry cause it with capacitance error value, therefore operational amplifier
301 also have a DC offset value (DC according to the first capacitance C1 and the second capacitance C2 the Dc bias Vop or Von generated
offset).The example of such as figure, first switch condenser network 302a are respectively coupled to operation with second switch condenser network 302b and put
The in-phase input end and inverting input of big device 301.301 in-phase input end of operational amplifier and inverting input receive the respectively
Two charge values that one switched-capacitor circuit 302a and second switch condenser network 302b is provided, generate Dc bias Vop with
Von。
Since first switch condenser network 302a and the structure of second switch condenser network 302b are identical as operation principles, because
This is following only to be illustrated with single-ended (Single end) circuit of first switch condenser network 302a.
In multiple switch S1~S8 switch S1, S2, S6 and S8 according to first frequency signal CK1 control conducting (On) or
It disconnects (Off)；And switch S3, S4, S5 and S7 are turned on or off according to the control of second frequency signal CK2.The first of switch S1
End coupling reference voltage VRP or negative reference voltage VRN, second end couple the first end and the first of the first capacitance C1 of switch S3
End.The first end of switch S2 couples a low voltage level (such as ground connection GND), and second end couples the second end of the first capacitance C1 and opens
The first end of S4 is closed, a first node A is formed.The first end and the first of switch S7 of the second end coupling switch S5 of switch S3
End forms a second node B.The second end of switch S4 couples the same phase of the first end and operational amplifier 301 of the second capacitance C2
Input terminal.The first end of first end coupling the first node A and the second additional capacitor unit C0b of first additional capacitor unit C0a,
The second end of the first end and switch S5 of the second end coupling switch S6 of first additional capacitor unit C0a.The second end of switch S6
Couple reference voltage VRP.The second end of switch S7 couples the second end and the first of switch S8 of the second additional capacitor unit C0b
End.The second end coupling negative reference voltage VRN of switch S8.
First capacitance C1 includes multiple first capacitor cells, and an embodiment please refers to the first capacitance C1 shown in Fig. 6 A
Including seven capacitor cells (Capacitor cell) 1~7.Certainly, this is merely illustrative, and the invention is not limited thereto, or
The capacitance of other kenels, number.Wherein, at least one first capacitor cell may be because the environmental factors such as technique drift in capacitance C1
With a capacitance error value, such as the capacitor cell 7 of Fig. 6 A.It may be noted that the capacitance error of capacitor cell 7 shown in Fig. 6 A~Fig. 6 C
It is worth merely illustrative, the size of error size is without being limited thereto, and is also not necessarily limited to only capacitor cell 7 and has capacitance error value, also may be used
It is happened in other capacitor cells.And in running, the first capacitance C1 and the second capacitance C2 are according to reference voltage VRP or negative ginsengs
It examines voltage VRN and generates first charge value with a charge error value.
Multiple additional capacitor unit C0, each additional capacitor unit C0's is of different sizes, between additional capacitor unit C0
A capacitive differential with a preset ratio.Such as the example of Fig. 3 A, the first additional capacitor unit C0a is the electricity of a storage positive charge
Hold unit, receives reference voltage VRP to store a positive charge values.Second additional capacitor unit C0b is a storage negative electrical charge
Capacitor cell receives negative reference voltage VRN to store a negative electricity charge values.And the first additional capacitor unit C0a and one second is additional
There is a capacitive differential delta, capacitive differential delta is to as a compensating electric capacity value between capacitor cell C0b
(Capacitor offset).Assuming that reference voltage VRP and negative reference voltage VRN is respectively+1V and -1V, and it is attached to work as first
Add capacitor cell C0a to receive reference voltage VRP and generate a positive charge (the second charge value), the second additional capacitor unit C0b connects
When receiving negative reference voltage VRN generation one negative electrical charge (third charge values), since additional capacitor unit C0a and C0b has capacitance difference
The reason of value delta, the positive charge values of generation have a charge difference with the negative electricity charge values.And operational amplifier 301 is by foundation
This charge difference generates an opposite phase shift value, to compensated operational amplifier 301 because the capacitance error value of the first capacitance C1 is made
At DC offset value.
One embodiment please refers to Fig.3 A, Fig. 3 B, Fig. 3 C.Fig. 3 B, Fig. 3 C show the operating state figure of conversion equipment 300.
The operating state of the conversion equipment 300 of present embodiment is illustrated with the function mode of single-ended (Single end), this field
Technical staff the function mode of conversion equipment 300 differential (Differential) should can be obtained according to explanation herein, because
This is repeated no more.When running, (On) is connected according to first frequency signal CK1 in switch S1, S2, S6, S8 of Fig. 3 A, switch S3, S4,
S5, S7 disconnect (Off) according to second frequency signal CK2, and first switch condenser network 302a divides into left and right two parts electricity at this time
Road, as shown in Figure 3B.Positive and negative reference voltage VRP or VRN pairs of the first capacitance C1 charging, and VRP pairs first of reference voltage is additional
VRN pairs of capacitor cell C0a chargings, negative reference voltage the second additional capacitor unit C0b charging.Then, as shown in Figure 3 C, switching
Switch S1, S2, S6, S8 of condenser network 302a is disconnected according to first frequency signal CK1, and switch S3, S4, S5, S7 are according to second
When frequency signal CK2 conductings, the first capacitance C1, the first additional capacitor unit C0a, the second additional capacitor unit C0b parallel connections second
Capacitance C2 makes the charge of the first capacitance C1, the first additional capacitor unit C0a, the second additional capacitor unit C0b be provided to output section
Point, to generate Dc bias in the output of amplifier 301.
The schematic diagram of the conversion equipment 400 of another embodiment of Fig. 4 A present invention.Conversion equipment 400 is an analog/digital
Conversion equipment (ADC).The conversion equipment 400 of present embodiment is single-ended (Single end) conversion equipment, the skill of this field
Art personnel should can obtain the conversion equipment of differential (Differential end) according to explanation herein, therefore repeat no more it
Details.
Conversion equipment 400 includes an operational amplifier 401 and a switched-capacitor circuit 402.Switched-capacitor circuit 402 wraps
Contain multiple switch S1~S8, one first capacitance C1, one second capacitance C2 and the multiple additional capacitors for forming a switching circuit
Unit C0a, C0b.Wherein, the first additional capacitor unit C0a is the capacitor cell of a positive or negative charge of storage, the second additional capacitor
Unit C0b is the capacitor cell of a storage negative or positive charge.The coupling mode of said modules is as shown, repeat no more.
Fig. 4 B, Fig. 4 C show that conversion equipment 400 is the operating state figure of the embodiment of an analog/digital conversion device.
In Fig. 4 B, when the switched-capacitor circuit 402 of analog/digital conversion device 400 switches over, the switch of switched-capacitor circuit 402
S2, S3, S5, S7 are disconnected according to the CK1 conductings of first frequency signal, switch S1, S4, S6, S8 according to second frequency signal CK2, this
When conversion equipment 400 divide into left and right two parts circuit, for brevity such as the first capacitance C1, the first additional capacitor unit C0a
It is all represented with C with the second additional capacitor unit C0b, shown in the attached drawing of drawing left, the circuit of the first capacitance C1 is to receive input
Voltage Vi charged, the circuit of the circuit of the first additional capacitor unit C0a and the second additional capacitor unit C0b are receiving voltages
Vcm charges.Wherein, voltage Vcm is charge conversion reference voltage or common mode (Common mode) voltage.And such as Fig. 4 C institutes
Show, when the switched-capacitor circuit 402 of analog/digital conversion device switches, switch S2, S3, S5, S7 of switched-capacitor circuit 402
It is disconnected according to first frequency signal CK1, switch S1, S4, S6, S8 are connected according to second frequency signal CK2, capacitance C1, first attached
Capacitor cell C0a, the second additional capacitor unit C0b is added to receive reference voltage VRP or negative reference voltage VRN, to store difference
Store the first charge value, the second charge value and a third charge value.If wherein the first additional capacitor unit C0a is to receive positive ginseng
When examining voltage VRP, the second charge value is positive value, and the second additional capacitor unit C0b receives negative reference voltage VRN, third charge
Value is negative value, and vice versa.
Fig. 5 A are the schematic diagram of the conversion equipment 500 of another embodiment of the present invention.Conversion equipment 400 is a simulation/number
Word conversion equipment (ADC).The conversion equipment 500 of present embodiment is single-ended (Single end) conversion equipment, this field
Technical staff should can obtain the conversion equipment of differential (Differential end) according to explanation herein, therefore repeat no more
Its details.
Conversion equipment 500 includes an operational amplifier 501 and a switched-capacitor circuit 502.Switched-capacitor circuit 502 wraps
Contain multiple switch S1~S8, one first capacitance C1, one second capacitance C2 and the multiple additional capacitors for forming a switching circuit
Unit C0a, C0b.Wherein, the first additional capacitor unit C0a is the capacitor cell of a positive or negative charge of storage, the second additional capacitor
Unit C0b is the capacitor cell of a storage negative or positive charge.The coupling mode of said modules is as shown, repeat no more.
Fig. 5 B, Fig. 5 C show that conversion equipment 500 is the operating state figure of the embodiment of an analog/digital conversion device.
The switched-capacitor circuit 502 of the analog/digital conversion device 500 of Fig. 5 B, Fig. 5 C and the analog/digital conversion of Fig. 4 B, Fig. 4 C fill
It is roughly the same to set the mode that 400 switch over, difference is that switch S2 is changed to be controlled by second frequency signal CK2, and switch S4 changes
To be controlled by first frequency CK1, and make Fig. 5 B, Fig. 5 C and Fig. 4 B, Fig. 4 C reversed.Its Detailed Operation mode and technical characteristic, this
The technical staff in field should can be pushed away by above description, be repeated no more.
The first capacitance C1, the second capacitance C2, the first additional capacitor unit of embodiment of the present invention described further below
C0a, the second additional capacitor unit C0b receive reference voltage VRP or negative reference voltage VRN, store the first charge value, the respectively
Two charge values and a third charge value, the capacitive differential subtracted each other using the second third charge value compensate the charge of the first charge value
Error amount reaches the function mode for generating the DC offset value that reverse biased value complement repays Dc bias.In embodiment of the present invention
An example of first capacitance C1 can be 3<6:0>Capacitor array, as shown in Figure 6A.Certainly, the invention is not limited thereto, also may be used
For the capacitance of other kenels or digit size.
It is the part coupling reference voltage VRP of multiple additional capacitor unit C0a, C0b of embodiment of the present invention, another
Part additional capacitor couples VRN.As shown in Figure 6A, in the figure, the first additional capacitor unit C0a corresponds to any of the first capacitance C1
The size value of capacitor cell 1~7 is 100%；And the second additional capacitor unit C0b corresponds to any capacitance of the first capacitance C1
The size value of unit 1~7 is 99%, and a minimum capacitive differential can be obtained using the difference of two capacitor cell C0a and C0b
Delta (or delta*C1), such as 1%*C1.And when switched-capacitor circuit switches over, the of the first additional capacitor unit C0a
The second capacitance Y of one capacitance X and the second additional capacitor unit C0b be multiplied by respectively reference voltage VRP (being assumed to be+1V) with
Negative reference voltage VRN (being assumed to be -1V) and the voltage difference X-Y that can be subtracted each other, this voltage difference is opposite phase shift value,
X-Y=X*VRP+Y*VRN, wherein | X-Y |=capacitive differential<1, VRP=+1, VRN=-1.It may be noted that above-mentioned numerical value is only to show
Example, the invention is not limited thereto.Then, in running, such as the first capacitance C1 and second of the embodiment conversion equipment 300 of Fig. 6 A
After capacitance C2 is according to the selection of input code, the selection by seven the first capacitor cells according to input code is multiplied by reference voltage VRP
Or negative reference voltage VRN is in conjunction with the second capacitance C2, and along with first, second additional capacitor C0a, C0b is multiplied by positive ginseng respectively
Voltage VRP and negative reference voltage VRN are examined, available one includes the total charge of an opposite phase shift value, as follows：
(+1+1+1+1+1+1+1) * (C1/C2)+(+1-1+delta) * (C1/C2)=>(+7+delta)*(C1/C2)；
(+1+1+1+1+1+1-1) * (C1/C2)+(+1-1+delta) * (C1/C2)=>(+5+delta)*(C1/C2)；
(+1+1+1+1+1-1-1) * (C1/C2)+(+1-1+delta) * (C1/C2)=>(+3+delta)*(C1/C2)；
(+1+1+1+1-1-1-1) * (C1/C2)+(+1-1+delta) * (C1/C2)=>(+1+delta)*(C1/C2)；
(+1+1+1-1-1-1-1) * (C1/C2)+(+1-1+delta) * (C1/C2)=>(-1+delta)*(C1/C2)；
(+1+1-1-1-1-1-1) * (C1/C2)+(+1-1+delta) * (C1/C2)=>(-3+delta)*(C1/C2)；
(+1-1-1-1-1-1-1) * (C1/C2)+(+1-1+delta) * (C1/C2)=>(-5+delta)*(C1/C2)；
(- 1-1-1-1-1-1-1) * (C1/C2)+(+1-1+delta) * (C1/C2)=>(-7+delta)*(C1/C2).
In this way, total capacitance value, which can be obtained, respectively (+7+delta), (+5+delta), (+3+delta), (+1+
delta)、(-1+delta)、(-3+delta)、(-5+delta)、(-7+delta).Wherein delta is added by first, second
Capacitor cell C0a and C0b determine, such as when the size of the first additional capacitor unit C0a and the first capacitance C1 are 100%,
The size 99% of second additional capacitor unit C0b and the first capacitance C1.With (+1+1+1+1+1+1+1) * (C1/C2)+(+1-
1+delta) * (C1/C2)=>Illustrate for (+7+delta) * (C1/C2).First, the first additional capacitor unit C0a is+1, can
It obtains and the ratio of the first capacitance size 100%；And the second additional capacitor unit C0b is -1+delta, be can be obtained and the first electricity
Hold the ratio 99% of size.In Fig. 6 A, the blank dotted line circle Dab of the second additional capacitor unit C0b indicates -1, the reality after diminution
Wire frame frame Byb is -1+delta, therefore the difference of the solid line circle Byb after diminution and dotted line circle Dab is preset capacitance
Difference delta；And the first capacitor cell C0a is+1, such as the circle Bya for filling up hatching of the first capacitor cell C0a in Fig. 6 A
It is+1.Then, when input code is 111, the first capacitor cell 1~7 be multiplied by reference voltage make every 1 first capacitor cell 1~
The charge of 7 storages is all+1, therefore, when switched-capacitor circuit 302a is operated, can generate the total of (+7+delta) * (C1/C2)
Charge value.Include the Dc bias Vop of opposite phase shift value using this total charge (+7+delta) * (C1/C2) available one
Or Von solves problem of the prior art using opposite phase shift value come error caused by compensating DC offset value.
The capacitance difference that the first, second additional capacitor unit C0a and C0b of embodiment of the present invention illustrated below are determined
The various ratio setting means of value delta.
One embodiment, as shown in Figure 6B, when between all capacitor cells of the first capacitance C1 without mismatch
(mismatch) problem needs not compensate for deviant at this time, can be by the capacitance of the first, second additional capacitor unit C0a and C0b
It is set as same size, the i.e. electricity of any capacitor cell of the capacitance of the first additional capacitor unit C0a equal to the first capacitance C1
Capacitance, the capacitance of the second additional capacitor unit C0b are also equal to the capacitance of any capacitor cell of the first capacitance C1.At this time
The second capacitance Y of the first capacitance X of one additional capacitor unit C0a and the second additional capacitor unit C0b are multiplied by positive ginseng respectively
The voltage difference X-Y=0 that examines voltage VRP (being assumed to be+1V) and negative reference voltage VRN (being assumed to be -1V) and can be subtracted each other,
It is equal to zero to obtain opposite phase shift value.
One embodiment, as shown in Figure 6 C, the value of the first additional capacitor unit C0a are equal to any capacitance of the first capacitance C1
The value of unit+capacitive differential delta is equal to Bya at solid line circle at dotted line circle as shown in the drawing after Daa+delta；And
The value of any capacitor cell of the value of second additional capacitor unit C0b equal to the first capacitance C1, solid line circle as shown in the drawing
At Byb.When switched-capacitor circuit switches over, the first capacitance X of the first additional capacitor unit C0a is multiplied by reference voltage
VRP (being assumed to be+1V) is equal to+1+delta, and the second capacitance Y of the second additional capacitor unit C0b is multiplied by negative reference voltage
VRN (being assumed to be -1V) is equal to -1, and the voltage difference X-Y that can be subtracted each other, as opposite phase shift value (+1+delta) -1=
delta.After opposite phase shift value is added in conversion equipment, control of the operational amplifier according to input code, it includes that reverse phase is inclined that can generate
Multiple total charges of shifting value, it is as follows：
(+1+1+1+1+1+1+1) * (C1/C2)+(+1+delta-1) * (C1/C2)=>(+7+delta)*(C1/C2)；
(+1+1+1+1+1+1-1) * (C1/C2)+(+1+delta-1) * (C1/C2)=>(+5+delta)*(C1/C2)；
(+1+1+1+1+1-1-1) * (C1/C2)+(+1+delta-1) * (C1/C2)=>(+3+delta)*(C1/C2)；
(+1+1+1+1-1-1-1) * (C1/C2)+(+1+delta-1) * (C1/C2)=>(+1+delta)*(C1/C2)；
(+1+1+1-1-1-1-1) * (C1/C2)+(+1+delta-1) * (C1/C2)=>(-1+delta)*(C1/C2)；
(+1+1-1-1-1-1-1) * (C1/C2)+(+1+delta-1) * (C1/C2)=>(-3+delta)*(C1/C2)；
(+1-1-1-1-1-1-1) * (C1/C2)+(+1+delta-1) * (C1/C2)=>(-5+delta)*(C1/C2)；
(- 1-1-1-1-1-1-1) * (C1/C2)+(+1+delta-1) * (C1/C2)=>(-7+delta)*(C1/C2).
In another embodiment, the number of the additional capacitor unit of embodiment of the present invention is not limited to two additional capacitor lists
Member, can be it is above-mentioned multiple, for example, six, then capacitance deviant can be：
[(+1)+(-1+delta1)+(1+delta2)+(-1+delta3)+(1+delta4)+(-1+delta5)]*C1
=(delta1+delta2+delta3+delta4+delta5) * C1.
Furthermore, the capacitive differential that capacitance deviant or opposite phase shift value can be between multiple additional capacitor units
Deviant caused by the various combination of (delta1~delta5).The mode of one embodiment, compensating DC offset value can root
According to multiple ratio values between the switching and multiple additional capacitor units and any capacitor cell of the first capacitance C1 of switching circuit
Or the capacitive differential between multiple additional capacitor units carrys out compensating DC offset value.Multiple ratio values can be, for example, one first is attached
Add one first ratio value of any capacitor cell of capacitor cell C0a and the first capacitance C1, one second additional capacitor unit C0b with
One second ratio value of any capacitor cell of the first capacitance C1, a third additional capacitor unit C0c (not shown) and first
One third ratio value of any capacitor cell of capacitance C1.It should be noted that the number of additional capacitor unit can be adjusted according to demand.
It may be noted that the value of above-mentioned reference voltage VRP and negative reference voltage VRN can be other numerical value, it is not limited to above-mentioned+1
With -1.And the ratio of additional capacitor unit can also arbitrarily be adjusted according to demand, such as be preset as 102% and 98% the first capacitance
The size of any capacitor cell of C1, and it is not limited to the size setting ratio according to the first capacitance.
Fig. 7 shows that a kind of offer deviant of an embodiment of the present invention includes following step in the method for conversion equipment
Suddenly：
Step S702：Start.
Step S704：A switching circuit is provided, it includes multiple switches.
Step S706：One first capacitance is utilized to store one first charge value to generate always according to the switching of switching circuit
Bias is flowed, wherein the first capacitance includes multiple first capacitor cells, Dc bias includes a DC offset value, direct current offset
Value is generated due to being mismatched between multiple first capacitor cells.
Step S708：According to the switching of switching circuit and one first additional capacitor unit and one second additional capacitor unit
Between a capacitive differential carry out compensating DC offset value.
Step S710：Terminate.
In conclusion the conversion equipment of embodiment of the present invention, utilizes the capacitive differential system between multiple additional capacitor units
Multiple minimum opposite phase shift values are produced, to generate the reverse compensation deviant of compensation script circuit direct bias, and can be solved
The unmatched problem of prior art conversion equipment capacitance.
Though illustrating the present invention above with embodiment, the scope of the present invention is not therefore limited, without departing from this hair
Bright main idea, various modifications or change which carries out each fall within the claim of the present invention.
【Symbol description】
100a, 100b, 300,300a, 300b conversion equipment
100a1 loop filters
100a2 quantizers
100a3 converters
100b1,301 amplifiers
302a, 302b circuit
302a1,302b1 additional capacitor unit
302a2,302b2 switched-capacitor circuit
C0a, C0b, C1, C2 capacitance.
Claims (12)
1. a kind of conversion equipment, includes：
One switching circuit includes multiple switch；
One first capacitance, to store one first charge value according to the switching of the switching circuit；
Multiple additional capacitor units, including one first additional capacitor unit and one second additional capacitor list with a capacitive differential
Member, to store polarity one second charge value and a third charge of different sizes respectively according to the switching of the switching circuit
Value；And
One operational amplifier generates a Dc bias according to first charge value, and the Dc bias includes that a direct current is inclined
Shifting value, the operational amplifier also generate a reverse phase direct current offset according to the difference of second charge value and the third charge
Value, to compensate the DC offset value.
2. the apparatus according to claim 1, wherein first capacitance includes multiple first capacitor cells, wherein institute
The capacitance for stating the first additional capacitor unit is less than the capacitance of first capacitor cell, the second additional capacitor unit
Capacitance is not less than the capacitance of first capacitor cell.
3. the apparatus according to claim 1, wherein first capacitance includes multiple first capacitor cells, described straight
Flowing deviant is generated due to being mismatched between the multiple first capacitor cell.
4. the apparatus according to claim 1, first capacitance includes multiple first capacitor cells, wherein described in one
First additional capacitor unit and first capacitor cell have one first ratio value, and the second additional capacitor unit
There is one second ratio value with first capacitor cell, the operational amplifier is according to first ratio value and described the
The difference of two ratio values compensates the DC offset value.
5. a kind of conversion equipment, includes:
One operational amplifier, to generate a Dc bias；
One first capacitance includes multiple first capacitor cells, and to generate one first charge value, first charge value has
One charge error value, wherein at least 1 first capacitor cell have a capacitance error value, the charge error value with it is described
Capacitance error value is related；
One first additional capacitor unit, to store a positive charge values；
One second additional capacitor unit, to store a negative electricity charge values, wherein the positive charge values have with the negative electricity charge values
One charge difference；And
Wherein, the operational amplifier generates described straight according to first charge value, the positive charge values, the negative electricity charge values
Bias is flowed, and the charge difference is compensating the charge error value.
6. device according to claim 5 also includes multiple switch, the multiple switch is to according to first frequency letter
Number switch first capacitance, the first additional capacitor unit and the second additional capacitor list with a second frequency signal
Member carries out charge and discharge.
7. device according to claim 5, wherein the first additional capacitor unit and the second additional capacitor unit
With a capacitive differential, and the operational amplifier compensates the charge error value according to the capacitive differential.
8. device according to claim 5, wherein the first additional capacitor unit and first capacitor cell have
There is one first ratio value, the second additional capacitor unit and first capacitor cell have one second ratio value, described
First ratio value and second ratio value are of different sizes, and the operational amplifier is according to first ratio value and described second
The difference of ratio value compensates the charge error value.
9. a kind of method of compensation conversion equipment deviant, including：
A switching circuit is provided, it includes multiple switches；
Utilize one first capacitance, one first charge value of storage to generate a Dc bias according to the switching of the switching circuit,
In, first capacitance includes multiple first capacitor cells, and the Dc bias includes a DC offset value, the direct current
Deviant is generated due to being mismatched between the multiple first capacitor cell；And
According to one between the switching of the switching circuit and one first additional capacitor unit and one second additional capacitor unit
Capacitive differential compensates the DC offset value.
10. according to the method described in claim 9, wherein, the capacitance of the first additional capacitor unit is more than described first
The capacitance of capacitor cell, the capacitance of the second additional capacitor unit are not more than the capacitance of first capacitor cell.
11. according to the method described in claim 9, wherein, the first additional capacitor unit and first capacitor cell
With one first ratio value, and the second additional capacitor unit and first capacitor cell have one second ratio value,
The step of compensating the DC offset value include：
The DC offset value is compensated according to the difference of first ratio value and second ratio value.
12. according to the method for claim 11, wherein the step of compensating the DC offset value also include：
According to 1 between the switching of the switching circuit and a third additional capacitor unit and first capacitor cell
Three ratio values compensate the DC offset value.
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| CN107452417B (en) * | 2016-06-01 | 2021-02-19 | 瑞昱半导体股份有限公司 | Data processing circuit and data processing method |
| CN107889004A (en) * | 2016-09-29 | 2018-04-06 | 联芯科技有限公司 | Suppress the circuit and method of noise of blasting |
| CN111510143A (en) * | 2020-04-03 | 2020-08-07 | 四川知微传感技术有限公司 | Front-end circuit for direct conversion from capacitance to digital quantity |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7095350B2 (en) * | 2004-06-23 | 2006-08-22 | Semiconductor Technology Academic Research Center | DA converter circuit provided with DA converter of segment switched capacitor type |
| CN101282120A (en) * | 2007-04-05 | 2008-10-08 | 中国科学院微电子研究所 | Multiplication digital-to-analog conversion circuit and application thereof |
| CN102685050A (en) * | 2011-03-17 | 2012-09-19 | 鸿富锦精密工业（深圳）有限公司 | Direct-current offset calibration circuit |
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2014
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7095350B2 (en) * | 2004-06-23 | 2006-08-22 | Semiconductor Technology Academic Research Center | DA converter circuit provided with DA converter of segment switched capacitor type |
| CN101282120A (en) * | 2007-04-05 | 2008-10-08 | 中国科学院微电子研究所 | Multiplication digital-to-analog conversion circuit and application thereof |
| CN102685050A (en) * | 2011-03-17 | 2012-09-19 | 鸿富锦精密工业（深圳）有限公司 | Direct-current offset calibration circuit |
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