CN104779152A - Polysilicon etching method - Google Patents
Polysilicon etching method Download PDFInfo
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- CN104779152A CN104779152A CN201510185977.XA CN201510185977A CN104779152A CN 104779152 A CN104779152 A CN 104779152A CN 201510185977 A CN201510185977 A CN 201510185977A CN 104779152 A CN104779152 A CN 104779152A
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- etching
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- polycrystalline silicon
- radio frequency
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- 238000000034 method Methods 0.000 title claims abstract description 108
- 238000005530 etching Methods 0.000 title claims abstract description 89
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 79
- 229920005591 polysilicon Polymers 0.000 title claims abstract description 50
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 239000004065 semiconductor Substances 0.000 claims abstract description 43
- 229920000642 polymer Polymers 0.000 claims abstract description 31
- 238000001020 plasma etching Methods 0.000 claims abstract description 26
- 230000007547 defect Effects 0.000 claims abstract description 13
- 238000001035 drying Methods 0.000 claims description 41
- 239000012159 carrier gas Substances 0.000 claims description 30
- 239000007789 gas Substances 0.000 claims description 29
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 16
- 239000010703 silicon Substances 0.000 claims description 16
- 229910052710 silicon Inorganic materials 0.000 claims description 15
- CPELXLSAUQHCOX-UHFFFAOYSA-N Hydrogen bromide Chemical compound Br CPELXLSAUQHCOX-UHFFFAOYSA-N 0.000 claims description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 229910000042 hydrogen bromide Inorganic materials 0.000 claims description 6
- 235000012239 silicon dioxide Nutrition 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- 239000001307 helium Substances 0.000 claims description 4
- 229910052734 helium Inorganic materials 0.000 claims description 4
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- 101100373011 Drosophila melanogaster wapl gene Proteins 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 3
- 210000004483 pasc Anatomy 0.000 claims description 3
- AIFMYMZGQVTROK-UHFFFAOYSA-N silicon tetrabromide Chemical compound Br[Si](Br)(Br)Br AIFMYMZGQVTROK-UHFFFAOYSA-N 0.000 claims description 3
- 239000000725 suspension Substances 0.000 abstract description 2
- 230000003287 optical effect Effects 0.000 description 4
- 229910003691 SiBr Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 208000027418 Wounds and injury Diseases 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 208000014674 injury Diseases 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Plasma & Fusion (AREA)
- Ceramic Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The invention discloses a polysilicon etching method. The polysilicon etching method comprises the following steps as follows: sequentially forming a first medium layer and a polysilicon layer on the surface of a semiconductor substrate; by a dry plasma etching process, etching the polysilicon layer; in the same etching cavity, performing a dry treating process in which through plasma, a polymer is enabled to keep a suspension state and be discharged out of the etching cavity. By the polysilicon etching method, after polysilicon etching, spherical defects formed on the surface of the semiconductor substrate can be reduced or eliminated, so that the qualified rate of products is improved.
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuit method of manufacturing technology, particularly relate to a kind of polycrystalline silicon etching method.
Background technology
In semiconductor integrated circuit manufactures, often need to etch polysilicon, as in the forming process of the trench gate of groove power MOSET, after formation gate groove, need to fill polysilicon in gate groove, and the Semiconductor substrate that also can be formed at the while of polysilicon outside gate groove is as surface of silicon, at this moment needs to adopt dry plasma etching process to etch to remove the polysilicon of surface of silicon to polysilicon, and form trench gate by the polysilicon remained in gate groove.
Existing dry plasma etching process adopts hydrogen bromide (HBr) as etching gas usually, because HBr has higher Selection radio as can up to more than 400 to silicon and silicon dioxide, such ratio is easier to polysilicon to remove separately, and silicon dioxide is then as the terminal of etching.
But in actual production process, existing polycrystalline silicon etching method often produces more ball defects (Ball Defect) at semiconductor substrate surface, as shown in Figure 1A, it is the optical photograph of surface of silicon after existing polycrystalline silicon etching method completes, Figure 1A distributed the stain that numerous stain marks as 101b, and these stains should not exist under normal circumstances; As shown in Figure 1B, be the photo that a ball defects 101b of surface of silicon in Figure 1A is amplified.Ball defects 101b Producing reason is that the polymer (Polymer) formed in existing etching polysilicon residues in surface of silicon formation, in existing polycrystalline silicon etching method, the general HBr that adopts is as etching gas, form the polymer that more main component is SiBr after etch polysilicon, this attachment of polymers forms ball defects 101b after surface of silicon.
As shown in Fig. 2 A to Fig. 2 C, it is device profile schematic diagram in existing polycrystalline silicon etching method; For the etching polysilicon in the forming process of the trench gate of groove power MOSET, existing polycrystalline silicon etching method comprises the steps:
First, on the surface of the silicon substrate 102 being formed with gate groove form dielectric layer successively as silicon dioxide layer 103 and polysilicon layer 104, polysilicon layer 104 requires to fill the gate groove that inner surface is coated with dielectric layer 103 completely.
Secondly, carry out dry plasma to polysilicon layer 104, need to adopt RF radio frequency source and carrier gas to form plasma (Plasma) 105, adopt etching gas to realize etching, etching gas adopts HBr usually; In etching process except polysilicon is etched, also can produce polymer 106, polymer 106 forms primarily of SiBr; The gas of gas from the side of cavity enters i.e. Fig. 2 B enters (gas in), and reacted residue or product are from air scavenge (Residue/resultant gas out) after the reaction shown in the opposite side eliminating of cavity and Fig. 2 B.
Finally, as shown in Figure 2 C, after etching terminates, polymer 106 is not drained only, and the surface being also dielectric layer 103 at silicon substrate 102 can form polymer 101c.
Polymer 101c can inject (body II) to follow-up tagma and certain barrier effect is caused in source region injection (source II), finally causes the reduction of yield.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of polycrystalline silicon etching method, and the ball defects formed at semiconductor substrate surface after reducing or eliminating etching polysilicon, improves product yield.
Entrust for solving above-mentioned technology, polycrystalline silicon etching method provided by the invention comprises the steps:
Step one, on semiconductor substrate surface, form first medium layer and polysilicon layer successively.
Step 2, dry plasma etching process is adopted to etch described polysilicon layer, described dry plasma etching process condition comprises: RF radio frequency source, etching gas and carrier gas, plasma is produced by described RF radio frequency source and the described carrier gas flow in etching cavity and described etching gas, the etch rate of described etching gas to described polysilicon layer is utilized to be greater than the etching completely realizing the described polysilicon layer on described semiconductor substrate surface to the characteristic of the etch rate of described first medium layer, also polymer can be formed when described etching gas and described pasc reaction.
Step 3, in identical described etching cavity, dry process technique is carried out to after the etching completely of the described polysilicon layer on described semiconductor substrate surface, described dry process process conditions comprise: RF radio frequency source and carrier gas and do not comprise etching gas in described dry process technique, continue to export from described dry plasma etching process to RF radio frequency source described in the process of described dry process technique, described RF radio frequency source and described carrier gas is utilized to make plasma continue to produce, the described polymer utilizing plasma to make to produce in described dry plasma etching process keeps suspended state, described carrier gas is utilized to take out of outside described etching cavity by the described polymer being in suspended state, described attachment of polymers is avoided to form ball defects at described semiconductor substrate surface.
Further improvement is, Semiconductor substrate described in step one is for the formation of groove power MOSET, before the described first medium layer of formation, gate groove is formed in described Semiconductor substrate, described first medium layer and described polysilicon layer are except being formed at except on described semiconductor substrate surface, described first medium layer is also formed at bottom surface and the side of described gate groove, the described gate groove being formed with described first medium layer is filled by described polysilicon layer completely, step 2 forms described trench gate to after the etching completely of the described polysilicon layer on described semiconductor substrate surface by the described polysilicon layer be filled in described gate groove.
Further improvement is, described Semiconductor substrate is silicon substrate.
Further improvement is, the material of described first medium layer is silicon dioxide.
Further improvement is, described etching gas comprises hydrogen bromide.
Further improvement is; the power of the RF radio frequency source that described dry process technique adopts can be equal to or less than the RF radio frequency source of described dry plasma etching process; under ensureing to make plasma continue the condition produced, the protection on the lower surface to described Semiconductor substrate of power of the RF radio frequency source that described dry process technique adopts is better.
Further improvement is, the RF radio frequency source that described dry process technique adopts comprises top RF and bottom RF, and the protection on the lower surface to described Semiconductor substrate of bottom RF power of described dry process technique is better.
Further improvement is, the carrier gas of the carrier gas that described dry process technique adopts and described dry plasma etching process can be identical or different, under ensureing to make plasma continue the condition produced, the speed that the larger described polymer of flow of the carrier gas that described dry process technique adopts is removed is faster.
Further improvement is, the carrier gas that described dry process technique adopts comprises helium and oxygen.
Further improvement is, described polymer comprises silicon bromide.
Further improvement is, described in step 2, dry plasma etching process condition also comprises vacuum pressure and time; The process conditions of dry process described in step 3 also comprise vacuum pressure and time.
The present invention by increasing by a step dry process technique after dry plasma etching process, the continuation of RF radio frequency source is kept between dry process technique and dry plasma etching process, make to maintain plasma in etching cavity always, the polymer formed in dry plasma etching process is made to keep suspended state by plasma, and be discharged to outside etching cavity by the polymer of suspension by the energy of flow of carrier gas, so the present invention can avoid attachment of polymers to form ball defects to semiconductor substrate surface; No longer comprise etching gas in dry process technique of the present invention simultaneously, etching gas can be avoided the injury of semiconductor surface, make semiconductor surface obtain good protection, finally can improve the yield of product.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation:
Figure 1A is the optical photograph of surface of silicon after existing polycrystalline silicon etching method completes;
Figure 1B is the photo amplified a ball defects of surface of silicon in Figure 1A;
Fig. 2 A-Fig. 2 C is device profile schematic diagram in existing polycrystalline silicon etching method;
Fig. 3 is the flow chart of embodiment of the present invention polycrystalline silicon etching method;
Fig. 4 is the optical photograph of surface of silicon after embodiment of the present invention polycrystalline silicon etching method completes.
Embodiment
As shown in Figure 3, be the flow chart of embodiment of the present invention polycrystalline silicon etching method; Embodiment of the present invention polycrystalline silicon etching method comprises the steps:
Step one, on semiconductor substrate surface, form first medium layer and polysilicon layer successively.
To form groove power MOSET, described Semiconductor substrate is for the formation of groove power MOSET, before the described first medium layer of formation, gate groove is formed in described Semiconductor substrate, described first medium layer and described polysilicon layer are except being formed at except on described semiconductor substrate surface, described first medium layer is also formed at bottom surface and the side of described gate groove, and the described gate groove being formed with described first medium layer is filled by described polysilicon layer completely.Be preferably, described Semiconductor substrate is silicon substrate.The material of described first medium layer is silicon dioxide.
Step 2, employing dry plasma etching process etch described polysilicon layer, and described dry plasma etching process condition comprises: RF radio frequency source, etching gas and carrier gas, can also comprise vacuum pressure and time; Plasma is produced by described RF radio frequency source and the described carrier gas flow in etching cavity and described etching gas, utilize the etch rate of described etching gas to described polysilicon layer to be greater than the etching completely realizing the described polysilicon layer on described semiconductor substrate surface to the characteristic of the etch rate of described first medium layer, when described etching gas and described pasc reaction, also can form polymer.
Described trench gate is formed by the described polysilicon layer be filled in described gate groove to after the etching completely of the described polysilicon layer on described semiconductor substrate surface.Be preferably, described etching gas comprises hydrogen bromide.
Step 3, to the described polysilicon layer on described semiconductor substrate surface completely etching after in identical described etching cavity, carry out dry process technique, described dry process process conditions comprise: RF radio frequency source and carrier gas and do not comprise etching gas in described dry process technique, can also comprise vacuum pressure and time; Continue to export from described dry plasma etching process to RF radio frequency source described in the process of described dry process technique, described RF radio frequency source and described carrier gas is utilized to make plasma continue to produce, the described polymer utilizing plasma to make to produce in described dry plasma etching process keeps suspended state, utilize described carrier gas to be taken out of outside described etching cavity by the described polymer being in suspended state, avoid described attachment of polymers to form ball defects at described semiconductor substrate surface.Described polymer comprises silicon bromide.
The power of the RF radio frequency source that described dry process technique adopts can be equal to or less than the RF radio frequency source of described dry plasma etching process; under ensureing to make plasma continue the condition produced, the protection on the lower surface to described Semiconductor substrate of power of the RF radio frequency source that described dry process technique adopts is better.Further, the RF radio frequency source that described dry process technique adopts comprises top RF and bottom RF, and the protection on the lower surface to described Semiconductor substrate of bottom RF power of described dry process technique is better.
The carrier gas of the carrier gas that described dry process technique adopts and described dry plasma etching process can be identical or different, under ensureing to make plasma continue the condition produced, the speed that the larger described polymer of flow of the carrier gas that described dry process technique adopts is removed is faster.
The carrier gas that described dry process technique adopts comprises helium and oxygen.
The process conditions of the dry process technique of the embodiment of the present invention specifically can adopt the condition as shown in following table one:
Table one
| Pressure (millitorr) | 12 to 18 |
| Top RF(W) | 300 to 400 |
| Bottom RF(V) | -22 to-28 |
| O2(sccm) | 50 |
| He(sccm) | 150 |
| Time (second) | 10 to 20 |
Wherein Pressure represents vacuum pressure, and Top RF represents top RF radio frequency, and Bottom RF represents bottom RF radio frequency, and Time represents the time, and sccm is gas flow unit, Chinese be standard milliliters/minute.
As shown in Figure 4, be the optical photograph of surface of silicon after embodiment of the present invention polycrystalline silicon etching method completes, compare Figure 1A and Fig. 4 known, after embodiment of the present invention etching polysilicon, no longer include ball defects and remain, so can product yield be improved.
Above by specific embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (13)
1. a polycrystalline silicon etching method, is characterized in that, comprises the steps:
Step one, on semiconductor substrate surface, form first medium layer and polysilicon layer successively;
Step 2, dry plasma etching process is adopted to etch described polysilicon layer, described dry plasma etching process condition comprises: RF radio frequency source, etching gas and carrier gas, plasma is produced by described RF radio frequency source and the described carrier gas flow in etching cavity and described etching gas, the etch rate of described etching gas to described polysilicon layer is utilized to be greater than the etching completely realizing the described polysilicon layer on described semiconductor substrate surface to the characteristic of the etch rate of described first medium layer, also polymer can be formed when described etching gas and described pasc reaction,
Step 3, in identical described etching cavity, dry process technique is carried out to after the etching completely of the described polysilicon layer on described semiconductor substrate surface, described dry process process conditions comprise: RF radio frequency source and carrier gas and do not comprise etching gas in described dry process technique, continue to export from described dry plasma etching process to RF radio frequency source described in the process of described dry process technique, described RF radio frequency source and described carrier gas is utilized to make plasma continue to produce, the described polymer utilizing plasma to make to produce in described dry plasma etching process keeps suspended state, described carrier gas is utilized to take out of outside described etching cavity by the described polymer being in suspended state, described attachment of polymers is avoided to form ball defects at described semiconductor substrate surface.
2. polycrystalline silicon etching method as claimed in claim 1, it is characterized in that: Semiconductor substrate described in step one is for the formation of groove power MOSET, before the described first medium layer of formation, gate groove is formed in described Semiconductor substrate, described first medium layer and described polysilicon layer are except being formed at except on described semiconductor substrate surface, described first medium layer is also formed at bottom surface and the side of described gate groove, the described gate groove being formed with described first medium layer is filled by described polysilicon layer completely, step 2 forms described trench gate to after the etching completely of the described polysilicon layer on described semiconductor substrate surface by the described polysilicon layer be filled in described gate groove.
3. polycrystalline silicon etching method as claimed in claim 1 or 2, is characterized in that: described Semiconductor substrate is silicon substrate.
4. polycrystalline silicon etching method as claimed in claim 1 or 2, is characterized in that: the material of described first medium layer is silicon dioxide.
5. polycrystalline silicon etching method as claimed in claim 1 or 2, is characterized in that: described etching gas comprises hydrogen bromide.
6. polycrystalline silicon etching method as claimed in claim 1 or 2; it is characterized in that: the power of the RF radio frequency source that described dry process technique adopts can be equal to or less than the RF radio frequency source of described dry plasma etching process; under ensureing to make plasma continue the condition produced, the protection on the lower surface to described Semiconductor substrate of power of the RF radio frequency source that described dry process technique adopts is better.
7. polycrystalline silicon etching method as claimed in claim 6; it is characterized in that: the RF radio frequency source that described dry process technique adopts comprises top RF and bottom RF, and the protection on the lower surface to described Semiconductor substrate of bottom RF power of described dry process technique is better.
8. polycrystalline silicon etching method as claimed in claim 1 or 2, is characterized in that: the RF radio frequency source that described dry process technique adopts comprises top RF and bottom RF.
9. polycrystalline silicon etching method as claimed in claim 1 or 2, it is characterized in that: the carrier gas of the carrier gas that described dry process technique adopts and described dry plasma etching process can be identical or different, under ensureing to make plasma continue the condition produced, the speed that the larger described polymer of flow of the carrier gas that described dry process technique adopts is removed is faster.
10. polycrystalline silicon etching method as claimed in claim 1 or 2, is characterized in that: the carrier gas that described dry process technique adopts comprises helium and oxygen.
11. polycrystalline silicon etching methods as claimed in claim 9, is characterized in that: the carrier gas that described dry process technique adopts comprises helium and oxygen.
12. polycrystalline silicon etching methods as claimed in claim 5, is characterized in that: described polymer comprises silicon bromide.
13. polycrystalline silicon etching methods as claimed in claim 1 or 2, is characterized in that: described in step 2, dry plasma etching process condition also comprises vacuum pressure and time; The process conditions of dry process described in step 3 also comprise vacuum pressure and time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510185977.XA CN104779152A (en) | 2015-04-17 | 2015-04-17 | Polysilicon etching method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510185977.XA CN104779152A (en) | 2015-04-17 | 2015-04-17 | Polysilicon etching method |
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| CN104779152A true CN104779152A (en) | 2015-07-15 |
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| CN201510185977.XA Pending CN104779152A (en) | 2015-04-17 | 2015-04-17 | Polysilicon etching method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111524802A (en) * | 2020-04-30 | 2020-08-11 | 华虹半导体(无锡)有限公司 | Polysilicon gate etching method for MOS device with SGT structure |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6124212A (en) * | 1997-10-08 | 2000-09-26 | Taiwan Semiconductor Manufacturing Co. | High density plasma (HDP) etch method for suppressing micro-loading effects when etching polysilicon layers |
| CN1851874A (en) * | 2005-12-08 | 2006-10-25 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Polycrystalline silicon gate grid etching process for reducing particle generation |
| CN101303966A (en) * | 2007-05-10 | 2008-11-12 | 中芯国际集成电路制造(上海)有限公司 | Method for removing residual polyalcohol after etching and method for forming etching structure |
-
2015
- 2015-04-17 CN CN201510185977.XA patent/CN104779152A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6124212A (en) * | 1997-10-08 | 2000-09-26 | Taiwan Semiconductor Manufacturing Co. | High density plasma (HDP) etch method for suppressing micro-loading effects when etching polysilicon layers |
| CN1851874A (en) * | 2005-12-08 | 2006-10-25 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Polycrystalline silicon gate grid etching process for reducing particle generation |
| CN101303966A (en) * | 2007-05-10 | 2008-11-12 | 中芯国际集成电路制造(上海)有限公司 | Method for removing residual polyalcohol after etching and method for forming etching structure |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111524802A (en) * | 2020-04-30 | 2020-08-11 | 华虹半导体(无锡)有限公司 | Polysilicon gate etching method for MOS device with SGT structure |
| CN111524802B (en) * | 2020-04-30 | 2022-10-04 | 华虹半导体(无锡)有限公司 | Polysilicon gate etching method for MOS device with SGT structure |
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Application publication date: 20150715 |