CN1047469C - Technology for producing lateral current limiting structure of semiconductor mesa - Google Patents
Technology for producing lateral current limiting structure of semiconductor mesa Download PDFInfo
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- CN1047469C CN1047469C CN96109615A CN96109615A CN1047469C CN 1047469 C CN1047469 C CN 1047469C CN 96109615 A CN96109615 A CN 96109615A CN 96109615 A CN96109615 A CN 96109615A CN 1047469 C CN1047469 C CN 1047469C
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Abstract
The present invention relates to technology for making a lateral current limiting structure of a semiconductor mesa. After a substrate grows materials required by an upper object device, the substrate is eroded or sculptured into the mesa, a secondary epitaxial layer that vapor phase epitaxial growth containing a clogging layer is adopted, partial clogging layer corresponding to the upper part of the mesa is then dug through, and a third-time epitaxial layer is grown. Because growth technology with a mask in the prior art is avoided, a method is suitable for various substrates, a technological process is easy to control, technological admittance is large, and good device performance can be obtained.
Description
The present invention relates to material growth and element manufacturing technology in semiconductor device design and the manufacturing process.
So-called table top lateral current limiting structure is meant a kind of like this structure, after the material of target devices requirement of having grown on the substrate, after corrosion or etching, make this material layer on substrate, become table top, growth then contains the secondary epitaxy layer of blocking layer, finally make electric current to pass through perpendicular to the direction of table top on the edge, zone of aforementioned table top correspondence, zone beyond table top then is restricted, the material of this structure can be used for making multiple semiconductor device such as laser, the method of extension is adopted in the growth of semi-conducting material usually, as vapour phase epitaxy (Vapor Phase Epitaxy, VPE), liquid phase epitaxy (Liquid Phase Epitaxy, LPE), the metallo-organic compound chemical vapor deposition (Metal-Organic-Chemical-Vapor-Deposition, MOCVD) etc.
The technology that is used to make table top lateral current limiting structure at present mainly is P type substrate plane hole underground layering type (P-MOVCD-Buried-Heterostructure; P-MBH) technology; the content of P-MBH technology is such; as shown in Figure 1; epitaxial loayer 2 of epitaxial growth on backing material 11; requirement according to target devices; this epitaxial loayer 2 can comprise resilient coating; active layer and protective layer etc. are made silicon oxide masking film layer 3 again, form the structure of Fig. 1 a; make epitaxial loayer 2 and mask layer 3 become a cap shape table top by corrosion; as Fig. 1 b, the shape of table top, the i.e. vertical view of Fig. 1 b; different because of requirement on devices, can be bar shaped; different shapes such as circle.Carry out the epitaxial growth second time then, growth has the secondary epitaxy layer 4 of blocking layer, and the effect of blocking layer is to stop electric current to pass through.As Fig. 1 C, because the characteristic of silica, material can't be grown at silicon oxide surface, so mask layer still is exposed.Remove the structure that mask layer forms Fig. 1 d with hydrofluoric acid corrosion oxidation silicon, carry out epitaxial growth for the third time again, form the table top lateral current limiting structure shown in Fig. 1 e.
There is following shortcoming in this method, one, since Physical Mechanism on, it is only applicable to the P-type material substrate; Two, Fu Shi table top will have strict size, makes the side of described table top expose the high index crystal face of specific strictness, just can carry out next step material growth; Three, in the described secondary epitaxy layer P-type material and n type material are arranged, in the process of growth secondary epitaxy layer, must rely on the control of growth temperature and growth time, make the diffusion of the charge carrier in the P-type material in the zone of closing on table top, make the n type material transoid, and the control of this diffusion is the comparison difficulty; Four, the making of silicon oxide masking film and to peel off be necessary process steps, and the silica on 31 First Five-Year Plan compounds of group, especially surface of indium phosphide is difficult to thoroughly peel off clean, brings difficulty to regrowth, and influences the performance of resulting devices.
The object of the present invention is to provide a kind of growth course to be easy to the better new method of performance of the structure controlling and make, be used to make table top lateral current limiting structure.
The present invention realizes like this.The first step is carried out the epitaxial growth first time on backing material, grow epitaxial loayer one time, and the composition of this epitaxial loayer is that the requirement by target devices decides.In second step, this epitaxial loayer is corroded or is etched into the table top of the desired shape of target devices.The 3rd step, carry out secondary epitaxy, growth comprises the secondary epitaxy layer of blocking layer on table top substrate all around and above the table top, in the epitaxial process not with the silica of using as mask, because LPE and MOCVD have the characteristic of the growth selected, substrate and table top extend along the direction of growth in secondary epitaxy growth back, make the shape before table top behind the secondary epitaxy keeps secondary epitaxy, clear-cut.The 4th step, adopt common alignment process, identical with described mesa shape in the secondary epitaxy layer, area are equated, and vertically dig up corresponding to the part of table top top, table top is exposed again, do not dug around the table top and the part of secondary epitaxy layer then keep, can keep above table top in one deck secondary epitaxy layer does not influence the material that electric current passes through yet.Because table top behind the secondary epitaxy and original mesa shape are much at one and clear-cut, thereby can aim at the border of table top easily when doing alignment process, be easy to accomplish so dig this step of the blocking layer of wearing in the secondary epitaxy layer.Carry out epitaxial growth for the third time at last again, grow the depression that previous step can be dug out suddenly and fill and lead up and form and have certain thickness layer of material, thereby finish the making of table top lateral current limiting structure.
Compared with prior art, method of the present invention has following advantage.One, since for the second time extension do not require that the side of table top must be strict high index crystal face, thereby mesa etch technology is simple; Two, owing to do not require that the charge carrier in the foregoing P-type material diffuses to the problem that makes the n type material transoid in the n type material, some reasons on the physical mechanism in addition, method of the present invention all is suitable for for N type, P type, semi-insulating and high resistant substrate; Three, process allowances such as the thickness of etched mesa size, blocking layer, epitaxial layer concentration are bigger, are easy to control; Four, owing to having saved masking process, having eliminated the harmful effect that brings because of masking process, so the performance of device is better to device performance; When five, peeling off because of silica, shell totally sometimes, but stripping is unclean sometimes, and this method has been avoided the use of silica, has improved rate of finished products.
The invention will be further described below in conjunction with accompanying drawing.
Fig. 1 prior art schematic diagram
Fig. 2 method schematic diagram of the present invention
The table top lateral current limiting structure of Fig. 3 one embodiment of the present of invention
Among the figure, 1. can be the substrate of P-type material or n type material or semi insulating material or highly resistant material; 2. epitaxial loayer 3. silicon oxide masking film 4. contain the secondary epitaxy layer of blocking layer;
5. three epitaxial loayers; 11.P type substrate 21.N type InP substrate
22.InGaAsP mixed crystal material
24. comprise the secondary epitaxy layer of the blocking layer that becomes by a plurality of P N roped parties;
25. comprise three epitaxial loayers of contact electrode layer;
41.P type InP material; 42.InGaAsP material;
43.N type InP material; 44.InGaAsP material;
51.P type InP material; 52.P type contact electrode layer
The process of making lateral current limiting structure of semiconductor mesa of method of the present invention is such: The first step is in the contrast 1 that can be P-type material or n type material or semi insulating material or high resistance material On carry out the extension first time, the extension layer 2 of growing a time, the composition of this extension layer 2 is according to target The requirement of device can comprise buffering layer and active layer etc., shown in Fig. 2 a; Second step will be once The part of extension layer 2 is corroded into and is etched away, and makes the part of reservation become a table top at substrate, The shape of table top also is that the requirement by target devices decides, shown in Fig. 2 b; The 3rd step, profit With gas phase epitaxy method or metal organic chemical vapor deposition (mocvd) method around the table top 2 and above growth Contain the secondary epitaxy layer 4 that blocks layer, shown in Fig. 4 c, obstruction layer wherein can be high resistance The layer, also can be semi-insulating layer, can also be the PN junction of reverse operation; In the 4th step, adopt alignment Technology equates identical with table top 2 shapes in the secondary epitaxy layer 4, area and vertical corresponding to table top The part of 2 tops is dug up, and table top 2 is exposed again, and do not dug around the table top 2 and secondary outside Prolong layer 4 part and then keep, also can above table top 2, keep in one layer of secondary epitaxy layer 4 not shadow Ring the material that electric current passes through, shown in Fig. 2 d; In the 5th step, carry out for the third time epitaxial growth, growth Three extension layers 5, and make three extension layers 5 can fill and lead up that the part secondary epitaxy causes owing to excavating Depression also has certain thickness, and shown in Fig. 2 e, carrying out for the third time, the method for extension can be gas phase Extension also can be used liquid phase extension or other epitaxy method.
In one embodiment of the invention, as shown in Figure 3, as shown in Figure 3, the substrate that is adopted is a N type InP substrate 21, one time epitaxial loayer is made of InGaAsP mixed crystal material 22, secondary epitaxy grows the secondary epitaxy layer 24 that comprises the blocking layer of being made up of a plurality of PN junctions, and it comprises P type InP material 41, InGaAsP material 42, N type InP material 43, InGaAsP material 44, and the n type material 43 here serves as the effect of blocking layer; After adopting alignment process partly to dig corresponding to the blocking layer above the table top 22 in secondary epitaxy layer 24 to wear, to carry out epitaxial growth for the third time and go out epitaxial loayer 25 three times, it is made of P type InP material 51 and P type contact electrode layer 52.
The InGaAsP/InP table top lateral current limiting structure made from composition can be used for making the InGaAsP/InP laser as stated above, and this laser can hang down threshold value work and obtain high linear power output.
Claims (10)
1. a method of making lateral current limiting structure of semiconductor mesa comprises first step, on backing material, carry out the epitaxial growth first time, grow the desired epitaxial loayer of target devices, it is characterized in that, it also contains the following step: in second step, a described epitaxial loayer is corroded or be etched into the table top of the desired shape of target devices; The 3rd step, adopt vapour phase epitaxy method or metal organic chemical vapor deposition (mocvd) method to carry out the epitaxial growth second time, growth comprises the secondary epitaxy layer of blocking layer on described table top substrate all around and above the table top; The 4th step, adopt common alignment process, identical with described mesa shape in the secondary epitaxy layer, area equated and vertically dig up corresponding to the part above the table top, table top is exposed again, do not dug around the table top and the part of secondary epitaxy layer then keep, can keep above table top in one deck secondary epitaxy layer does not influence the material that electric current passes through yet; The 5th step, carry out epitaxial growth for the third time, grow and the depression that technology causes of excavating in the 4th step can be filled and led up and had certain thickness three epitaxial loayers.
2. the method for claim 1 is characterized in that, described backing material can be a P-type material.
3. the method for claim 1 is characterized in that, described blocking layer can comprise resistive formation.
4. the method for claim 1 is characterized in that, can comprise a contact electrode layer in described three epitaxial loayers.
5. the method for claim 1 is characterized in that, the method that described epitaxial growth is for the third time adopted can be liquid phase epitaxy, also can be vapour phase epitaxy, also can be other epitaxy method.
6. the method for claim 1 is characterized in that, described backing material can be a n type material.
7. the method for claim 1 is characterized in that, described backing material can be a semi insulating material.
8. the method for claim 1 is characterized in that, described backing material can be a highly resistant material.
9. the method for claim 1 is characterized in that, described blocking layer can comprise semi-insulating layer.
10. the method for claim 1 is characterized in that, described blocking layer can comprise the PN junction of reverse operation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN96109615A CN1047469C (en) | 1996-09-05 | 1996-09-05 | Technology for producing lateral current limiting structure of semiconductor mesa |
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| Application Number | Priority Date | Filing Date | Title |
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| CN96109615A CN1047469C (en) | 1996-09-05 | 1996-09-05 | Technology for producing lateral current limiting structure of semiconductor mesa |
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| CN1149757A CN1149757A (en) | 1997-05-14 |
| CN1047469C true CN1047469C (en) | 1999-12-15 |
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| CN96109615A Expired - Fee Related CN1047469C (en) | 1996-09-05 | 1996-09-05 | Technology for producing lateral current limiting structure of semiconductor mesa |
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| CN107275452A (en) * | 2017-05-25 | 2017-10-20 | 中国科学院半导体研究所 | Electroluminescent single-photon source device and preparation method thereof |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4028140A (en) * | 1974-10-29 | 1977-06-07 | U.S. Philips Corporation | Semiconductor device manufacture |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4028140A (en) * | 1974-10-29 | 1977-06-07 | U.S. Philips Corporation | Semiconductor device manufacture |
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