CN104735358B - Ultraviolet focal-plane array driver' s timing generating means and method - Google Patents
Ultraviolet focal-plane array driver' s timing generating means and method Download PDFInfo
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Abstract
The present invention discloses a kind of ultraviolet focal-plane array driver' s timing generating means and method, mainly solves the problems, such as that the ultraviolet focal-plane array driver' s timing generating means of prior art are complicated, can not adapt to complex illumination environment.The generating means of the present invention include ultraviolet focal-plane array module, analog-to-digital conversion module, driver' s timing generation module, automatic adjustability on integration time module, image receiver module, the data communication module of general-purpose serial bus USB 3.0 and power module.The generation method of the present invention has used the ultraviolet focal-plane array automatic adjustability on integration time method based on grey level histogram, to adapt to complex illumination environment.The present invention has the advantages that simple in construction, cost is low, has complex illumination environment compared with strong adaptability, suitable for the driving of ultraviolet focal-plane array under the complex illumination environment such as fire alarm, electric power overhaul.
Description
Technical field
The invention belongs to technical field of telecommunications, further relates to a kind of ultraviolet focal-plane array driving in Image Communication
Sequential generating means and method.The present invention can be used for instrument and the systems such as fire early-warning system, electric power overhaul system, fingerprint recognition
The driving of middle ultraviolet focal-plane array device, realizes accurately image under complex illumination environment.
Background technology
After Laser Detection Technique and infrared detection technique, current optoelectronic detection technology oneself through extending to wavelength
10nm-400mn UV light region.The developmental research of ultraviolet detection technology suffers from extremely weighing to modern national defense and people's lives
The meaning wanted.And the ultraviolet focal-plane array device that ultraviolet detection technology is relied on needs suitable driver' s timing and driven
It is dynamic.Therefore, it is necessary to solve the problems, such as how to drive ultraviolet focal-plane array device stability and high efficiency.
" one kind is based on back-illuminated CCD for the patent application that Changchun Institute of Optics, Fine Mechanics and Physics, CAS proposes
Extreme ultraviolet circuit " (the applying date：2011.12.29 application number 201110449544.2, notification number CN102547154A)
In disclose a kind of extreme ultraviolet circuit based on back-illuminated CCD.The circuit includes RS-422 communicating circuits, Video processing electricity
Road, Cameralink data transmission circuits and power circuit, the circuit use the control command control of RS-422 communicating circuits transmission
Whole circuit work is made, the clock signal of back-illuminated CCD requirement amplitudes is met using FPGA generations, drives back-illuminated CCD normal works,
Data after FPGA integration processing are received using Cameralink data transmission circuits, send the data to image receiving system.
The patent application is disadvantageous in that：First, the generation of its driver' s timing does not account for extraneous illumination variation to ultraviolet Jiao
The influence of planar array device image quality, the modification time of integration need operating personnel to participate in, and real-time is low, it is impossible to meet complicated
To the requirement of high quality imaging under photoenvironment.Second, data are uploaded in its driver' s timing generating means and receive data difference
Completed by different interfaces, integrated level is low, and cost is high and is unfavorable for practical application.
" the CCD optical-integral-times based on FPGA automatically adjust in real time on a large scale is the paper that Hu Kaifu, Wang Shuanbao are delivered
System " (《Air and environmental optics journal》In September, 2012 the 5th phase of volume 7) in disclose a kind of automatic adjustability on integration time method.
This method is first to try to achieve the average gray value of entire image, by it compared with threshold value set in advance, is adjusted on this basis
The whole time of integration.This method is disadvantageous in that：It is simple to the evaluation method of characteristics of image, it is difficult under the conditions of complex illumination
Obtain the image of high quality.
Huang Hui, Ren Guoqiang, Sun Jian, paper " the CCD camera calculation with an automatic light meter based on image histogram statistics that thunderstorm is delivered
Method " (《Photoelectric technology application》In August, 2013 the 4th phase of volume 34) in disclose it is a kind of based on image histogram statistics CCD phases
Machine algorithm with an automatic light meter.This method is to CCD according to three histogram feature of image, average gray value, marginal probability features
The time of integration adjusts through row, and this method can relatively accurately reflect characteristics of image, can also be obtained under complex illumination environment
The image of high quality.But it is disadvantageous in that existing for this method：It is excessively complicated to the evaluation method of characteristics of image, use
The time of integration of this method adjustment ultraviolet focal-plane array depends on computer, it is difficult to is realized using hardware, the scope of application is small.
The content of the invention
It is an object of the invention to overcome the shortcomings of above-mentioned prior art, it is proposed that during a kind of ultraviolet focal-plane array driving
Sequence generating means and method.Using hardware based ultraviolet focal-plane array automatic adjustability on integration time method, ensure in the external world
When illumination condition changes, particularly in some extreme environments, the image quality of ultraviolet focal-plane array device.Whole system base
Realized in hardware, ensure its real-time and ease for use, the design of driving timing sequence and test needs of ultraviolet focal-plane array can be met.
The inventive system comprises ultraviolet focal-plane array module, analog-to-digital conversion module, driver' s timing generation module, integration
Time automatic regulating module, image receiver module, the data communication module of general-purpose serial bus USB 3.0 and power module；It is described
Ultraviolet focal-plane array module be connected with analog-to-digital conversion module by signal transmssion line；Described driver' s timing generation module,
Automatic adjustability on integration time module, image receiver module are integrated in inside on-site programmable gate array FPGA；Described modulus
Modular converter is connected with image receiver module by general programmable interface GPIO；Described image receiver module and general serial
Bus USB3.0 data communication modules are connected by general programmable interface GPIO；Wherein：
Described ultraviolet focal-plane array module, for the ultraviolet light in environment to be converted into analog electrical signal；
Described analog-to-digital conversion module, including modulus conversion chip and its peripheral circuit, for by ultraviolet focal-plane array
The analog electrical signal of module output is converted to the data image signal for being available for on-site programmable gate array FPGA to handle；
Described driver' s timing generation module, for according to driver' s timing parameter, controlling on-site programmable gate array FPGA,
Produce ultraviolet focal-plane array driver' s timing signal；
Described automatic adjustability on integration time module, using the ultraviolet focal-plane array time of integration based on grey level histogram
Method of adjustment, for statistical picture gray-scale intensity, cumulative gray scale number and gray level, judge whether stopping add up, calculate it is ultraviolet
Gradation of image characteristic value caused by focal plane arrays (FPA), the time of integration for calculating next two field picture caused by ultraviolet focal-plane array；
Described image receiver module, the data image signal for analog-to-digital conversion module to be exported pass to the time of integration
Automatic regulating module and the data communication module of general-purpose serial bus USB 3.0；
The described data communication module of general-purpose serial bus USB 3.0, for receive host computer transmission parameter and order,
View data caused by ultraviolet focal-plane array that image receiver module receives is uploaded to host computer；
Described power module, for producing ultraviolet focal-plane array module and the reference voltage needed for analog-to-digital conversion module
And it is each module for power supply.
The method of the present invention comprises the following steps that：
(1) receive driver' s timing and produce parameter：
The data communication module of general-purpose serial bus USB 3.0 receives parameter and the order that host computer is sent；
(2) ultraviolet focal-plane array driver' s timing is produced：
Driver' s timing generation module controls on-site programmable gate array FPGA, produces ultraviolet Jiao according to driver' s timing parameter
Planar array driver' s timing signal；
(3) image is gathered：
Ultraviolet light in environment is converted to analog electrical signal by ultraviolet focal-plane array module, and analog-to-digital conversion module will be ultraviolet
The analog electrical signal of focal plane arrays (FPA) module output is converted to the digital picture letter for being available for on-site programmable gate array FPGA to handle
Number, image receiver module by the data image signal that analog-to-digital conversion module exports pass to automatic adjustability on integration time module and
The data communication module of general-purpose serial bus USB 3.0；
(4) view data is uploaded：
The data communication module of general-purpose serial bus USB 3.0, the ultraviolet focal-plane array that image receiver module is received produce
Raw view data is uploaded to host computer；
(5) statistical picture gray-scale intensity：
Corresponding to each gray level of image caused by the ultraviolet focal-plane array that (5a) statistical picture receiving module receives
Gray scale number；
(5b) is ranked up according to gray scale number from more to few to gray level, the gray scale number sequence successively decreased and each ash
Gray scale sequence corresponding to number of degrees amount；
(6) add up gray scale number and gray level：
(6a) is added up to obtain gray scale number sum successively according to the order of gray scale number sequence to gray scale number；
(6b) adds up to gray level according to the order of gray scale sequence corresponding to each gray scale number, obtains ash successively
Spend level sum；
(6c) counts the quantity of accumulated gray level, obtains accumulated number of grey levels；
(7) judge whether to meet to stop cumulative condition, if so, performing step (8), otherwise, perform step (6)；
(8) according to the following formula, gradation of image characteristic value caused by ultraviolet focal-plane array is calculated：
Wherein, G1Represent the gray feature value of image caused by ultraviolet focal-plane array, P1Represent the production of ultraviolet focal-plane array
The gray level sum of raw image, N1Represent that accumulated ultraviolet focal-plane array produces the number of grey levels of image；
(9) according to the following formula, the time of integration of next two field picture caused by ultraviolet focal-plane array is calculated：
Wherein, T1Represent the time of integration of next two field picture caused by ultraviolet focal-plane array, J1Represent ultraviolet focal-plane battle array
First adjusting parameter of the time of integration of next two field picture caused by row, J2Represent next frame caused by ultraviolet focal-plane array
Second adjusting parameter of the time of integration of image, T0Represent that current ultraviolet focal-plane array produces the time of integration of image, G1Table
Show that ultraviolet focal-plane array produces the gray feature value of image；
(10) time of integration is adjusted：
Initial drive pulses signal Start_R cycle and reset drives signal Start_Reset cycle tune will be integrated
Whole is T1, T1Represent the time of integration of next two field picture caused by ultraviolet focal-plane array；
(11) judge whether to receive and ceased and desisted order caused by ultraviolet focal-plane array driver' s timing, if so, performing step
(12) step (2), otherwise, is performed；
(12) stop producing ultraviolet focal-plane array driver' s timing.
The present invention has advantages below compared with prior art：
First, because the method for the present invention has used the ultraviolet focal-plane array time of integration based on grey level histogram to adjust
Method, for adjusting the time of integration of ultraviolet focal-plane array in real time, overcome and do not account for ambient light in the prior art
According to influence of the change to ultraviolet focal-plane array device image quality, the shortcomings that modification time of integration needs operating personnel to participate in,
Overcome simple to the evaluation method of characteristics of image in the prior art simultaneously, be difficult to obtain high-quality under the conditions of complex illumination
The shortcomings that picture so that the present invention can accurately adjust the time of integration of ultraviolet focal-plane array under complex illumination environment, obtain
The image of high quality, there is very high real-time and environmental suitability.
Second, because the device of the present invention has used field programmable gate array FPGA chip to perform ultraviolet focal-plane array
The adjustment of the time of integration, overcome the lacking dependent on computer of the adjustment to the ultraviolet focal-plane array time of integration in the prior art
Point so that the present invention can depart from adjustment of the computer realization to the ultraviolet focal-plane array time of integration, expand the suitable of device
Use scope.
3rd, because the device of the present invention has used the data communication module of general-purpose serial bus USB 3.0 to complete view data
Upload and parameter command reception, overcome prior art upload data and receive data it is complete by different interfaces respectively
Into integrated level is low, and cost is high and the shortcomings that being unfavorable for practical application, reduces the complexity of device so that device of the invention
It is cheap easy to use.
Brief description of the drawings
Fig. 1 is the block diagram of apparatus of the present invention；
Fig. 2 is the flow chart of the inventive method；
Fig. 3 is ultraviolet focal-plane array driver' s timing analogous diagram of the present invention；
Embodiment
Below in conjunction with the accompanying drawings 1, the device of the present invention is further described：
The inventive system comprises ultraviolet focal-plane array module, analog-to-digital conversion module, driver' s timing generation module, integration
Time automatic regulating module, image receiver module, the data communication module of general-purpose serial bus USB 3.0 and power module.
Described ultraviolet focal-plane array module is connected with analog-to-digital conversion module by signal transmssion line；During described driving
Sequence generation module, automatic adjustability on integration time module, image receiver module are integrated in inside on-site programmable gate array FPGA；
Described analog-to-digital conversion module is connected with image receiver module by general programmable interface GPIO；Described image receiver module
It is connected with the data communication module of general-purpose serial bus USB 3.0 by general programmable interface GPIO.
Ultraviolet focal-plane array module, the ultraviolet focal-plane array device of Multiple Type can be used, this module is used for will
Ultraviolet light is converted to analog electrical signal.
Analog-to-digital conversion module, including modulus conversion chip and its peripheral circuit, the parameter of modulus conversion chip need to arrange in pairs or groups choosing
Ultraviolet focal-plane array device, its peripheral circuit may be referred to the typical circuit of selected modulus conversion chip, needed for it
Reference voltage is provided by power module, and this module can for the analog electrical signal that ultraviolet focal-plane array module exports to be converted to
For the data image signal of on-site programmable gate array FPGA processing.
Driver' s timing generation module, for producing ultraviolet focal-plane array driver' s timing signal, ultraviolet focal-plane array drives
Dynamic signal includes：Integrate initial drive pulses signal Start_R, integration clock signal Clk1_R, Clk2_R, reset drives pulse
Signal Start_Reset, reset clock signal Clk1_Reset, Clk2_Reset, correlated-double-sampling drive pulse signal
Start_CDS, correlated-double-sampling clock signal Clk1_CDS, Clk2_CDS, sampling keep pulse signal SH1, SH2.
Automatic adjustability on integration time module, using the ultraviolet focal-plane array time of integration adjustment side based on grey level histogram
Method, by analyzing the grey level histogram for receiving image, the characteristic parameter of extraction energy representative image gray feature, utilize
This feature parameter is compared with setup parameter, produces next frame figure caused by ultraviolet focal-plane array in real time on this basis
The time of integration of picture.
Image receiver module, the data image signal for analog-to-digital conversion module to be exported pass to the time of integration and adjusted automatically
Mould preparation block and the data communication module of general-purpose serial bus USB 3.0, can build by the scene inside programmable gate array FPGA
Vertical First Input First Output FIFO or random access memory ram are realized.
The data communication module of general-purpose serial bus USB 3.0, for the ultraviolet focal-plane battle array for receiving image receiver module
View data caused by row is uploaded to host computer, and receives parameter and order that host computer is sent.
Power module, for producing ultraviolet focal-plane array module and the reference voltage needed for analog-to-digital conversion module and being
Each module for power supply, specific power supply parameter need corresponding with selected ultraviolet focal-plane array device and modulus conversion chip.
The ultraviolet focal-plane array module of the device, analog-to-digital conversion module, driver' s timing generation module, the time of integration are automatic
Adjusting module, image receiver module, the physical support of the data communication module of general-purpose serial bus USB 3.0 and power module are
Printing board PCB.
The data communication module of general-purpose serial bus USB 3.0 of the device uses the interface of general-purpose serial bus USB 3.0, is used for
View data caused by ultraviolet focal-plane array that image receiver module receives is uploaded to host computer, and receives host computer
The parameter of transmission and order.
The host computer of the device can be computer, guidance panel or other specialized hardwares, can be according to practical application feelings
Condition selects.
The driver' s timing generation module, automatic adjustability on integration time module, image receiver module can be compiled using scene
Journey gate array FPGA chip.
The ultraviolet focal-plane array module, analog-to-digital conversion module, driver' s timing generation module, automatic adjustability on integration time
Module, image receiver module, the physical support of the data communication module of general-purpose serial bus USB 3.0 and power module are printing
Circuit board PCB.
The inventive method is further described with reference to Fig. 2.
Step 1. receives driver' s timing and produces parameter
Device can receive the parameter that host computer is sent after starting by the data communication module of general-purpose serial bus USB 3.0
With order, according to being actually needed, if parameter need not be changed, the step can be skipped, parameter uses default value.
Step 2. produces ultraviolet focal-plane array driver' s timing：
Ultraviolet focal-plane array drive signal needs to meet specific logical requirements, and ultraviolet focal-plane array device only exists
Under suitable time sequential pulse drives, the characteristic such as its conversion efficiency, signal to noise ratio, the optimum state of device function is can be only achieved, so as to
Make the signal stabilization of output reliable.To produce the driver' s timing for meeting logical requirements, it is as follows that driver' s timing parameter need to be set：Integration
Initial drive pulses signal Start_R pulse width is 50us, and integration initial drive pulses signal Start_R cycle is
100ms, integration clock signal Clk1_R, Clk2_R pulse width are 12.5us, integration clock signal Clk1_R, Clk2_R's
Cycle is 50us, and the first rising edges of integration clock signal Clk1_R are the time difference with drive pulse signal Start_R rising edges
For 0us, integration clock signal Clk1_R and Clk2_R phase difference are 180 degree, and sample keeps pulse signal SH1 and SH2 pulse
Width is 1us, and it is 50us that sampling, which is kept for pulse signal SH1 and SH2 cycle, and sampling keeps the first of pulse signal SH1 signals
The time difference of rising edge and the first rising edges of integration clock signal Clk1_R is 1us, and sampling keeps the head of pulse signal SH2 signals
The time difference of individual rising edge and second rising edge of integration clock signal Clk2_R is 1us, reset drives signal Start_Reset
Pulse width be 2us, reset drives signal Start_Reset cycle is 100ms, reset drives signal Start_Reset
First rising edge with sampling keep the first rising edges of pulse signal SH1 time difference be 1us, reset clock signal Clk1_
Reset, Clk2_Reset pulse width are 0.5us, and the cycle of reset clock signal Clk1_Reset, Clk2_Reset is
2us, reset clock signal Clk1_Reset and reset clock signal Clk2_Reset phase difference, correlated-double-sampling driving pulse
Signal Start_CDS pulse width, correlated-double-sampling drive pulse signal Start_CDS cycle, correlated-double-sampling driving
Pulse signal Start_CDS first rising edge and integration clock signal Clk1_R time difference are 180 degree, during correlated-double-sampling
Clock signal Clk1_CDS, Clk2_CDS pulse width are 0.5us, correlated-double-sampling clock signal Clk1_CDS, Clk2_CDS
Cycle be 50us, correlated-double-sampling clock signal Clk1_CDS and correlated-double-sampling clock signal Clk2_CDS phase difference are
180 degree.
Step 3. gathers image：
Analog electrical signal is converted ultraviolet light into by ultraviolet focal-plane array module, analog-to-digital conversion module will be ultraviolet burnt flat
The analog electrical signal of face array module output is converted to the data image signal for being available for on-site programmable gate array FPGA to handle, figure
As the data image signal that analog-to-digital conversion module exports is passed to automatic adjustability on integration time module and general by receiving module
The data communication module of serial bus USB 3.0；
Step 4. uploads view data：
The ultraviolet focal-plane battle array for being received image receiver module by the data communication module of general-purpose serial bus USB 3.0
View data is uploaded to host computer caused by row；
Step 5. statistical picture gray-scale intensity：
Gray scale corresponding to each gray level of image caused by the ultraviolet focal-plane array that statistical picture receiving module receives
Quantity, and gray level is ranked up from more to few according to gray scale number, the gray scale number sequence successively decreased and each grey
Gray scale sequence corresponding to amount；
Step 6. adds up gray scale number and gray level：
Gray scale number is added up successively according to the order of gray scale number sequence, while according to corresponding gray scale sequence
Order gray level is added up successively, obtain gray scale number sum, gray level sum, accumulated number of grey levels；
Step 7. judges whether to stop adding up：
In cumulative process, if gray scale number sum is more than maximum cumulative pixel count or accumulated number of grey levels is big
In the cumulative number of grey levels of maximum, then stop adding up, perform step 8, otherwise, perform step 6；
Step 8. obtains gradation of image characteristic value：
According to the following formula, gradation of image characteristic value caused by ultraviolet focal-plane array is calculated：
Wherein, G1Represent the gray feature value of image caused by ultraviolet focal-plane array, P1Represent the production of ultraviolet focal-plane array
The gray level sum of raw image, N1Represent that accumulated ultraviolet focal-plane array produces the number of grey levels of image；
Step 9. according to the following formula, calculates the time of integration of next two field picture caused by ultraviolet focal-plane array：
Wherein, T1Represent the time of integration of next two field picture caused by ultraviolet focal-plane array, J1Represent ultraviolet focal-plane battle array
First adjusting parameter of the time of integration of next two field picture caused by row, J2Represent next frame caused by ultraviolet focal-plane array
Second adjusting parameter of the time of integration of image, T0Represent that current ultraviolet focal-plane array produces the time of integration of image, G1Table
Show that ultraviolet focal-plane array produces the gray feature value of image；
Step 10. adjusts the time of integration：
Initial drive pulses signal Start_R cycle and reset drives signal Start_Reset cycle tune will be integrated
Whole is T1, T1Represent the time of integration of next two field picture caused by ultraviolet focal-plane array；
Step 11. judges whether to receive ceases and desist order caused by ultraviolet focal-plane array driver' s timing, if so, performing step
12, otherwise, perform step 2；
Step 12. stops producing ultraviolet focal-plane array driver' s timing.
The parameter that host computer described in above-mentioned steps 1 is sent includes with order：The cumulative pixel count of maximum, maximum statistics ash
Spend number of degrees, first adjusting parameter of the time of integration of next two field picture caused by ultraviolet focal-plane array, ultraviolet focal-plane
Second adjusting parameter of the time of integration of next two field picture caused by array, ultraviolet focal-plane array driver' s timing produce stopping
Order.
Ultraviolet focal-plane array driver' s timing signal described in above-mentioned steps 2 includes signals below：Integration starting driving
Pulse signal Start_R, integration clock signal Clk1_R, Clk2_R, reset drives pulse signal Start_Reset, during reset
Clock signal Clk1_Reset, Clk2_Reset, correlated-double-sampling drive pulse signal Start_CDS, correlated-double-sampling clock letter
Number Clk1_CDS, Clk2_CDS, sampling keep pulse signal SH1, SH2.
Stopping described in above-mentioned steps 7 condition that adds up is：Gray scale number sum is more than maximum cumulative pixel quantity or ginseng
It is more than maximum cumulative number of grey levels with cumulative number of grey levels.
3 pairs of simulated effects of the invention are described further below in conjunction with the accompanying drawings.
1. simulated conditions：
This emulation is to be configured to Intel i3-3210 in computer hardware, and under internal memory 4G hardware environment and computer is soft
Part is configured to what is carried out in the environment of ISE14.4.
2. simulation result and analysis：
Accompanying drawing 3 be the present invention according to content setting driver' s timing parameter described in embodiment after, ultraviolet focal-plane battle array
Row driver' s timing simulation result figure.
Wherein accompanying drawing 3 (a) is the driver' s timing analogous diagram needed for ultraviolet focal-plane array device one two field picture of output, is emulated
The chronomere of figure is us, and signal is followed successively by figure：Integrate initial drive pulses signal Start_R, integration clock signal Clk1_
R, Clk2_R, reset drives pulse signal Start_Reset, reset clock signal Clk1_Reset, Clk2_Reset are related double
Drive pulse signal Start_CDS, correlated-double-sampling clock signal Clk1_CDS, Clk2_CDS are sampled, sampling keeps pulse letter
Number SH1, SH2；
Accompanying drawing 3 (b) is the enlarged drawing of A section waveforms in accompanying drawing 3 (a), and the position is the frame of ultraviolet focal-plane array device first
The oscillogram of frame head, the chronomere of analogous diagram are ns, and signal is followed successively by figure：Initial drive pulses signal Start_R is integrated,
Integration clock signal Clk1_R, Clk2_R, reset drives pulse signal Start_Reset, reset clock signal Clk1_Reset,
Clk2_Reset, correlated-double-sampling drive pulse signal Start_CDS, correlated-double-sampling clock signal Clk1_CDS, Clk2_
CDS, sampling keep pulse signal SH1, SH2；
Accompanying drawing 3 (c) is the enlarged drawing of B section waveforms in accompanying drawing 3 (a), and the position is held in the mouth for the frame of ultraviolet focal-plane array device two
Connect the oscillogram at place, the chronomere of analogous diagram is ns, and signal is followed successively by figure：Initial drive pulses signal Start_R is integrated,
Integration clock signal Clk1_R, Clk2_R, reset drives pulse signal Start_Reset, reset clock signal Clk1_Reset,
Clk2_Reset, correlated-double-sampling drive pulse signal Start_CDS, correlated-double-sampling clock signal Clk1_CDS, Clk2_
CDS, sampling keep pulse signal SH1, SH2.
The ultraviolet focal-plane array driver' s timing that the present invention generates it can be seen from clock signal in figure meets ultraviolet burnt flat
Requirement of the face array to driver' s timing, can be with stabilized driving ultraviolet focal-plane array device.
Claims (7)
1. a kind of ultraviolet focal-plane array driver' s timing generating means, including ultraviolet focal-plane array module, analog-to-digital conversion module,
Driver' s timing generation module, automatic adjustability on integration time module, image receiver module, the communication of the data of general-purpose serial bus USB 3.0
Module and power module；Described ultraviolet focal-plane array module is connected with analog-to-digital conversion module by signal transmssion line；Institute
Driver' s timing generation module, automatic adjustability on integration time module, the image receiver module stated are integrated in field-programmable gate array
Arrange inside FPGA；Described analog-to-digital conversion module is connected with image receiver module by general programmable interface GPIO；Described
Image receiver module is connected with the data communication module of general-purpose serial bus USB 3.0 by general programmable interface GPIO；Wherein：
Described ultraviolet focal-plane array module, for the ultraviolet light in environment to be converted into analog electrical signal；
Described analog-to-digital conversion module, including modulus conversion chip and its peripheral circuit, for by ultraviolet focal-plane array module
The analog electrical signal of output is converted to the data image signal for being available for on-site programmable gate array FPGA to handle；
Described driver' s timing generation module, for according to driver' s timing parameter, controlling on-site programmable gate array FPGA, producing
Ultraviolet focal-plane array driver' s timing signal；
Described automatic adjustability on integration time module, adjusted using the ultraviolet focal-plane array time of integration based on grey level histogram
Method, for statistical picture gray-scale intensity, cumulative gray scale number and gray level, judge whether stopping add up, calculate it is ultraviolet burnt flat
Gradation of image characteristic value caused by the array of face, the time of integration for calculating next two field picture caused by ultraviolet focal-plane array, stop
Cumulative condition is：It is tired more than maximum that gray scale number sum is more than maximum cumulative pixel quantity or accumulated number of grey levels
Add number of grey levels；
Described image receiver module, it is automatic that the data image signal for analog-to-digital conversion module to be exported passes to the time of integration
Adjusting module and the data communication module of general-purpose serial bus USB 3.0；
The described data communication module of general-purpose serial bus USB 3.0, for receive host computer transmission parameter and order, will figure
The view data as caused by the ultraviolet focal-plane array that receiving module receives is uploaded to host computer；
Described power module, for produce reference voltage needed for ultraviolet focal-plane array module and analog-to-digital conversion module and
For each module for power supply.
2. ultraviolet focal-plane array driver' s timing generating means according to claim 1, it is characterised in that：During the driving
Sequence generation module, automatic adjustability on integration time module, image receiver module use field programmable gate array FPGA chip.
3. ultraviolet focal-plane array driver' s timing according to claim 1 produces generating means, it is characterised in that：It is described ultraviolet
Focal plane arrays (FPA) module, analog-to-digital conversion module, driver' s timing generation module, automatic adjustability on integration time module, image-receptive mould
The physical support of block, the data communication module of general-purpose serial bus USB 3.0 and power module is printing board PCB.
4. a kind of ultraviolet focal-plane array driver' s timing produces generation method, it is comprised the following steps that：
(1) receive driver' s timing and produce parameter：
The data communication module of general-purpose serial bus USB 3.0 receives parameter and the order that host computer is sent；
(2) ultraviolet focal-plane array driver' s timing is produced：
Driver' s timing generation module controls on-site programmable gate array FPGA, produces ultraviolet focal-plane according to driver' s timing parameter
Array driver' s timing signal；
(3) image is gathered：
Ultraviolet light in environment is converted to analog electrical signal by ultraviolet focal-plane array module, and analog-to-digital conversion module will be ultraviolet burnt flat
The analog electrical signal of face array module output is converted to the data image signal for being available for on-site programmable gate array FPGA to handle, figure
As the data image signal that analog-to-digital conversion module exports is passed to automatic adjustability on integration time module and general by receiving module
The data communication module of serial bus USB 3.0；
(4) view data is uploaded：
The data communication module of general-purpose serial bus USB 3.0, caused by the ultraviolet focal-plane array that image receiver module is received
View data is uploaded to host computer；
(5) statistical picture gray-scale intensity：
Gray scale corresponding to each gray level of image caused by the ultraviolet focal-plane array that (5a) statistical picture receiving module receives
Quantity；
(5b) is ranked up according to gray scale number from more to few to gray level, the gray scale number sequence successively decreased and each grey
Gray scale sequence corresponding to amount；
(6) add up gray scale number and gray level：
(6a) is added up to obtain gray scale number sum successively according to the order of gray scale number sequence to gray scale number；
(6b) adds up to gray level according to the order of gray scale sequence corresponding to each gray scale number, obtains gray level successively
Sum；
(6c) counts the quantity of accumulated gray level, obtains accumulated number of grey levels；
(7) judge whether to meet to stop cumulative condition, if so, performing step (8), otherwise, perform step (6)；
The described stopping condition that adds up is：Gray scale number sum is more than maximum cumulative pixel quantity or accumulated number of greyscale levels
Amount is more than maximum cumulative number of grey levels；
(8) according to the following formula, gradation of image characteristic value caused by ultraviolet focal-plane array is calculated：
<mrow>
<msub>
<mi>G</mi>
<mn>1</mn>
</msub>
<mo>=</mo>
<mfrac>
<msub>
<mi>P</mi>
<mn>1</mn>
</msub>
<msub>
<mi>N</mi>
<mn>1</mn>
</msub>
</mfrac>
</mrow>
Wherein, G1Represent the gray feature value of image caused by ultraviolet focal-plane array, P1Represent that ultraviolet focal-plane array produces figure
The gray level sum of picture, N1Represent that accumulated ultraviolet focal-plane array produces the number of grey levels of image；
(9) according to the following formula, the time of integration of next two field picture caused by ultraviolet focal-plane array is calculated：
Wherein, T1Represent the time of integration of next two field picture caused by ultraviolet focal-plane array, J1Represent the production of ultraviolet focal-plane array
First adjusting parameter of the time of integration of raw next two field picture, J2Represent next two field picture caused by ultraviolet focal-plane array
The time of integration second adjusting parameter, T0Represent that current ultraviolet focal-plane array produces the time of integration of image, G1Represent purple
Outer focal plane arrays (FPA) produces the gray feature value of image；
(10) time of integration is adjusted：
It is by the cycle for integrating initial drive pulses signal Start_R and reset drives signal Start_Reset period modulation
T1, T1Represent the time of integration of next two field picture caused by ultraviolet focal-plane array；
(11) judge whether to receive and ceased and desisted order caused by ultraviolet focal-plane array driver' s timing, if so, step (12) is performed, it is no
Then, step (2) is performed；
(12) stop producing ultraviolet focal-plane array driver' s timing.
5. ultraviolet focal-plane array driver' s timing generation method according to claim 4, it is characterised in that：In step (1)
The parameter that described host computer is sent includes with order：The cumulative pixel quantity of maximum, the cumulative number of grey levels of maximum are ultraviolet burnt flat
First adjusting parameter of the time of integration of next two field picture caused by the array of face, next frame figure caused by ultraviolet focal-plane array
Second adjusting parameter of the time of integration of picture, ultraviolet focal-plane array driver' s timing are produced and ceased and desisted order.
6. ultraviolet focal-plane array driver' s timing generation method according to claim 4, it is characterised in that：In step (2)
Described driver' s timing parameter includes：Initial drive pulses signal Start_R pulse width is integrated, integrates initial drive pulses
Signal Start_R cycle, integration clock signal Clk1_R, Clk2_R pulse width, integration clock signal Clk1_R,
Clk2_R cycle, the first rising edges of integration clock signal Clk1_R are the time with drive pulse signal Start_R rising edges
Difference, integration clock signal Clk1_R and Clk2_R phase difference, sampling keep pulse signal SH1 and SH2 pulse width, sampling
Kept for pulse signal SH1 and SH2 cycle, sampling keeps the first rising edge and integration clock signal of pulse signal SH1 signals
The time difference of the first rising edges of Clk1_R, sampling keep the first rising edge and integration clock signal of pulse signal SH2 signals
The time difference of second rising edge of Clk2_R, reset drives signal Start_Reset pulse width, reset drives signal
Start_Reset cycle, reset drives signal Start_Reset first rising edge and sampling keep pulse signal SH1 first
The time difference of individual rising edge, the pulse width of reset clock signal Clk1_Reset, Clk2_Reset, reset clock signal
Clk1_Reset, Clk2_Reset cycle, reset clock signal Clk1_Reset and reset clock signal Clk2_Reset's
Phase difference, correlated-double-sampling drive pulse signal Start_CDS pulse width, correlated-double-sampling drive pulse signal Start_
CDS cycle, correlated-double-sampling drive pulse signal Start_CDS first rising edge and integration clock signal Clk1_R when
Between poor, the pulse width of correlated-double-sampling clock signal Clk1_CDS, Clk2_CDS, correlated-double-sampling clock signal Clk1_
CDS, Clk2_CDS cycle, correlated-double-sampling clock signal Clk1_CDS and correlated-double-sampling clock signal Clk2_CDS phase
Potential difference.
7. ultraviolet focal-plane array driver' s timing generation method according to claim 4, it is characterised in that：In step (2)
Described ultraviolet focal-plane array driver' s timing signal includes signals below：Integrate initial drive pulses signal Start_R, integration
Clock signal Clk1_R, Clk2_R, sampling keep drive pulse signal SH1, SH2, reset drives pulse signal Start_
Reset, reset clock signal Clk1_Reset, Clk2_Reset, correlated-double-sampling drive pulse signal Start_CDS are related
Double sampled clock signal Clk1_CDS, Clk2_CDS, sampling keep pulse signal SH1, SH2.
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