CN104731651A - Power automation task scheduling and triggering method, system and processor - Google Patents
Power automation task scheduling and triggering method, system and processor Download PDFInfo
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Abstract
The invention discloses a power automation task scheduling and triggering method, system and processor. The method includes the steps: the processor scans input information and divides tasks expressed by the input information to at least one queue according to attributes of the tasks; according to an arrangement sequence of the tasks in the queues, the processor sends out an actuating signal to trigger execution of the tasks in the queues. The method has the advantages that programmable logical performance of an embedded system can be improved, uniformity of time series can be ensured and actions can be flexible configured.
Description
Technical field
The invention belongs to field of electric power automation, particularly relate to a kind of power automation task scheduling and triggering technique.
Background technology
In recent years, power grid construction faces unprecedented growth, thus drives the quick growth of secondary device in electric system.The widespread use of microcomputer protecting controller, also proposes more extensively task scheduling and trigger mechanism, requirement more flexibly.As shown in Figure 1, adopt the mode of scan round, without Task Scheduling Mechanism, real-time is not high, inefficiency for traditional protection TT&C task scheduling and trigger mechanism implementation; Do not distinguish real variable and dummy variables, cause sequential entanglement; There is no action behavior trigger characteristic, only realize the characteristic that some are such as interlocked, do not have an extendability.For head it off, be necessary according to protection supervisory equipment feature, incorporation engineering is actual, proposes the new technology realizing task scheduling and trigger mechanism.
Summary of the invention
The defect existed for prior art and deficiency, the present invention is intended to propose the implementation method of a kind of task scheduling and trigger mechanism, system and processor, effectively can improve the execution efficiency of FPGA (Field Programmable Gate Array), guarantee temporal consistency, trigger different action behavior.
For achieving the above object, solution of the present invention is as follows:
Embodiments provide a kind of method of power automation task scheduling and trigger mechanism, comprise step: processor scanning t test information, by the task of described input information representation, according to the attribute of described task by described task division at least one queue; Described processor puts in order according to task in described queue, sends actuating signal, triggers the execution of task in described queue.
In such scheme, also comprise before described processor scanning t test information: described processor reads configuration information from shared drive, and is loaded on Installed System Memory, resolution logic configuration file, set up summary list item, input list item, export list item, formula list item; According to input, output, formula three elements, generate data structure through grammatical analysis.
In such scheme, by described task division at least one queue, be specifically divided into two queuing stages, wherein the first stage is according to the intensity of variation of described input information present worth and initial value, the task of described information representation is divided into other first queue of different priorities; Described calculation task, according to the calculating of the calculation task in the described task in each described first queue successively requirement, is arranged in the second queue by subordinate phase.
In such scheme, by described task division at least one queue, be specifically divided into two queuing stages, wherein the first stage is according to the intensity of variation of described input information present worth and initial value, the task of described information representation is divided into other first queue of different priorities; In subordinate phase, according to described data structure, adopt top down method to carry out prioritization the calculation task in the described task in each described first queue, be arranged in the second queue.
In such scheme, the described first stage specifically comprises: according to loop cycle and sudden change trigger mechanism, the task that burst information is expressed is put into the first queue of high priority, the task that cycle information is expressed puts into the first queue of low priority.
In such scheme, for the first queue of the described different priority level that the first stage is divided into, not yet execute the first queue task of described high priority if interrupt described in last time, then continue to perform described high priority first queue task.
In such scheme, for the first queue of the described different priority level that the first stage is divided into, if the high-priority task continuous execution time exceedes threshold values, then Priority Inversion, the first queue-level of low priority is promoted, uses CPU.
In such scheme, in subordinate phase, described calculation task sequence is specifically referred to, described data structure is expression tree, from root node to leaf node iteration, the second types of variables is classified as needing the preferential calculation task performed, need the calculation task performed according to the second variable execution result to be classified as the first types of variables, according to described first variable and described second variable, arrange out the second queue.
In such scheme, described in send actuating signal, thus the execution triggering task in described queue specifically refers to: the task in described queue fallen out from queue successively, computational logic result; According to described logical consequence and registration attribute, synchronous triggers callback function, sends actuating signal to system bus, causes interlocking, control, AVR, AGC action behavior.
The embodiment of the present invention additionally provides the system of a kind of power automation task scheduling and trigger mechanism, comprise shared drive, Installed System Memory, processor, system bus, wherein, described processor is connected with described shared drive, described Installed System Memory, described system bus;
Described processor is used for from described shared drive, reading configuration information and setting up data structure and be loaded on described Installed System Memory; Described processor scanning t test information, by the task of described input information representation, lines up at least one queue according to described data structure; Described processor, to described system bus sending action signal, triggers the execution of task in described queue.
In such scheme, the execution of task in the described queue of described triggering, comprises the execution of interlocking, control, AVR, AGC action behavior.
In such scheme, described processor scanning t test information; By the task of described input information representation, according to the attribute of described task by described task division at least one queue; Described processor puts in order according to task in described queue, sends actuating signal, triggers the execution of task in described queue.
The invention has the beneficial effects as follows: by such task scheduling and trigger mechanism implementation method, system and processor, the execution efficiency of raising task, solve the problem of sequential entanglement, flexibly trigger action characteristic, solve the drawback that traditional logic behavior is single.
Accompanying drawing explanation
Fig. 1 is task scheduling and the triggering method schematic diagram of conventional electric power system;
The task scheduling that Fig. 2 adopts for this patent and triggering method schematic diagram.
Embodiment
The invention provides a kind of for the task scheduling of electric system and the method for trigger mechanism, concrete steps comprise: processor scanning t test information, by the task of described input information representation, according to the attribute of described task by described task division at least one queue; Described processor puts in order according to task in described queue, sends actuating signal, thus triggers the execution of task in described queue.
Wherein, before processor scans, the method can also comprise step: processor reads configuration information and sets up data structure from shared drive.This data structure can be expression tree.
Set up expression tree to be specifically as follows: in operating system side loading configuration file to shared drive, configuration information is read in processor side from shared drive, according to input, export and formula three elements formation incidence relation, set up expression tree.Illustrate, loading configuration file is to Installed System Memory, and resolution logic configuration file, sets up summary list item, input list item, exports list item, formula list item, according to input, output, formula three elements, generate the expression tree based on brother's father and son node through grammatical analysis.
Illustrate, the configuration text that present invention uses can comprise following critical field:
file summary GENERAL: describe the attribute such as file layout version, rise time, IED name, IEDDesc, for the management of configuration text;
document size SIZE: describe input quantity, export quantity and formula quantity, for the relation of being associated does summary description;
input variable INPUT_x: the attribute describing input, comprises signal characteristic, signal source, DataRef, short address, description etc.;
output variable OUTPUT_x: describe the attribute exported, comprise behavioural characteristic, signal actual situation feature, short address, description, parameter etc.;
formula F ORMULA_x: describe formula expression, constrained input is associated;
file verification FILE_CHECK: description document School Affairs, prevents file corruption or is tampered;
Queuing can be divided into two stages.The queuing of first stage, by processor according to scanning t test information, such as scanning t test current data.Task expressed by these data is pressed into different priority queries.At this for high and low Liang Ge priority query.Such as, the value of the input of certain data can be compared with the initial value of these data and determine variable quantity, when variable quantity is more than a threshold value, think to there is larger change, by the task press-in high-priority queue expressed by these data.On the contrary, if when this variable quantity does not exceed this threshold value, think that change is less, then by the task press-in Low Priority Queuing expressed by these data.
In addition, also can according to loop cycle and sudden change trigger mechanism, by the task press-in high-priority queue expressed by bursty data, the task expressed by cycle data is pressed into Low Priority Queuing.Illustrate: according to loop cycle and sudden change trigger mechanism, bursty data is marked high priority label, cycle data mark low priority tags.Citing: be input as X1, X2, export as Y1=X1+X2, Y2=X1 – X2, Y3=X2+3, if X1 burst, then trigger Y1, Y2 change, Y1, Y2 are marked high priority label, and Y3 is low priority tags;
Further, the reverse function to high-priority task and low priority task can also be set.If it is long that high-priority task takies break period, promote the priority of task in Low Priority Queuing in time, avoid low priority task to use CPU.Such formation Priority Inversion, realizes depriving formula strategy with this, that is, when task is run just on a processor, system can deprive according to the principle of defined the processor distributing to this task, selects other task runs.
The queuing of subordinate phase refers to, in the different priorities queue after the first stage queues up, has multiple pending task.For the execution sequencing of task in each queue, can according to set up expression tree, and use different variablees to distinguish the order of tasks carrying, thus ensure that tasks carrying is orderly, not occur to calculate conflict.
Illustrate with Two Variables type at this.Use the first variable and the second variable, expression tree is analyzed, from top to down successively from father's node, child nodes iteration until leaf node.
Illustrate queuing process: the first variable can be called real variable, the second variable can be called dummy variables, uses Two Variables type adopt top down method iterative computation priority and sort, guarantees its temporal consistency, avoid sequential entanglement.Citing: Y1=Y2+X2, Y2=X1+5.Through grammatical analysis: Y1 should be father's node of Y2, calculating priority level is from the downward iteration of Y1 to Y2.Here Y2 belongs to dummy variables and should first calculate, Y1 belong to real variable should after calculate.The like, if there is Yi, during Xi, until Yi is made up of Xi and constant logical calculated.With the method Y1 priority should comparatively Y2 be low 1 grade, therefore correct computation sequence should be Y2, Y1.Be exemplified below: if initial value X1=1, X2=2, then Y1=8, Y2=6; If X1 is changed to 3, X2 and remains unchanged, calculate Y1, Y2 in order, then result is Y1=8, Y2=8, obviously incorrect.Sort by priority and should be Y2, Y1, then correct result is Y2=8, Y1=10; To use the method for Two Variables type, ensure computation sequence, thus ensure that result is correct.
Finally, according to the queue sequenced, fall out from triggering queue successively, computational logic result; According to logical consequence and registration attribute, synchronous triggers callback function, sends actuating signal to system bus, causes the action behavior such as interlocking, control, AVR, AGC.
With a concrete task scheduling and triggering method, concrete methods of realizing of the present invention is described below.Data stream is shown in Fig. 2, and concrete implementation method comprises:
1, grammer scanning:
(1) operating system side is by files loading in shared drive, and configuration information is read in processor side from shared drive;
(2) verification file CRC, if verify inconsistent, device starts unsuccessfully;
(3) set up summary list item, input list item successively, export list item, formula list item;
(4) set up input, output, formula three incidence relation, generate the expression tree based on brother's father and son node;
2, task scheduling:
(1) not yet execute high-priority queue task if interrupted last time, then continue to perform high-priority task.If the high-priority task continuous execution time exceedes maximum MaxT threshold values, then Priority Inversion, Low Priority Queuing rank promoted thus uses CPU, avoiding low priority task to can not get for a long time running, realize depriving formula strategy with this;
(2) scanning t test variable, according to loop cycle and sudden change trigger mechanism, marks high priority label by bursty data, cycle data mark low priority tags.Citing: be input as X1, X2, export as Y1=X1+X2, Y2=X1 – X2, Y3=X2+3, if X1 burst, then trigger Y1, Y2 change, Y1, Y2 are marked high priority label, and Y3 is low priority tags;
(3) Y1, Y2 are pressed into high-priority queue, Y3 is pressed into Low Priority Queuing, inputs as next stage;
3, sequential is queued up:
(1) sequencer procedure: real variable and dummy variables adopt top down method iterative computation priority and sort, and guarantee its temporal consistency, avoid sequential entanglement.Citing: Y1=Y2+X2, Y2=X1+5.Through grammatical analysis: Y1 should be father's node of Y2, calculating priority level from the downward iteration of Y1 to Y2, the like, until Yi is made up of Xi and constant logical calculated.With the method Y1 priority should comparatively Y2 be low 1 grade, therefore correct computation sequence should be Y2, Y1.Be exemplified below: if initial value X1=1, X2=2, then Y1=8, Y2=6; If X1 is changed to 3, X2 and remains unchanged, calculate Y1, Y2 in order, then result is Y1=8, Y2=8, obviously incorrect.Sort by priority and should be Y2, Y1, then correct result is Y2=8, Y1=10;
(2) triggering queue is generated;
4, list item is triggered:
(1) fall out from triggering queue successively, computational logic result;
(2) according to logical consequence and registration attribute, synchronous triggers callback function, causes the action behavior such as interlocking, control, AVR, AGC;
The present invention also provides the system of a kind of power automation task scheduling and trigger mechanism, this system comprises shared drive, Installed System Memory, processor, system bus, wherein, described processor is connected with described shared drive, described Installed System Memory, described system bus;
Processor is used for from described shared drive, reading configuration information and setting up expression tree and be loaded on described Installed System Memory; Processor inputs information by interrupt scanning, by the task of described input information representation, lines up at least one queue according to described expression tree; Processor is to system bus sending action signal, thus trigger action performs described task.
The present invention also provides the processor of a kind of power automation task scheduling and trigger mechanism, described processor scanning t test information; By the task of described input information representation, according to the attribute of described task by described task division at least one queue; Described processor puts in order according to task in described queue, sends actuating signal, thus triggers the execution of task in described queue.
Processor in the present invention can be the processor of the types such as DSP, single-chip microcomputer, CPU.
Above embodiment is only and technological thought of the present invention is described, can not limit protection scope of the present invention with this, and every technological thought proposed according to the present invention, any change that technical scheme basis is done, all falls within scope.
Claims (12)
1. the method for a power automation task scheduling and trigger mechanism, it is characterized in that, described method comprises step: processor scanning t test information, by the task of described input information representation, according to the attribute of described task by described task division at least one queue; Described processor puts in order according to task in described queue, sends actuating signal, triggers the execution of task in described queue.
2. the method for power automation task scheduling according to claim 1 and trigger mechanism, it is characterized in that, before described processor scanning t test information, described method also comprises: described processor reads configuration information from shared drive, and be loaded on Installed System Memory, resolution logic configuration file, sets up summary list item, input list item, exports list item, formula list item; According to input, output, formula three elements, generate data structure through grammatical analysis.
3. the method for power automation task scheduling according to claim 1 and trigger mechanism, it is characterized in that, by described task division at least one queue, specifically be divided into two queuing stages, wherein the first stage is according to the intensity of variation of described input information present worth and initial value, the task of described information representation is divided into other first queue of different priorities; Described calculation task, according to the calculating of the calculation task in the described task in each described first queue successively requirement, is arranged in the second queue by subordinate phase.
4. the method for power automation task scheduling according to claim 2 and trigger mechanism, it is characterized in that, by described task division at least one queue, specifically be divided into two queuing stages, wherein the first stage is according to the intensity of variation of described input information present worth and initial value, the task of described information representation is divided into other first queue of different priorities; In subordinate phase, according to described data structure, adopt top down method to carry out prioritization the calculation task in the described task in each described first queue, be arranged in the second queue.
5. the method for power automation task scheduling according to claim 3 and trigger mechanism, it is characterized in that, the described first stage specifically comprises: according to loop cycle and sudden change trigger mechanism, the task that burst information is expressed is put into the first queue of high priority, the task that cycle information is expressed puts into the first queue of low priority.
6. the method for power automation task scheduling according to claim 3 and trigger mechanism, it is characterized in that, for the first queue of the described different priority level that the first stage is divided into, not yet execute the first queue task of described high priority if interrupt described in last time, then continue to perform described high priority first queue task.
7. the method for power automation task scheduling according to claim 3 and trigger mechanism, it is characterized in that, for the first queue of the described different priority level that the first stage is divided into, if the high-priority task continuous execution time exceedes threshold values, then Priority Inversion, first queue-level of low priority is promoted, uses CPU.
8. the method for power automation task scheduling according to claim 4 and trigger mechanism, it is characterized in that, in subordinate phase, described calculation task sequence is specifically referred to, described data structure is expression tree, from root node to leaf node iteration, for needing the preferential calculation task performed to be classified as the second types of variables, the calculation task performed according to the second variable execution result is needed to be classified as the first types of variables, according to described first variable and described second variable, arrange out the second queue.
9. the method for power automation task scheduling according to claim 1 and trigger mechanism, it is characterized in that, describedly send actuating signal, thus the execution triggering task in described queue specifically refers to: the task in described queue fallen out from queue successively, computational logic result; According to described logical consequence and registration attribute, synchronous triggers callback function, sends actuating signal to system bus, causes interlocking, control, AVR, AGC action behavior.
10. the system of a power automation task scheduling and trigger mechanism, it is characterized in that, described system comprises shared drive, Installed System Memory, processor, system bus, and wherein, described processor is connected with described shared drive, described Installed System Memory, described system bus;
Described processor, for reading configuration information and setting up data structure and be loaded on described Installed System Memory from described shared drive; Described processor scanning t test information, by the task of described input information representation, lines up at least one queue according to described data structure; Described processor, to described system bus sending action signal, triggers the execution of task in described queue.
The system of 11. power automation task schedulings according to claim 10 and trigger mechanism, is characterized in that, the execution of task in the described queue of described triggering, comprises the execution of interlocking, control, AVR, AGC action behavior.
The processor of 12. 1 kinds of power automation task schedulings and trigger mechanism, is characterized in that, described processor scanning t test information; By the task of described input information representation, according to the attribute of described task by described task division at least one queue; Described processor puts in order according to task in described queue, sends actuating signal, triggers the execution of task in described queue.
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