CN104700047A - Information leakage prevention security design method - Google Patents

Abstract

The invention discloses a security design method capable of preventing the leakage of sensitive information such as a key. According to the method, information leakage during the reading of the sensitive information out of a memory and the writing of the sensitive information into a destination register can be prevented; power consumption information related to the number of 0/1 in the sensitive information is prevented from being leaked when being read out of the memory and written into the destination register by splitting and covering the sensitive information and performing equalization processing during the writing of the destination register.

Description

A kind of Security Design Methods resisting leakage of information

Technical field

The present invention relates to safety protection of chip technology, be specifically related to a kind of Security Design Methods resisting leakage of information, sensitive information can be resisted and read from storer and the information leakage produced during write destination register.

Background technology

Along with smart card is in the application of financial field, the security of chip gets the attention.Chip not only needs to complete specific function, performance, also needs to resist attack simultaneously, prevents the leakage of attacking the security information caused.

The sensitive informations such as key are generally stored in nonvolatile memory inside, when this sensitive information reads use from storer, mountain 0/1 number in the byte forming the sensitive informations such as key is different, the transient power consumption of chip can be made to produce difference, and assailant utilizes the power consumption difference of chip to carry out the acquisition of sensitive information by attack meanses such as differential power consumption analysis.

In order to reach the object that opposing is attacked; the method of the more sensitive information such as new key after general employing uses at every turn; but the method can propose high requirement to the write life-span of storer, also need the mirror image protection problem considering power down simultaneously, adverse effect will be brought to overall chip performance and reliability.

The present invention is directed to a kind of method that the problems referred to above propose hiding change of power consumption, the reading of the sensitive informations such as key no longer causes the difference of power consumption, make assailant that this information cannot be utilized to carry out the acquisition of sensitive information, thus reach the object preventing sensitive information leakage.

Summary of the invention

The present invention proposes the Security Design Methods preventing the sensitive informations such as key from leaking, the method can be resisted sensitive information and be read from storer and the information leakage produced during write destination register, the method, by the fractionation of sensitive information and equilibrium treatment when covering and write destination register, makes the power consumption information relevant to 0/1 number in sensitive information do not revealed when reading from storer and write destination register.The method specifically comprises following steps:

(1) the sensitive information K such as key are split into n part K0, K1 ... Kn-1} (n be more than or equal to 2 integer);

(2) by every part of information with cover information S and combine formation storage cell T (word once read or byte), the length of S be every part of message length m times (m be more than or equal to 1 integer); Making 0/1 number in storage cell T identical, namely by covering information, 0/1 number of sensitive information being covered;

(3) storage content is read according to storage cell;

(4) if the sensitive information of reading to be write direct destination register, then can produce power consumption during write to reveal, the invention provides two kinds of solutions, one is that the information of T is all write destination register, and two is that the inversion signal of K and K/K is write destination register.Only use information protection in effective sensitive information K, K application process during application not within the scope of the discussion of this patent;

(5) forward (3) to and read next storage unit, until all information reads and completes storage.

Then can hide by said method and step 0/1 number contained because of sensitive information different, read and the information leakage that causes in destination register ablation process at storer.

Accompanying drawing explanation

Fig. 1 all writes the inventive method schematic diagram of destination register

Fig. 2 K and/K writes the inventive method schematic diagram of destination register

Embodiment:

In order to understand the present invention better, below in conjunction with accompanying drawing, its course of work is described in detail.

Suppose by sensitive information K be 18 bit number 01 10 11 01}, for avoiding assailant to utilize the power consumption information relevant to 0/1 number to obtain this sensitive information, carry out as follows data store with read:

(1) K is divided into n part, composition graphs 1, supposes n=4 part, be divided into K3={01} by K, K2={10}, K1={11}, K0={01};

(2) covering it with covering information S, supposing m=3, every part of K covers with 3 times of its length, such as, to K0, adopts S0, S1, S2 to cover.The value of S0, S1, S2 should make T0={S2, and 0/1 number in S1, S0, K0} is identical, such as K0=01, then { S2, S1, S0} can get { 00,01,11}; K1=11, then S5, S4, S3} can get 01,10,00}, the T0 ~ T3 formed like this is respectively stored in the storage unit of storer;

(3) from storer, read the content T0 of a storage unit;

(4) information read can be adopted in two ways stored in destination register, and method one is direct stored in destination register as shown in Figure 1; K0={01} and its corresponding inversion signal/K0={10} as shown in Figure 2, is only write destination register after reading T0 by method two.Method one needs to take more register resources, but can ensure good handling safety; It is less that method two occupies register resources, but inversion operation exists certain information leakage, and the noise as fruit chip itself can cover this leakage preferably, can use the method;

(5) forward to (3), from storer, read T1, according to (4) write destination register, write with register until T3 completes storer reading.

It should be noted that, in schematic diagram sensitive information with cover the position of information in a storage unit and can arrange arbitrarily, be not limited to the arrangement method provided in schematic diagram, as T0 can also arrange as { K0, S2, S1, S0} or { S2, K0, S1, S0}.

Claims (1)

1. resist a Security Design Methods for leakage of information, the method includes the steps of:

(1) key sensitive information K is split into n part, K ₀, K ₁... K _n-1, n be more than or equal to 2 integer;

(2) by every part of key sensitive information, combine formation storage cell T, a T be the word or byte that once read with covering information S, and the length of S is m times of every part of key sensitive information length, m be more than or equal to 1 integer; Making 0/1 number in storage cell T identical, namely by covering information, 0/1 number of key sensitive information being covered;

(3) storage content is read according to storage cell;

(4) information of T is all write destination register or the inversion signal of K and K/K is write destination register;

(5) forward (3) to and read next storage unit, until all information reads and completes storage.