CN104681461B - A kind of method of charging damage in detection photoetching process - Google Patents
A kind of method of charging damage in detection photoetching process Download PDFInfo
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- CN104681461B CN104681461B CN201310627626.0A CN201310627626A CN104681461B CN 104681461 B CN104681461 B CN 104681461B CN 201310627626 A CN201310627626 A CN 201310627626A CN 104681461 B CN104681461 B CN 104681461B
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- test pattern
- photoetching process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
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- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The present invention discloses a kind of method for detecting charging damage in photoetching process, comprises the following steps：Step 1, test pattern is increased in chip or scribe line when chip is designed；Step 2, corresponding reticle is prepared；Step 3, photoetching process is carried out with the reticle with test pattern, in the accumulation of test pattern area charge；Step 4, wet processing is carried out；Step 5, the assessment of defects detection and photoetching process charging damage is carried out to test pattern.Using the inventive method, the charging damage that photoetching process is produced conveniently can be timely and effectively assessed, the defect that optimization photoetching process condition is present is found early, finds to exclude the failure of lithographic equipment early, improves chip yield and reliability.
Description
Technical field
The invention belongs to semiconductor integrated circuit manufacture field, and in particular to the inspection in a kind of semiconductor integrated circuit manufacture
Survey method, more particularly to a kind of method for detecting charging damage in photoetching process.
Background technology
Photoetching is the conventional process of semiconductor integrated circuit manufacture.In photo-etching technological process, the chemical solvent such as developer with
The crystal column surface of rotation can produce electric charge when rubbing.Under normal circumstances, the electric charge that crystal column surface is produced can pass through chemistry examination
Ionic conduction in agent is discharged, but sometimes because etching condition sets improper, such as wafer rotating speed is too fast, or chemical reagent
Tell liquid not smooth, crystal column surface partial charge can be caused to gather, local strong electrochemical reaction is caused in subsequent wet technique,
Damage is caused in crystal column surface（See Fig. 1）, cause circuit malfunction or reliability to reduce, so as to cause yield rate to reduce or can
By property risk.
After the completion of existing photoetching process, generally only characteristic size can be measured（CD）And alignment（misalignment）Whether
Requirement is reached, and the charge buildup introduced for photoetching process and damage are accordingly difficult to hair in time without the detection of convenient means
Existing, the degree for charging damage is more difficult to assess, and often final step-electrical testing to chip manufacturing is just found, this
When not only make chip rejection, and the time cost caused can not make up.
The content of the invention
The technical problem to be solved in the present invention is to provide a kind of method for detecting charging damage in photoetching process, with photoetching work
The figure of charge buildup is more prone to during skill as test pattern, the defect due to etching condition is easily and timely found
With the failure of lithographic equipment and the charging damage that introduces, loss is avoided so as to take some countermeasures rapidly.
In order to solve the above technical problems, the present invention provides a kind of method for detecting charging damage in photoetching process, including such as
Lower step：
Step 1, test pattern is increased in chip or scribe line when chip is designed；
Step 2, corresponding reticle is prepared；
Step 3, photoetching process is carried out with the reticle with test pattern, in the accumulation of test pattern area charge；
Step 4, wet processing is carried out；
Step 5, the assessment of defects detection and photoetching process charging damage is carried out to test pattern.
In step 1, the test pattern is the cell array of repetition period arrangement, the ranks number difference of the cell array
For：2 to 10100, the selection of ranks number determines that the more Detection results of ranks number are better according to usable area on wafer.
In step 1, the unit of the test pattern is circle, I-shaped, or polygon.
In step 1, the minimum dimension of the side size range of the detection unit at 1 times to 10 times, the minimum dimension is design
The minimum dimension that rule allows；The area of the detection unit is 0.0001 square micron to 100 square microns.
In step 3, in the photoetching process, photoresist type is positive photoresist or negtive photoresist, the characteristic size of photoetching：0.001
To 5 microns.
In step 3, when carrying out photoetching process, wafer substrate is silica（SixOy）, silicon nitride（SixNy）, or other
Silicon compound material.
In step 4, the wet processing is that wet-etching technology, wet method degumming process, or wet method clean technique.
In step 5, the defect inspection method is microscope cervical arthroplasty, or automatic defect detection；Detection is found
It is determined as occurring charge buildup damage during defect, the defect is categorized as：The damage of crystal column surface punctures, silicon substrate
Puncture, the deformation of litho pattern or missing on wafer.
The inventive method principle：The present invention using with standard MOS (mos field effect transistor, below
Abbreviation MOS) compatible technique, increase test pattern in chip or scribe line when chip is designed, during using photoetching process
Charge buildup in test pattern region, by detecting the change of the test pattern after subsequent wet technique, monitors photoetching work
The degree that charge buildup is damaged in skill.
Technical essential：The present invention is, in common semiconductor chip design, to increase the test pattern of easy Accumulating charge,
By the change of test pattern after photoetching and wet processing, reflect the journey for the charge buildup damage that the step photoetching process is produced
Degree.
Implementation result：, can charge buildup be damaged during monitoring photoetching technology in time using detection method
Degree, is easy to assess whether the step photoetching process reaches technological requirement, it is to avoid the time wastes caused by chip ultimate failure.This hair
It is bright to be applied to the various semiconductor fabrication process that there is photoetching and wet processing.
Compared to the prior art, the invention has the advantages that：The present invention is by increasing the list of one group of repeated arrangement
Meta structure monitors the accumulation effect of electric charge as test pattern.When the chemical solvents such as developer and the crystal column surface of rotation occur
During friction, due to the special repeated arrangement design of test pattern, chemical reagent is not easy to flow out from detection unit, enhancing
Learn the friction of reagent and detection unit so that the charge buildup in test pattern region is more severe, the wafer table in test pattern region
Face is easier Accumulating charge.So, after photoetching process and follow-up wet processing are completed, outside to test pattern region
The inspection of sight, it becomes possible to assess the charging damage degree of step photoetching process generation, so that optimize photoetching process condition early, row
Except hidden danger.Using the inventive method, the charging damage that photoetching process is produced conveniently can be timely and effectively assessed, is found early excellent
Change the defect that photoetching process condition is present, find to exclude the failure of lithographic equipment early, improve chip yield and reliability.Point
Group experiment shows, as the Rinse in etching condition（Cleaning）When time and rotation speed change（Producing the quantity of electric charge of accumulation can change）,
Respective change can also occur for the defect concentration in test pattern, as shown in Fig. 2 photoetching Rinse condition grouping experiment results show：
Rotating speed is faster, and the time is longer, and charging damage defect is more.Illustrate that the test pattern can effectively monitor photoetching process introducing
Electric charge.
Brief description of the drawings
Fig. 1 is the schematic diagram for the charging damage that existing photoetching process is introduced；
Fig. 2 is photoetching Rinse conditions grouping experiment result schematic diagram of the present invention；
Fig. 3 is the cellular construction schematic diagram of the test pattern of the present invention；
Fig. 4 is the test pattern of the square unit structure of the present invention；
Fig. 5 is the test pattern of the hexagon shaped cell structure of the present invention；
Fig. 6 is the test pattern of the diamond-shaped element structure of the present invention；
Fig. 7 is the test pattern of the I-shaped cellular construction of the present invention；
Fig. 8 is lithographic chemical reagent in step 3 of the present invention（Such as developer）Flowage friction produces electricity in test pattern
The schematic cross-section of lotus；
Fig. 9 is lithographic chemical reagent in step 3 of the present invention（Such as developer）Flowage friction produces electricity in test pattern
The schematic top plan view of lotus；
Chemical reaction schematic diagram locally occurs for test pattern when Figure 10 is wet processing in step 4 of the present invention；
Figure 11 is the defect example schematic diagram of several photoetching process charging damages in step 5 of the present invention.
Embodiment
The present invention is further detailed explanation with reference to the accompanying drawings and examples.
A kind of method for detecting charging damage in photoetching process of the present invention, this method can be applied to after photoetching immediately following wet method
Semiconductor technology, this method specifically includes following steps：
Step 1：In product layout design, test pattern is placed in chip or scribe line（Test pattern can be put
In the chips（Crystal round utilization ratio is influenceed, is not recommended）, can also be placed among scribe line（Recommend））.The test pattern is by Fig. 3
The cell array of shown detection unit repeated arrangement composition, as shown in Figure 4, Figure 5, Figure 6 and Figure 7.The unit knot of test pattern
Structure can be circle, I-shaped, or polygon.As shown in figure 3, the cellular construction of test pattern can be square, hexagon,
Rhombus, I-shaped, Fig. 4 is the test pattern of square unit structure, and Fig. 5 is the test pattern of hexagon shaped cell structure, and Fig. 6 is water chestnut
The test pattern of shape cellular construction, Fig. 7 is that the black region representative in the test pattern of I-shaped cellular construction, Fig. 3-Fig. 7 has
Photoresist, white portion represents unglazed photoresist.The area of detection unit can be from 0.0001 square micron to 100 square microns.
The ranks number of cell array is respectively：2 to 10100, the selection of ranks number determines that ranks number is more according to usable area on wafer
Detection results are better.The minimum dimension allowed according to different levels design rule defines the length of side of detection unit, detection unit
Minimum dimension of the side size range at 1 times to 10 times, the minimum dimension is the minimum dimension that design rule allows.
Step 2：After product domain and test pattern are determined, start to prepare reticle.
Step 3：Normal photoetching process is carried out with the reticle with test pattern（Without especially operating）.With Fig. 4 institutes
Exemplified by the square test pattern shown.In photoetching process, chemical reagent（Such as developer）Flowing in test pattern, which is overlooked, to be shown
It is intended to as shown in figure 9, schematic cross-section is as shown in Figure 8.Photoresist type is positive photoresist or negtive photoresist, the characteristic size of photoetching：
0.001 to 5 microns.When carrying out photoetching process, wafer substrate is silica（SixOy）, silicon nitride（SixNy）, or other silicon
Compound-material.Due to the repeated arrangement of a large amount of unit figures in the barrier effect and test pattern of photoresist, compared to it
He does not have the region of photoresist and the region without repeated arrangement figure, and the friction of chemical reagent and test pattern is bigger, changes
Residence time of the reagent in test pattern is longer, so as to be easier to produce electric charge in test pattern region.
Step 4：After photoetching is completed, follow-up wet processing is carried out（Can be wet-etching technology, wet method is removed photoresist work
Skill, or wet method clean technique）.When the chemical reagent of wafer contacts wet processing, what photoetching process was introduced in wafer
Electric charge can cause the violent electrochemical reaction of regional area, cause damage to form defect on the surface of wafer, as shown in Figure 10.
Step 5：The detection of defect and the assessment of photoetching process charging damage.After photoetching and subsequent wet technique are completed
Defects detection is carried out to test pattern.Detection method can be microscope cervical arthroplasty or automatic defect detection.Detection
It was found that being judged to there occurs charge buildup and damage during defect.The classification of defect：The damage of crystal column surface punctures, silicon lining
Bottom punctures, the deformation of litho pattern or missing on wafer.Figure 11 provides several defect examples.For same detection figure
Shape, defect concentration is bigger, illustrates that the charging damage introduced in a lithographic process is more serious.Using the inventive method, it can facilitate
The charging damage that photoetching process is produced effectively is assessed, the defect that optimization photoetching process condition is present is found early, is found early
The failure of lithographic equipment is excluded, chip yield and reliability is improved.
The thinking of the present invention is to monitor electric charge by increasing the cellular construction of one group of repeated arrangement as test pattern
Gather effect.When the chemical solvents such as developer with rotation crystal column surface rub when, due to photoresist barrier effect with
And in test pattern a large amount of unit figures repeated arrangement, there is no the region of photoresist and no repeated arrangement compared to other
The friction of the region of figure, chemical reagent and test pattern is bigger, and residence time of the chemical reagent in test pattern is longer, from
And be easier to produce electric charge in test pattern region.When wafer contacts wet chemistry reagent in follow-up wet processing, inspection
The electric charge gathered in mapping shape can cause the violent electrochemical reaction of regional area, cause damage to be formed on the surface of wafer and lack
Fall into.So, the inspection to test pattern region outward appearance is passed through, it becomes possible to assess the charge buildup and damage of step photoetching process generation
Hinder degree, so as to optimize photoetching process condition early, exclude hidden danger.
Claims (8)
1. a kind of method for detecting charging damage in photoetching process, it is characterised in that comprise the following steps：
Step 1, test pattern is increased in chip or scribe line when chip is designed, the test pattern is used in photoetching work
Regions more other than chip are more prone to the figure of charge buildup during skill；
Step 2, corresponding reticle is prepared；
Step 3, photoetching process is carried out with the reticle with test pattern, in the accumulation of test pattern area charge；
Step 4, wet processing is carried out；
Step 5, the assessment of defects detection and photoetching process charging damage is carried out to test pattern.
2. according to the method described in claim 1, it is characterised in that in step 1, the test pattern is repetition period arrangement
Cell array, the ranks number of the cell array is respectively：2 to 10100, the selection of ranks number determines according to usable area on wafer,
The more Detection results of ranks number are better.
3. method according to claim 2, it is characterised in that in step 1, the unit of the test pattern is circular, work
Font, or polygon.
4. method according to claim 2, it is characterised in that in step 1, the side size range of the detection unit is at 1 times
To 10 times of minimum dimension, the minimum dimension is the minimum dimension that design rule allows；The area of the detection unit is
0.0001 square micron to 100 square microns.
5. according to the method described in claim 1, it is characterised in that in step 3, in the photoetching process, photoresist type is
Positive photoresist or negtive photoresist, the characteristic size of photoetching：0.001 to 5 microns.
6. according to the method described in claim 1, it is characterised in that in step 3, carry out photoetching process, wafer substrate is oxygen
SiClx (SixOy), silicon nitride (SixNy), or other silicon compound materials.
7. according to the method described in claim 1, it is characterised in that in step 4, the wet processing is wet-etching technology,
Wet method degumming process, or wet method clean technique.
8. according to the method described in claim 1, it is characterised in that in step 5, the defect inspection method is that microscope is artificial
Microscopy, or automatic defect detection；Detection finds to be determined as occurring charge buildup damage, the classification of the defect during defect
For：The damage of crystal column surface punctures, and silicon substrate punctures, the deformation of litho pattern or missing on wafer.
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| CN201310627626.0A CN104681461B (en) | 2013-11-29 | 2013-11-29 | A kind of method of charging damage in detection photoetching process |
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| CN102087468A (en) * | 2009-12-04 | 2011-06-08 | 中芯国际集成电路制造(上海)有限公司 | Photomask |
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| JP2006191021A (en) * | 2004-12-30 | 2006-07-20 | Siltron Inc | Corrosion liquid for silicon wafer d-defect evaluation and evaluation method using this liquid |
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