CN104679687B - A kind of method and device for identifying interrupt source - Google Patents

A kind of method and device for identifying interrupt source Download PDF

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CN104679687B
CN104679687B CN201410797967.7A CN201410797967A CN104679687B CN 104679687 B CN104679687 B CN 104679687B CN 201410797967 A CN201410797967 A CN 201410797967A CN 104679687 B CN104679687 B CN 104679687B
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interrupt
data field
message
interrupt source
source
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CN104679687A (en
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李延松
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Huawei Technologies Co Ltd
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Hangzhou Huawei Digital Technologies Co Ltd
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Abstract

The embodiment of the invention discloses a kind of method for identifying interrupt source, and the problems of interrupt source is identified in the prior art for solution, the described method includes:When any one module of ancillary equipment is interrupted, the module is 16 high by the data field of the corresponding interrupt number write-in message transmission interrupt capabilities structure of interrupt source as interrupt source;High 16 of the data field is incorporated into the messages of message transmission interruption by the ancillary equipment;The message being incorporated into is sent to central processor CPU by the ancillary equipment, so that the data field low 16 identification ancillary equipment of the CPU according to the message, according to the data field of the message high 16 identification interrupt source.The embodiment of the present invention also provides the device of corresponding identification interrupt source.

Description

A kind of method and device for identifying interrupt source
Technical field
The present invention relates to the communications field, and in particular to a kind of method and device for identifying interrupt source.
Background technology
In computer systems, ancillary equipment usually require central processing unit (Central Processing Unit, CPU interrupt processing) is performed, such as ancillary equipment needs CPU to read data, or ancillary equipment needs CPU to handle ancillary equipment The mistake occurred in operation, all can send interrupt signal to CPU, and CPU suspends currently performed task after receiving interrupt signal, Turn to go to perform the corresponding interrupt handling routine of ancillary equipment for sending interrupt signal, that is, read data, processing mistake etc., wherein, The ancillary equipment for sending interrupt signal is properly termed as interrupt source (this be from the angle outside ancillary equipment to define), can also The module for occurring state change inside ancillary equipment and making ancillary equipment send interrupt signal will be caused to be referred to as interrupt source (this Be to be defined from the angle inside ancillary equipment, granularity smaller), such as data reception module inside ancillary equipment detects Data check mistake, or buffer overflow is received, interrupt source can be can be regarded as, therefore, identification interrupt source is correct execution pair The interrupt handling routine answered, makes the premise of computer system normal operation.
At present, a kind of prior art is:Ancillary equipment interconnection (Peripheral Component Inte Rconnect, PCI) support tetra- interrupt pins of INTA#/INTB#/INTC#/INTD# (# represents that low level is effective), wherein, bridge Interrupt control unit is connected with piece, some pin is changed into low level when there is interruption to occur, and then interrupt control unit notice CPU is held Row interrupt processing, multiple device PCIs can share some interrupt signal, and CPU needs to inquire about each device PCI when an interrupt occurs Internal interrupt status register, confirms specific interrupt source.Such as the device PCI one and device PCI two of Fig. 1 share INTA# Signal, if device PCI two interrupts, then CPU must access the interruption inside device PCI one and device PCI two successively Status register just can confirm that be device PCI two produce interruption, so as to perform corresponding interrupt handling routine.However, due to The interrupt status register that CPU accesses inside device PCI is needed by bridge piece and device PCI, and speed is slow, therefore adds interruption Processing delay and the expense of CPU.
Another prior art is:Ancillary equipment interconnection express passway (Peripheral Component Interconnect express, PCIe) support message transmission interrupt (Message Signaled Interrupt, MSI) or The message transmission of person's extension interrupts (Message Signaled Interrupt extension, MSI-X) mode, when there is interruption During generation, such as exclusive interrupt number is actively sent to by PCIe interface and is connected in bridge piece by the PCIe device of Fig. 2 Disconnected controller, interrupt control unit relay to CPU, and such CPU can directly confirm the ancillary equipment interrupted, wherein, MSI Agreement could support up 32 interrupt numbers, and MSI-X could support up 2048 interrupt numbers, and the mode with respect to hardware interrupt is supported more More interrupt source.However, it is contemplated that the cost realized, the interrupt number number that actual PCIe device can be supported is more than protocol definition Lack, current MSI or MSI-X modes can not accomplish that each interrupt source has the interrupt number of oneself, it is still desirable to CPU inquiry tool The interrupt source of body.
The content of the invention
An embodiment of the present invention provides a kind of method and device for identifying interrupt source, for solving in identifying in the prior art The problems of disconnected source.
First aspect present invention provides a kind of method for identifying interrupt source, including:
When any one module of ancillary equipment is interrupted, the module corresponds to the interrupt source as interrupt source Interrupt number write-in message transmission interrupt capabilities structure data field it is 16 high, the ancillary equipment includes multiple and different levels Module;
The ancillary equipment also includes high 16 messages for being incorporated into message transmission interruption of the data field, the message Data field is 16 low;
The message being incorporated into is sent to central processor CPU by the ancillary equipment, so that the CPU is according to The data field low 16 identification ancillary equipment of message, according to the data field of the message high 16 identification interruption Source.
With reference to first aspect, in the first possible implementation, the method further includes:
When the corresponding upper layer module of the interrupt source, which detects the interrupt source, to interrupt, the upper layer module will The data field of the corresponding interrupt number write-in message transmission interrupt capabilities structure of the upper layer module is 16 high.
With reference to first aspect, in second of possible implementation, the module is as interrupt source by the interrupt source High 16 of the data field of corresponding interrupt number write-in message transmission interrupt capabilities structure includes:
The corresponding interrupt number of the interrupt source is write message transmission interrupt capabilities structure by the module as interrupt source Corresponding field in high 16 of data field, high 16 of the data field have multiple fields, high 16 of the data field Field level corresponding with the module of the ancillary equipment is into correspondence.
The possible implementation of with reference to first aspect the first, in the third possible implementation, the interruption The corresponding upper layer module in source, which detects the interrupt source generation interruption, to be included:
The result that set occurs according to the interrupt status position of the interrupt source for the corresponding upper layer module of the interrupt source is examined The interrupt source is surveyed to interrupt.
The possible implementation of with reference to first aspect the first, in the 4th kind of possible implementation, the upper strata Secondary module is by high 16 bags of data field of the corresponding interrupt number write-in message transmission interrupt capabilities structure of the upper layer module Include:
The upper layer module is by the corresponding interrupt number write-in message transmission interrupt capabilities structure of the upper layer module Corresponding field in high 16 of data field.
Second aspect of the present invention provides a kind of method for identifying interrupt source, including:
CPU receives the messages that high 16 of data field is incorporated into message transmission interruption that ancillary equipment is sent, the message It is also 16 low comprising data field;
The CPU judges whether high 16 of the data field of the message is 0, if it is not, the CPU is according to the message The data field low 16 identification ancillary equipment, according to the data field of the message high 16 identification interrupt source.
With reference to second aspect, in the first possible implementation, the CPU is high according to the data field of the message 16 identification interrupt sources include:
The CPU is according to the interruption of the corresponding interrupt number of the interrupt source or the corresponding upper layer module of the interrupt source Number, identify the interrupt source.
Third aspect present invention provides a kind of device for identifying interrupt source, including:
First writing unit, for when any one module of ancillary equipment is interrupted, the interrupt source to be corresponded to Interrupt number write-in message transmission interrupt capabilities structure data field it is 16 high, the ancillary equipment includes multiple and different levels Module;
Unit is incorporated into, for writing the interrupt source corresponding interrupt number in message transmission in first writing unit It is described by high 16 messages for being incorporated into message transmission interruption of the data field after high 16 of the data field of cutting capacity structure Message is also 16 low comprising data field;
Transmitting element, in the messages for being incorporated into unit and high 16 of the data field being incorporated into message transmission interruption Afterwards, the message being incorporated into is sent to CPU, so that data field low 16 identification institutes of the CPU according to the message Ancillary equipment is stated, according to the data field of the message high 16 identification interrupt source.
With reference to the third aspect, in the first possible implementation, further include:
Detection unit, for writing the interrupt source corresponding interrupt number in message transmission in first writing unit After high 16 of the data field of cutting capacity structure, detect whether the interrupt source interrupts;
Second writing unit, for when the detection unit detects the interrupt source and interrupts, by the interrupt source The data field of the corresponding interrupt number write-in message transmission interrupt capabilities structure of corresponding upper layer module is 16 high.
With reference to the third aspect, in second of possible implementation,
First writing unit, specifically for the corresponding interrupt number of the interrupt source is write message transmission interrupt capabilities Corresponding field in high 16 of the data field of structure, high 16 of the data field have multiple fields, and the data field is high The level corresponding with the module of the ancillary equipment of the field of 16 is into correspondence.
With reference to the first possible implementation of the third aspect, in the third possible implementation,
The detection unit, specifically for being occurred according to the interrupt status position of the interrupt source described in the result detection of set Interrupt source is interrupted.
With reference to the first possible implementation of the third aspect, in the 4th kind of possible implementation,
Second writing unit, specifically for the corresponding interrupt number write-in message transmission of the upper layer module is interrupted Corresponding field in high 16 of the data field of ability structure.
Fourth aspect present invention provides a kind of device for identifying interrupt source, including:
Receiving unit, for receiving the reports that high 16 of data field is incorporated into message transmission interruption of ancillary equipment transmission Text, the message are also 16 low comprising data field;
Judging unit, for data field to be incorporated into message high 16 in receiving unit reception ancillary equipment transmission After transmitting the message interrupted, whether high 16 of data field for judging the message is 0;
Recognition unit, when high 16 of data field for judging the message when the judging unit is not for 0, according to institute State the data field low 16 identification ancillary equipment of message, according to high 16 identification of the data field of the message it is described in Disconnected source.
With reference to fourth aspect, in the first possible implementation,
The recognition unit, specifically for according to the corresponding interrupt number of the interrupt source or the corresponding upper strata of the interrupt source The interrupt number of secondary module, identifies the interrupt source.
As can be seen that in the technical solution of some embodiments of the invention, when any one module of ancillary equipment occurs During interruption, the corresponding interrupt number of interrupt source is write the data word of message transmission interrupt capabilities structure as interrupt source by the module Section is 16 high, and high 16 of the data field is incorporated into the messages of message transmission interruption, the ancillary equipment by the ancillary equipment The message being incorporated into is sent to central processor CPU, so that the CPU is low 16 according to the data field of the message Identify the ancillary equipment, according to the data field of the message high 16 identification interrupt source, using above technical scheme, Each interrupt source has corresponding interrupt number so that CPU need not inquire about all interrupt status registers completely, directly according to report The high 16 identification interrupt source of data field of text, reduces interruption delay and the expense of CPU.
Brief description of the drawings
Fig. 1 is a structure diagram of the method for identifying interrupt source in the prior art;
Fig. 2 is another structure diagram for the method for identifying interrupt source in the prior art;
Fig. 3 is a structure diagram of the method that interrupt source is identified in the embodiment of the present invention;
Fig. 4 is one embodiment schematic diagram for the method that interrupt source is identified in the embodiment of the present invention;
Fig. 5 is another embodiment schematic diagram for the method that interrupt source is identified in the embodiment of the present invention;
Fig. 6 is another embodiment schematic diagram for the method that interrupt source is identified in the embodiment of the present invention;
Fig. 7 is another embodiment schematic diagram for the method that interrupt source is identified in the embodiment of the present invention;
Fig. 8 is one embodiment schematic diagram for the device that interrupt source is identified in the embodiment of the present invention;
Fig. 9 is another embodiment schematic diagram for the device that interrupt source is identified in the embodiment of the present invention;
Figure 10 is another embodiment schematic diagram for the device that interrupt source is identified in the embodiment of the present invention;
Figure 11 is a structure diagram of the device that interrupt source is identified in the embodiment of the present invention.
Embodiment
An embodiment of the present invention provides a kind of method and device for identifying interrupt source, for solving in identifying in the prior art The problems of disconnected source.
Term " first ", " second ", " the 3rd " " in description and claims of this specification and above-mentioned attached drawing Four " etc. be for distinguishing different objects, rather than for describing particular order.In addition, term " comprising " and " having " and Their any deformations, it is intended that cover non-exclusive include.Such as contain the process of series of steps or unit, method, The step of system, product or equipment are not limited to list or unit, but alternatively further include the step of not listing or Unit, or alternatively further include for the intrinsic other steps of these processes, method, product or equipment or unit.
The method for first introducing identification interrupt source provided in an embodiment of the present invention below, the application system bag of the embodiment of the present invention Include:Ancillary equipment, bridge piece, CPU, memory, wherein, there is interrupt control unit in bridge piece, some interrupt control units can be integrated in CPU, the executive agent of identification interrupt source provided in an embodiment of the present invention is ancillary equipment, which can be department of computer science In system in addition to CPU and main memory other any devices, such as video card, network interface card etc..Wherein, which includes multiple and different The module of level, such as the first layer module, the second layer module, third level module etc., the second layer module represent each The corresponding subordinate's module of first layer module, third level module represent the corresponding subordinate's module of each second layer module.Often One level has corresponding interrupt status register, each interrupt status register and owning with same upper layer module The layer module is corresponding, and exemplified by as described in Figure 3, all first layer modules share the first level interrupt status deposit Device, all second layer modules for being subordinated to same first layer module share a second level interrupt status register, There are 5 the second level interrupt status registers (because the first layer module there are 5) in figure 3, be subordinated to each second level All third level modules of module share a third level interrupt status register, have 8 third levels to interrupt in figure 3 Status register (because the second layer module for being subordinated to same first layer module has 8).The embodiment of the present invention is external The message format that the message transmission that peripheral equipment uses is interrupted is extended, and can be carried more information, particularly be embodied The message of interrupt source hierarchical structure, easy to CPU Direct Recognition interrupt sources, avoids all interrupt status deposit of inquiry ancillary equipment The delay that device is brought.
Referring to Fig. 4, one embodiment of the method for interrupt source is identified in the embodiment of the present invention to be included:
401st, when any one module of ancillary equipment is interrupted, the module is corresponding by interrupt source as interrupt source The data field of interrupt number write-in message transmission interrupt capabilities structure is 16 high;
In embodiments of the present invention, ancillary equipment includes the module of multiple and different levels, such as the first layer module, and second Layer module, third level module etc., any one third level module occur to interrupt when being used as interrupt source, have it is corresponding in Disconnected number.
It should be noted that it can be MSI or MSI-X that message transmission, which is interrupted, it is not specifically limited herein.
It should be noted that ancillary equipment configuration space be specially provided with message transmission interruption ability structure be One group of register in the configuration space of PCIe device, forms a data structure, which includes multiple fields, the word Section includes message addresses Message Address, message high address Message Upper Address and message data Message Data fields, wherein Message Address and Message Upper Address fields are all ancillary equipment hairs Message transmission is sent to interrupt the destination address of message, message transmission, which is interrupted, supports two kinds of address widths, and one is 32, the other is 64, the latter is more, and 32 bit address Message Upper Address, Message Data one high is 32 data, existing Have and define only low 16 in technology, it is 0 that high 16 are default, and unlike the prior art, it is not only fixed in the embodiment of the present invention It is low 16 adopted, also define 16 high.
Such as:When any one third level module is interrupted, the corresponding second level mould of the third level module Block and the first layer module are 16 high by the data field of corresponding interrupt number write-in message transmission interrupt capabilities structure respectively, its The value range of middle high 16 of data field is 64K, by taking high 16 of data field is divided into three fields as an example, such as 4-4-8 ( One the-the second level of level-third level), 16 are up to equivalent to the first layer module, each first layer module subordinate's Second layer module is up to 16, and the third level module of each second layer module subordinate is up to 256.For first The modules of level, each module have unique interrupt number, such as the first layer module one is produced when interrupting, and first One value 0001 of layer module, two value 0010 of the first layer module, three value 0011 of the first layer module, behind analogize, Two layer modules, the obtaining value method of third level module corresponding field are similar.This level knot can not certainly be used Structure, but third level module is only unified into interrupt number and is stored in the 16 high of Message Data fields, but so meeting The hierarchy information of intermodule is lost, is unfavorable for the optimization of interrupt processing.Such as in some cases, when cpu identifies some layer After secondary module produces interruption, it is not necessary to identify the interruption that Subordinate module produces, can directly make corresponding interrupt processing, not have to Continue to identify Subordinate module, so as to improve interrupt processing efficiency.
402nd, high 16 of data field is incorporated into the messages of message transmission interruption by ancillary equipment;
In embodiments of the present invention, the message is also 16 low comprising data field, and wherein low 16 of data field is used to know Other ancillary equipment, high 16 of data field are used to identify interrupt source.
It is understood that when some third level module is interrupted in ancillary equipment, third level module, the 3rd Second layer module of layer module subordinate, the first layer module of the second layer module subordinate write corresponding interrupt number respectively Enter the corresponding field (hardware realization) of above-mentioned high 16, low 16 data and message that with reference to software initialization when has configured Location, is combined into the message of message transmission interruption.
403rd, the message being incorporated into is sent to central processor CPU by ancillary equipment, so that data words of the CPU according to message The low 16 identification ancillary equipment of section, according to the high 16 identification interrupt source of the data field of message.
In embodiments of the present invention, if interrupt control unit is not integrated in CPU, ancillary equipment sends the message being incorporated into Received message is transmitted to CPU to the interrupt control unit in bridge piece, then by bridge piece, so that CPU performs interrupt handling routine.
In the technical solution of some embodiments of the invention, when any one module of ancillary equipment is interrupted, institute It is as interrupt source that the data field of the corresponding interrupt number write-in message transmission interrupt capabilities structure of the interrupt source is high to state module 16, high 16 of the data field is incorporated into the messages of message transmission interruption by the ancillary equipment, and the ancillary equipment is by institute State the message being incorporated into and be sent to central processor CPU, so that data field low 16 identifications of the CPU according to the message The ancillary equipment, according to the data field of the message high 16 identification interrupt source, using above technical scheme, each Interrupt source has corresponding interrupt number so that CPU need not inquire about all interrupt status registers completely, directly according to message The high 16 identification interrupt source of data field, reduces interruption delay and the expense of CPU.
Referring to Fig. 5, another embodiment of the method for interrupt source is identified in the embodiment of the present invention to be included:
501st, when any one module of ancillary equipment is interrupted, the module is corresponding by interrupt source as interrupt source The data field of interrupt number write-in message transmission interrupt capabilities structure is 16 high;
Optionally, the corresponding interrupt number of interrupt source is write message transmission interrupt capabilities structure by the module as interrupt source High 16 of data field in corresponding field, high 16 of the data field has multiple fields, and the data field is 16 high Field level corresponding with the module of the ancillary equipment into correspondence.
In embodiments of the present invention, ancillary equipment includes the module of multiple and different levels, such as the first layer module, and second Layer module, third level module etc., any one third level module are likely to occur to interrupt and are used as interrupt source, its In, any one interrupt source has corresponding interrupt number, and high 16 of data field has multiple fields, and the data field is 16 high Field level corresponding with the module of the ancillary equipment into correspondence.
It should be noted that it can be MSI or MSI-X that message transmission, which is interrupted, it is not specifically limited herein.
It should be noted that ancillary equipment configuration space be specially provided with message transmission interruption ability structure, should Ability structure includes multiple fields, which includes Message Address, Message Upper Address and Message Data fields, wherein Message Address and Message Upper Address fields are all ancillary equipment hairs Message transmission is sent to interrupt the destination address of message, message transmission, which is interrupted, supports two kinds of address widths, and one is 32, the other is 64, the latter is more, and 32 bit address Message Upper Address, Message Data one high is 32 data, existing Have and define only low 16 in technology, it is 0 that high 16 are default, and unlike the prior art, it is not only fixed in the embodiment of the present invention It is low 16 adopted, also define 16 high.
502nd, when the corresponding upper layer module detection interrupt source of interrupt source is interrupted, upper layer module is by upper level mould The data field of the corresponding interrupt number write-in message transmission interrupt capabilities structure of block is 16 high;
Optionally, according to the interrupt status position of the interrupt source set occurs for the corresponding upper layer module of the interrupt source As a result the interrupt source is detected to interrupt.
Optionally, the corresponding interrupt number of the upper layer module is write message transmission interrupt capabilities by the upper layer module Corresponding field in high 16 of the data field of structure.
In certain embodiments, when certain layer module produces interruption, the correspondence in interrupt status register belonging to it Interrupt status position set occurs, such as when some lower layer module interrupts, it is corresponding to its upper layer module Interrupt status position all can set, it is right in third level interrupt status register when third level module one is interrupted Set should occur in the interrupt status position of third level module one, since third level module one is subordinated to the second layer module One, therefore set also occurs for the interrupt status position corresponding to the second layer module one in the second level interrupt status register. Similarly, it is right in the first level interrupt status register since the second layer module one is subordinated to the first layer module one Set should also occur in the interrupt status position of the first layer module one.
503rd, high 16 of data field is incorporated into the messages of message transmission interruption by ancillary equipment;
In embodiments of the present invention, message is also 16 low comprising data field, and wherein low 16 of data field is used to identify Ancillary equipment, high 16 of data field are used to identify interrupt source.
It is understood that when some third level module is interrupted in ancillary equipment, third level module, the 3rd Second layer module of layer module subordinate, the first layer module of the second layer module subordinate write corresponding interrupt number respectively Enter that above-mentioned data field is high 16 (hardware realizations), the data field that with reference to software initialization when has configured low 16 and message Location, is combined into the message of message transmission interruption.
504th, the message being incorporated into is sent to CPU by ancillary equipment, so that data field low 16 knowledges of the CPU according to message Other ancillary equipment, according to the high 16 identification interrupt source of the data field of message.
In embodiments of the present invention, if interrupt control unit is not integrated in CPU, ancillary equipment sends the message being incorporated into The message entered is transmitted to CPU to interrupt control unit, then by interrupt control unit, so that CPU performs interrupt processing.
In the technical solution of some embodiments of the invention, when any one module of ancillary equipment is interrupted, institute It is as interrupt source that the data field of the corresponding interrupt number write-in message transmission interrupt capabilities structure of interrupt source is 16 high to state module In corresponding field, when the corresponding upper layer module of the interrupt source, which detects the interrupt source, interrupts, the upper layer module The corresponding interrupt number of upper layer module is write to corresponding field in high 16 of the data field of message transmission interrupt capabilities structure, High 16 messages for being incorporated into message transmission interruption of the data field, the ancillary equipment are incorporated into by the ancillary equipment by described Message be sent to central processor CPU so that the CPU is described outer according to low 16 identification of the data field of the message Peripheral equipment is high using above technical scheme, data field according to the data field of the message high 16 identification interrupt source 16 have multiple fields, and the field level corresponding with the module of the ancillary equipment of high 16 of the data field is closed into corresponding System.Each interrupt source has corresponding interrupt number so that CPU need not inquire about all interrupt status registers, direct root completely According to the high 16 identification interrupt source of the data field of message, interruption delay and the expense of CPU are reduced.
On the basis of above-described embodiment, referring to Fig. 6, identifying another of the method for interrupt source in the embodiment of the present invention Embodiment includes:
601st, CPU receives the messages that high 16 of data field is incorporated into message transmission interruption that ancillary equipment is sent;
In embodiments of the present invention, the message is also 16 low comprising data field, and wherein low 16 of data field is used for Identify ancillary equipment, high 16 of data field is used to identify interrupt source.
It is understood that for example when some third level module is interrupted in ancillary equipment, third level module, Second layer module of third level module subordinate, the first layer module of the second layer module subordinate divide corresponding interrupt number Do not write that above-mentioned data field is high 16 (hardware realizations), the data field that with reference to software initialization when has configured is low and to disappear by 16 Address is ceased, is combined into the message of message transmission interruption.
602nd, CPU judges whether high 16 of the data field of message is 0, if it is not, performing step 603;
In embodiments of the present invention, low 16 be define only in the prior art, it is 0 that high 16 are default, and and the prior art Different, low 16 are define not only in the embodiment of the present invention, is also defined 16 high.
It should be noted that if high 16 of data field is 0, interrupt source, such as CPU roots are identified using the prior art It is investigated that asking all interrupt status register identification interrupt source, it is not specifically limited herein.
603rd, CPU identifies ancillary equipment according to low 16 of the data field of message, 16 high according to the data field of message Identify interrupt source.
In embodiments of the present invention, CPU is outer when determining first according to the low 16 identification ancillary equipment of data field of message After peripheral equipment, further according to the high 16 identification interrupt source of data field of message, it is to be understood that interrupt source is periphery One module of equipment.
In the technical solution of some embodiments of the invention, CPU receives ancillary equipment transmission data field is 16 high The message of message transmission interruption is incorporated into, the message is also 16 low comprising data field;CPU judges the data field of the message Whether high 16 be 0, if it is not, the data field low 16 identification ancillary equipment of the CPU according to the message, according to institute State the data field high 16 identification interrupt source of message, using above technical scheme, each interrupt source have it is corresponding in Disconnected number, CPU need not inquire about all interrupt status registers completely, directly be interrupted according to high 16 identification of data field of message Source, reduces interruption delay and the expense of CPU.
Referring to Fig. 7, another embodiment of the method for interrupt source is identified in the embodiment of the present invention to be included:
701st, CPU receives the messages that high 16 of data field is incorporated into message transmission interruption that ancillary equipment is sent;
In embodiments of the present invention, the message is also 16 low comprising data field, and wherein low 16 of data field is used for Identify ancillary equipment, high 16 of data field is used to identify interrupt source.
It is understood that for example when some third level module is interrupted in ancillary equipment, third level module, Second layer module of third level module subordinate, the first layer module of the second layer module subordinate divide corresponding interrupt number Do not write that above-mentioned data field is high 16 (hardware realizations), the data field that with reference to software initialization when has configured is low and to disappear by 16 Address is ceased, is combined into the message of message transmission interruption.
702nd, CPU judges whether high 16 of the data field of message is 0, if it is not, performing step 703;
In embodiments of the present invention, low 16 be define only in the prior art, it is 0 that high 16 are default, and and the prior art Different, low 16 are define not only in the embodiment of the present invention, is also defined 16 high.
It should be noted that if high 16 of data field is 0, interrupt source, such as CPU roots are identified using the prior art It is investigated that asking all middle segment register identification interrupt source, it is not specifically limited herein.
703rd, CPU is according to the low 16 identification ancillary equipment of the data field of message, according to the corresponding interrupt number of interrupt source or The interrupt number identification interrupt source of the corresponding upper layer module of interrupt source.
In embodiments of the present invention, CPU is first according to the low 16 identification ancillary equipment of data field of message, further according to interruption The interrupt number of the corresponding interrupt number in source or the corresponding upper layer module of interrupt source, identifies interrupt source, it is to be understood that interrupt source It is a module of ancillary equipment, since high 16 of data field includes the corresponding interrupt number of interrupt source or interrupt source is corresponding The interrupt number of upper layer module, then CPU is directly according to corresponding interrupt number identification interrupt source.
It is understood that when the first layer module one interrupts for example in ancillary equipment, CPU Direct Recognition interrupt sources Corresponding interrupt number identifies interrupt source.Such as some third level module is when interrupting in ancillary equipment, due to third level Module, the second layer module of third level module subordinate, during the first layer module of the second layer module subordinate will be corresponding The disconnected number corresponding field for being respectively written into above-mentioned high 16, then CPU first identify the first layer module pair of the second layer module subordinate The interrupt number answered, then identify the corresponding interrupt number of the second layer module of third level module subordinate, finally identify the third layer The interrupt number of secondary module, identifies interrupt source.
In the technical solution of some embodiments of the invention, CPU receives ancillary equipment transmission data field is 16 high The message of message transmission interruption is incorporated into, the message is also 16 low comprising data field;CPU judges the data field of the message Whether high 16 be 0, if it is not, the data field low 16 identification ancillary equipment of the CPU according to the message, in The interrupt number identification interrupt source of the disconnected corresponding interrupt number in source or the corresponding upper layer module of interrupt source, using above technical scheme, Each interrupt source has corresponding interrupt number, and CPU need not inquire about all interrupt status registers completely, directly according to interrupt source The interrupt number of corresponding interrupt number or the corresponding upper layer module of interrupt source identifies interrupt source, reduces interruption delay and CPU Expense.
For ease of preferably implementing the above-mentioned correlation technique of the embodiment of the present invention, it is also provided below for coordinating the above method Relevant apparatus.
Referring to Fig. 8, one embodiment of the device 800 of interrupt source is identified in the embodiment of the present invention to be included:
First writing unit 801, for when any one module of ancillary equipment is interrupted, by the interrupt source pair The data field for the interrupt number write-in message transmission interrupt capabilities structure answered is 16 high, and the ancillary equipment includes multiple and different layers Secondary module;
Unit 802 is incorporated into, for the corresponding interrupt number of the interrupt source to be write message in first writing unit 801 After high 16 of data field for transmitting interrupt capabilities structure, by high 16 reports for being incorporated into message transmission interruption of the data field Text, the message are also 16 low comprising data field;
Transmitting element 803, for the data field to be incorporated into message transmission interruption high 16 in the unit 802 that is incorporated into Message after, the message being incorporated into is sent to CPU, so that the CPU is low 16 according to the data field of the message The ancillary equipment is identified, according to the data field of the message high 16 identification interrupt source.
, will when any one module of ancillary equipment is interrupted in the technical solution of some embodiments of the invention The data field of the corresponding interrupt number write-in message transmission interrupt capabilities structure of the interrupt source is 16 high, by the report being incorporated into Text is sent to central processor CPU, so that the CPU is set according to the low 16 identification periphery of data field of the message Standby, according to the data field of the message high 16 identification interrupt source, using above technical scheme, each interrupt source has Corresponding interrupt number so that CPU need not inquire about all interrupt status registers completely, directly high according to the data field of message 16 identification interrupt sources, reduce interruption delay and the expense of CPU.
Referring to Fig. 9, another embodiment of the device 900 of interrupt source is identified in the embodiment of the present invention to be included:
First writing unit 901, specifically for the corresponding interrupt number of the interrupt source is write message transmission interrupt capabilities Corresponding field in high 16 of the data field of structure, high 16 of the data field have multiple fields, and the data field is high The level corresponding with the module of the ancillary equipment of the field of 16 is into correspondence;
Detection unit 902, specifically for writing the corresponding interrupt number of the interrupt source in first writing unit 901 In high 16 of the data field of message transmission interrupt capabilities structure after corresponding field, according to the interrupt status position of the interrupt source The result that set occurs detects whether the interrupt source interrupts;
Second writing unit 903, specifically for when the detection unit 902 detects the interrupt source and interrupts, inciting somebody to action Corresponding word in high 16 of the data field of the corresponding interrupt number write-in message transmission interrupt capabilities structure of the upper layer module Section;
Unit 904 is incorporated into, for that will be corresponded to respectively in first writing unit 901 and second writing unit 903 Interrupt number write-in message transmission interrupt capabilities structure high 16 of data field after, high 16 of the data field is incorporated into and is disappeared Breath transmits the message interrupted, and the message is also 16 low comprising data field;
Transmitting element 905, for the data field to be incorporated into message transmission interruption high 16 in the unit 904 that is incorporated into Message after, the message being incorporated into is sent to CPU, so that the CPU is low 16 according to the data field of the message The ancillary equipment is identified, according to the data field of the message high 16 identification interrupt source.
In certain embodiments, when certain layer module produces interruption, the correspondence in interrupt status register belonging to it Interrupt status position set occurs, such as when some lower layer module interrupts, it is corresponding to its upper layer module Interrupt status position all can set, it is right in third level interrupt status register when third level module one is interrupted Set should occur in the interrupt status position of third level module one, since third level module one is subordinated to the second layer module One, therefore set also occurs for the interrupt status position corresponding to the second layer module one in the second level interrupt status register. Similarly, it is right in the first level interrupt status register since the second layer module one is subordinated to the first layer module one Set should also occur in the interrupt status position of the first layer module one.
, will when any one module of ancillary equipment is interrupted in the technical solution of some embodiments of the invention Corresponding field in high 16 of the data field of the corresponding interrupt number write-in message transmission interrupt capabilities structure of the interrupt source, when When detecting the interrupt source and interrupting, the corresponding interrupt number of the corresponding upper layer module of the interrupt source is write into message transmission Corresponding field in high 16 of the data field of interrupt capabilities structure, by the data field, high 16 are incorporated into message transmission interruption Message, the message being incorporated into is sent to central processor CPU, so that data words of the CPU according to the message The section low 16 identification ancillary equipment, according to the data field of the message high 16 identification interrupt source, more than Technical solution, each interrupt source have corresponding interrupt number so that and CPU need not inquire about all interrupt status registers completely, Directly according to the high 16 identification interrupt source of data field of message, interruption delay and the expense of CPU are reduced.
Referring to Fig. 10, another embodiment of the device 1000 of interrupt source is identified in the embodiment of the present invention to be included:
High 16 of data field, message transmission interruption is incorporated into for receive ancillary equipment transmission by receiving unit 1001 Message, the message are also 16 low comprising data field;
Judging unit 1002, for receiving ancillary equipment transmission data field is 16 high in the receiving unit 1001 After being incorporated into the message of message transmission interruption, whether high 16 of data field for judging the message is 0;
Recognition unit 1003, for judging high 16 of the data field of the message not for 0 when the judging unit 1002 When, it is 16 high according to the data field of the message according to the data field of the message low 16 identification ancillary equipment Identify the interrupt source.
Optionally, recognition unit 1003, the data field specifically for judging the message when the judging unit 1002 High 16 when not being 0, according to the corresponding interrupt number of the interrupt source or the interrupt number of the corresponding upper layer module of the interrupt source, Identify the interrupt source.
In the technical solution of some embodiments of the invention, CPU receives ancillary equipment transmission data field is 16 high The message of message transmission interruption is incorporated into, the message is also 16 low comprising data field;CPU judges the data field of the message Whether high 16 be 0, if it is not, the data field low 16 identification ancillary equipment of the CPU according to the message, according to institute State the data field high 16 identification interrupt source of message, using above technical scheme, each interrupt source have it is corresponding in Disconnected number, CPU need not inquire about all interrupt status registers completely, directly be interrupted according to high 16 identification of data field of message Source, reduces interruption delay and the expense of CPU.
The concrete structure that embodiment shown in Fig. 8 to Figure 10 interrupts identification from the angle of function module source device carries out Illustrate, the concrete structure of identification interruption source device is illustrated from hardware point of view below in conjunction with the embodiment of Figure 11:
Please refer to Fig.1 a structural representation of the device 1100 that 1, Figure 11 is identification interrupt source provided in an embodiment of the present invention Figure, wherein, it may include at least one processor 1101 (such as CPU, Central Processing Unit), at least one net Network interface or other communication interfaces, memory 1102, at least one communication bus, at least one input unit 1103, at least One output device 1104 and uninterrupted power source UPS 1105 are used for realization the connection communication between these devices.Processor 1101 For performing the executable module stored in memory 1102, such as computer program.Memory 1102 may include at a high speed with Machine access memory (RAM, Random Access Memory), it is also possible to further include non-volatile memory (non- Volatile memory), a for example, at least magnetic disk storage.
As shown in figure 11, in some embodiments, programmed instruction is stored in memory 1102, programmed instruction can be by Processor 1101 performs, and processor 1101 specifically performs following steps:
When any one module of ancillary equipment is interrupted, corresponding interrupt number is write into message transmission interrupt capabilities The data field of structure is 16 high, and the ancillary equipment includes the module of multiple and different levels;
By high 16 messages for being incorporated into message transmission interruption of the data field, the message also includes data field low 16 Position.
In certain embodiments, processor 1101 is additionally operable to perform following steps:
When the corresponding upper layer module of the interrupt source, which detects the interrupt source, to interrupt, corresponding interrupt number is write The data field for entering message transmission interrupt capabilities structure is 16 high;
It should be noted that in the above-described embodiments, the description to each embodiment all emphasizes particularly on different fields, in some embodiment The part not being described in detail, may refer to the associated description of other embodiment.For example it is not described in detail in Figure 11 the embodiment described Part, may refer to the associated description of the method or apparatus embodiment of above-mentioned Fig. 4 to Figure 10.
In conclusion when any one module of ancillary equipment is interrupted, the module will be interrupted as interrupt source The data field of source corresponding interrupt number write-in message transmission interrupt capabilities structure is 16 high, and the ancillary equipment is by the data High 16 of field is incorporated into the message of message transmission interruption, and the message being incorporated into is sent to central processing unit by the ancillary equipment CPU, so that the data field low 16 identification ancillary equipment of the CPU according to the message, according to the message The data field high 16 identification interrupt source, using above technical scheme, each interrupt source has corresponding interrupt number so that CPU need not inquire about all interrupt status registers completely, directly according to the high 16 identification interrupt source of data field of message, drop The low expense of interruption delay and CPU.
It is apparent to those skilled in the art that for convenience and simplicity of description, the system of foregoing description, The specific work process of device and unit, may be referred to the corresponding process in preceding method embodiment, details are not described herein.
In several embodiments provided herein, it should be understood that disclosed system, apparatus and method can be with Realize by another way.For example, device embodiment described above is only schematical, for example, the unit Division, is only a kind of division of logic function, can there is other dividing mode, such as multiple units or component when actually realizing Another system can be combined or be desirably integrated into, or some features can be ignored, or do not perform.It is another, it is shown or The mutual coupling, direct-coupling or communication connection discussed can be the indirect coupling by some interfaces, device or unit Close or communicate to connect, can be electrical, machinery or other forms.
The unit illustrated as separating component may or may not be physically separate, be shown as unit The component shown may or may not be physical location, you can with positioned at a place, or can also be distributed to multiple In network unit.Some or all of unit therein can be selected to realize the mesh of this embodiment scheme according to the actual needs 's.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, can also That unit is individually physically present, can also two or more units integrate in a unit.Above-mentioned integrated list Member can both be realized in the form of hardware, can also be realized in the form of SFU software functional unit.
If the integrated unit is realized in the form of SFU software functional unit and is used as independent production marketing or use When, it can be stored in a computer read/write memory medium.Based on such understanding, technical scheme is substantially The part to contribute in other words to the prior art or all or part of the technical solution can be in the form of software products Embody, which is stored in a storage medium, including some instructions are used so that a computer Equipment (can be personal computer, server, or network equipment etc.) performs the complete of each embodiment the method for the present invention Portion or part steps.And foregoing storage medium includes:USB flash disk, mobile hard disk, read-only storage (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disc or CD etc. are various can store journey The medium of sequence code.
The above, the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations;Although with reference to before Embodiment is stated the present invention is described in detail, it will be understood by those of ordinary skill in the art that:It still can be to preceding State the technical solution described in each embodiment to modify, or equivalent substitution is carried out to which part technical characteristic;And these Modification is replaced, and the essence of appropriate technical solution is departed from the spirit and scope of various embodiments of the present invention technical solution.

Claims (12)

  1. A kind of 1. method for identifying interrupt source, it is characterised in that including:
    When any one module of ancillary equipment is interrupted, the module as interrupt source by the interrupt source it is corresponding in The data field of disconnected number write-in message transmission interrupt capabilities structure is 16 high, and the ancillary equipment includes the mould of multiple and different levels Block;
    High 16 messages for being incorporated into message transmission interruption of the data field, the message are also included data by the ancillary equipment Field is 16 low;
    The message being incorporated into is sent to central processor CPU by the ancillary equipment, so that the CPU is according to the message The data field low 16 identification ancillary equipment, according to the data field of the message high 16 identification interrupt source;
    Wherein, the corresponding interrupt number of the interrupt source is write message transmission interrupt capabilities structure by the module as interrupt source High 16 of data field includes:
    The corresponding interrupt number of the interrupt source is write the data of message transmission interrupt capabilities structure as interrupt source by the module Corresponding field in high 16 of field, high 16 of the data field have multiple fields, the field of high 16 of the data field Level corresponding with the module of the ancillary equipment is into correspondence.
  2. 2. according to the method described in claim 1, it is characterized in that, the method further includes:
    When the corresponding upper layer module of the interrupt source, which detects the interrupt source, to interrupt, the upper layer module is by described in The data field of the corresponding interrupt number write-in message transmission interrupt capabilities structure of upper layer module is 16 high.
  3. 3. according to the method described in claim 2, it is characterized in that, during the corresponding upper layer module detection of the interrupt source is described Interruption, which occurs, for disconnected source includes:
    The result that set occurs according to the interrupt status position of the interrupt source for the corresponding upper layer module of the interrupt source detects institute Interrupt source is stated to interrupt.
  4. 4. according to the method described in claim 2, it is characterized in that, the upper layer module is corresponding by the upper layer module High 16 of the data field of interrupt number write-in message transmission interrupt capabilities structure includes:
    The upper layer module is by the data of the corresponding interrupt number write-in message transmission interrupt capabilities structure of the upper layer module Corresponding field in high 16 of field.
  5. A kind of 5. method for identifying interrupt source, it is characterised in that including:
    CPU receives also the wrapping high 16 messages for being incorporated into message transmission interruption of data field, the message of ancillary equipment transmission Low 16 containing data field;
    The CPU judges whether high 16 of the data field of the message is 0, if it is not, data of the CPU according to the message The field low 16 identification ancillary equipment, according to the data field of the message high 16 identification interrupt source;
    Wherein, the ancillary equipment includes the module of multiple and different levels, and the interrupt source is any one for the ancillary equipment A module interrupted;High 16 of the data field has multiple fields, the field of high 16 of the data field with it is described The corresponding level of module of ancillary equipment is into correspondence;The interrupt source is by described in the corresponding interrupt number write-in of the interrupt source Corresponding field in high 16 of data field.
  6. 6. according to the method described in claim 5, it is characterized in that, the CPU is 16 high according to the data field of the message Identification interrupt source includes:
    The CPU knows according to the corresponding interrupt number of the interrupt source or the interrupt number of the corresponding upper layer module of the interrupt source Not described interrupt source.
  7. A kind of 7. device for identifying interrupt source, it is characterised in that including:
    First writing unit, for when any one module of ancillary equipment is interrupted, by the interrupt source it is corresponding in The data field of disconnected number write-in message transmission interrupt capabilities structure is 16 high, and the ancillary equipment includes the mould of multiple and different levels Block;
    Unit is incorporated into, for the corresponding interrupt number write-in message transmission of the interrupt source to be interrupted energy in first writing unit After high 16 of the data field of power structure, by high 16 messages for being incorporated into message transmission interruption of the data field, the message It is also 16 low comprising data field;
    Transmitting element, for it is described be incorporated into unit by the data field high 16 be incorporated into message transmission interruption message after, The message being incorporated into is sent to CPU, so that the CPU is described outer according to low 16 identification of data field of the message Peripheral equipment, according to the data field of the message high 16 identification interrupt source;
    Wherein, first writing unit, specifically for the corresponding interrupt number write-in message transmission of the interrupt source is interrupted energy Corresponding field in high 16 of the data field of power structure, high 16 of the data field have multiple fields, the data field The level corresponding with the module of the ancillary equipment of the field of high 16 is into correspondence.
  8. 8. device according to claim 7, it is characterised in that further include:
    Detection unit, for the corresponding interrupt number write-in message transmission of the interrupt source to be interrupted energy in first writing unit After high 16 of the data field of power structure, detect whether the interrupt source interrupts;
    Second writing unit, for when the detection unit detects the interrupt source and interrupts, the interrupt source to be corresponded to Upper layer module corresponding interrupt number write-in message transmission interrupt capabilities structure data field it is 16 high.
  9. 9. device according to claim 8, it is characterised in that
    The detection unit, the interruption is detected specifically for the result that set occurs according to the interrupt status position of the interrupt source Interrupt in source.
  10. 10. device according to claim 8, it is characterised in that
    Second writing unit, specifically for the corresponding interrupt number of the upper layer module is write message transmission interrupt capabilities Corresponding field in high 16 of the data field of structure.
  11. A kind of 11. device for identifying interrupt source, it is characterised in that including:
    Receiving unit, for receiving the messages that high 16 of data field is incorporated into message transmission interruption of ancillary equipment transmission, institute It is also 16 low comprising data field to state message;
    Judging unit, for data field to be incorporated into message transmission high 16 in receiving unit reception ancillary equipment transmission After the message of interruption, whether high 16 of data field for judging the message is 0;
    Recognition unit, when high 16 of data field for judging the message when the judging unit is not for 0, according to the report The data field low 16 identification ancillary equipment of text, according to the data field of the message high 16 identification interruption Source;
    Wherein, the ancillary equipment includes the module of multiple and different levels, and the interrupt source is any one for the ancillary equipment A module interrupted;High 16 of the data field has multiple fields, the field of high 16 of the data field with it is described The corresponding level of module of ancillary equipment is into correspondence;The interrupt source is by described in the corresponding interrupt number write-in of the interrupt source Corresponding field in high 16 of data field.
  12. 12. according to the devices described in claim 11, it is characterised in that
    The recognition unit, specifically for according to the corresponding upper level mould of the corresponding interrupt number of the interrupt source or the interrupt source The interrupt number of block, identifies the interrupt source.
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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107025132B (en) * 2016-02-02 2020-03-13 龙芯中科技术有限公司 Interrupt configuration method and device
CN109977061B (en) * 2017-12-28 2023-04-11 中兴通讯股份有限公司 Interrupt processing method and interrupt processing device

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7328296B1 (en) * 2006-01-03 2008-02-05 Emc Corporation Interrupt processing system
CN101211323A (en) * 2006-12-28 2008-07-02 联想(北京)有限公司 Hardware interruption processing method and processing unit
CN101739369A (en) * 2008-11-13 2010-06-16 索尼株式会社 Interrupt detection apparatus and information processing system
CN101872330A (en) * 2009-11-04 2010-10-27 杭州海康威视数字技术股份有限公司 Interrupt processing method of multi-PCIE (Peripheral Component Interface Express) equipment system
CN103019848A (en) * 2012-12-25 2013-04-03 北京航天测控技术有限公司 Method for realizing peripheral component interconnect (PCI) bus non-vector interrupt
CN103440188A (en) * 2013-08-29 2013-12-11 福建星网锐捷网络有限公司 Method and device for detecting PCIE hardware faults

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7574536B2 (en) * 2005-04-22 2009-08-11 Sun Microsystems, Inc. Routing direct memory access requests using doorbell addresses
US8495271B2 (en) * 2010-08-04 2013-07-23 International Business Machines Corporation Injection of I/O messages
US8656079B2 (en) * 2011-12-19 2014-02-18 Advanced Micro Devices, Inc. Method and apparatus for remapping interrupt types
US9104472B2 (en) * 2013-02-04 2015-08-11 Freescale Semiconductor, Inc. Write transaction interpretation for interrupt assertion

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7328296B1 (en) * 2006-01-03 2008-02-05 Emc Corporation Interrupt processing system
CN101211323A (en) * 2006-12-28 2008-07-02 联想(北京)有限公司 Hardware interruption processing method and processing unit
CN101739369A (en) * 2008-11-13 2010-06-16 索尼株式会社 Interrupt detection apparatus and information processing system
CN101872330A (en) * 2009-11-04 2010-10-27 杭州海康威视数字技术股份有限公司 Interrupt processing method of multi-PCIE (Peripheral Component Interface Express) equipment system
CN103019848A (en) * 2012-12-25 2013-04-03 北京航天测控技术有限公司 Method for realizing peripheral component interconnect (PCI) bus non-vector interrupt
CN103440188A (en) * 2013-08-29 2013-12-11 福建星网锐捷网络有限公司 Method and device for detecting PCIE hardware faults

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