CN104659076B - DEMOS devices and manufacture method - Google Patents
DEMOS devices and manufacture method Download PDFInfo
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- CN104659076B CN104659076B CN201310608507.0A CN201310608507A CN104659076B CN 104659076 B CN104659076 B CN 104659076B CN 201310608507 A CN201310608507 A CN 201310608507A CN 104659076 B CN104659076 B CN 104659076B
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Abstract
The invention discloses a kind of DEMOS devices, a shallow trench oxygen is provided between drain region and the substrate draw-out area, shallow trench oxygen draws the contact surface of well region laterally across drift region and substrate；In shallow trench oxygen bottom, the suspension drift region with shallow trench oxygen bottom at a distance is set, suspension drift region, which can increase, causes exhausting for PN junction between well region to drift region and substrate, so as to optimize drift region and substrate causes PN junction Electric Field Distribution between well region, the breakdown voltage of device is improved.The invention also discloses a kind of manufacture method of DEMOS devices.
Description
Technical field
Field is manufactured the present invention relates to semiconductor integrated circuit, more particularly to a kind of extension drain terminal MOS（drain
Extended MOS, DEMOS）Device；The invention further relates to a kind of manufacture method of DEMOS devices.
Background technology
DEMOS devices are a kind of high tension apparatus, and existing DEMOS devices are general and low-voltage device such as cmos device is integrated in one
Rise and prepare, existing DEMOS devices are the well regions that low-voltage device is shared on the basis of low-voltage device technique（WELL）, so make
The breakdown voltage of DEMOS devices（BV）The BV for the PN junction being limited between the high concentration well region of low-voltage device, so existing DEMOS
The BV of device is generally below 18V.If Fig. 1 is existing DEMOS device architectures schematic diagram；By taking N-type device as an example, existing DEMOS
Device includes：Silicon substrate 101, forms N traps 102, p-well 103a and 103b, the N traps 102 and p-well in the silicon substrate 101
103a is identical with p-well process conditions with the N traps of 103b low-voltage devices.
Shallow trench oxygen 104 is formed with the surface of silicon substrate 101, is isolated by the shallow trench oxygen (STI) 104
Active area, the shallow trench oxygen 104 is made up of the silica being filled in shallow trench.Channel region is constituted by p-well 103a；By N
Trap 102 constitutes drift region；The laterally contact of channel region 103a and drift region 102.
Grid structure, by the gate dielectric layer such as gate oxide and polysilicon gate that are sequentially formed in the surface of silicon substrate 101
105 compositions；Channel region 103a surfaces described in the grid structure covering part simultaneously extend to the top of drift region 102, by institute
Stating the channel region 103a surfaces that grid structure covered is used to form raceway groove.
Source region 106, is formed from the N+ district's groups on the channel region 103a surfaces into the source region 106 and the grid knot
First side autoregistration of structure.
Drain region 107, is formed from the N+ district's groups on the surface of drift region 102 into the drain region 107 and the grid structure
The second side at a distance.
Second side of the drift region 102 and a p-well 103b are in contact, and make p-well 103b draw well region for substrate,
The substrate is drawn well region 103b surfaces and is formed with by P+ district's groups into substrate draw-out area 108, passes through the He of substrate draw-out area 108
The substrate draws the extraction that well region 103b realizes underlayer electrode.
The breakdown voltage that the breakdown voltage of existing DEMOS devices is limited to the PN junction between p-well region 103b and N trap 102 is determined
Fixed, i.e., the PN junction in region determines the breakdown voltage of device shown in the dotted line frame 109 such as Fig. 1, due to p-well region 103b and N trap 102
All using the p-well and N traps of low-voltage device, doping concentration is higher so that the breakdown voltage of the PN junction is generally below 18V.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of DEMOS devices, can be to the drift region under shallow trench oxygen
The PN junction electric field for drawing well region with substrate is optimized, and improves the breakdown voltage of device.Therefore, the present invention also provides a kind of
The manufacture method of DEMOS devices.
In order to solve the above technical problems, the DEMOS devices that the present invention is provided include：
Silicon substrate, is formed with the first conductive type of trap and the second conductive type of trap in the silicon substrate, in silicon lining
Basal surface is formed with shallow trench oxygen, and active area is isolated by the shallow trench oxygen, and the shallow trench oxygen is shallow by being filled in
Silica composition in groove.
Channel region, is made up of second conductive type of trap.
Drift region, is made up of first conductive type of trap, and the first side of the drift region and the channel region are horizontal
To contact.
Grid structure, is made up of the gate dielectric layer and polysilicon gate that are sequentially formed in the surface of silicon；The grid
Channel region surface described in structure covering part is simultaneously extended to above the drift region, the ditch covered by the grid structure
Dao Qu surfaces are used to form raceway groove.
Source region, is formed from the first conduction type heavily doped region composition on the channel region surface, the source region and described
First side autoregistration of grid structure.
Drain region, is formed from the first conduction type heavily doped region composition on the drift region surface, the drain region and described
Second side of grid structure is at a distance.
Second side of the drift region and second conductive type of trap are in contact, and it is substrate to make second conductive type of trap
Well region is drawn, is formed with substrate extraction well region surface and substrate draw-out area is constituted by the second conduction type heavily doped region, led to
Cross the substrate draw-out area and the substrate draws the extraction that well region realizes underlayer electrode.
The shallow trench oxygen is provided between the drain region and the substrate draw-out area, the shallow trench oxygen is made
For the first shallow trench oxygen, the first shallow trench oxygen draws connecing for well region laterally across the drift region and the substrate
Contacting surface.
The suspension drift region of first conduction type doping, is formed at the bottom of the first shallow trench oxygen, the suspension
Drift region by the shallow trench formed after, in the shallow trench fill silica before by the first conductive type ion inject
Formed；In the horizontal, the suspension drift region extends to the substrate from the drift region and drawn in well region；In the vertical,
The suspension drift region and first shallow trench oxygen bottom at a distance and the suspension drift region bottom depth
Less than or equal to the bottom depth that well region is drawn in the drift region or the substrate.
Further improve is that DEMOS devices are N-type device, and the first conduction type is N-type, and the second conduction type is P
Type.
Further improve is that DEMOS devices are P-type device, and the first conduction type is p-type, and the second conduction type is N
Type.
Further improve is that the Implantation Energy of the ion implanting of the suspension drift region is 250KEV~400KEV, note
Enter dosage for 1.4E13cm-2, the first shallow trench described in the peak distance of the ion implanting of the suspension drift region oxygen bottom
3000 angstroms~5000 angstroms.
In order to solve the above technical problems, the manufacture method for the DEMOS devices that the present invention is provided comprises the following steps：
Step 1: forming the first conductive type of trap and the second conductive type of trap respectively on a silicon substrate；Channel region is by one
The second conductive type of trap composition；Drift region is made up of first conductive type of trap, the first side of the drift region
Laterally contacted with the channel region；Second side of the drift region and second conductive type of trap are in contact, and make this second lead
Electric type trap is that substrate draws well region.
Step 2: being separated out using shallow ditch groove separation process in surface of silicon formation shallow trench by the shallow trench
Active area；Drawn in the drift region and the substrate and be provided with a shallow trench above the contact surface of well region, make this shallow
Groove is the first shallow trench, and first shallow trench draws the contact surface of well region laterally across the drain region and the substrate.
Step 3: the bottom formation suspension drift region that the first conductive type ion is infused in first shallow trench is carried out,
In the horizontal, the suspension drift region extends to the substrate from the drift region and drawn in well region；In the vertical, it is described outstanding
Floating drift region and first shallow trench oxygen bottom are at a distance and the bottom depth of the suspension drift region is less than etc.
The bottom depth of well region is drawn in the drift region or the substrate.
Step 4: filling silica formation shallow trench oxygen in the shallow trench, order is filled in first shallow trench
Middle silica is the first shallow trench oxygen.
Step 5: gate dielectric layer and polysilicon gate are sequentially formed in the surface of silicon, using lithographic etch process pair
Perform etching to form grid structure with the gate dielectric layer on the polysilicon, channel region described in the grid structure covering part
Surface is simultaneously extended to above the drift region, and the channel region surface covered by the grid structure is used to form raceway groove.
Step 6: carrying out the injection of the first conduction type heavy doping source and drain forms source region and drain region simultaneously；The source region is formed
In the channel region, the first side autoregistration of the source region and the grid structure；The drain region is formed at the drift region table
Second side of face, the drain region and the grid structure is at a distance.
Draw Step 7: carrying out the second conduction type heavy doping ion and being infused in the substrate extraction well region surface formation substrate
Go out area, the extraction that well region realizes underlayer electrode is drawn by the substrate draw-out area and the substrate；First shallow trench
Oxygen is located between the drain region and the substrate draw-out area.
Further improve is that DEMOS devices are N-type device, and the first conduction type is N-type, and the second conduction type is P
Type.
Further improve is that DEMOS devices are P-type device, and the first conduction type is p-type, and the second conduction type is N
Type.
Further improve be, the Implantation Energy of the ion implanting of suspension drift region described in step 3 for 250KEV~
400KEV, implantation dosage is 1.4E13cm-2, the first shallow trench described in the peak distance of the ion implanting of the suspension drift region
3000 angstroms~5000 angstroms of oxygen bottom.
The present invention is set and shallow trench oxygen bottom by the shallow trench oxygen bottom between drain region and substrate draw-out area
Suspension drift region at a distance, suspension drift region, which can increase, causes PN junction between well region to drift region and substrate
Exhaust, so as to optimize drift region and substrate causes PN junction Electric Field Distribution between well region, improve the breakdown voltage of device；When
When the p-well and N traps of device of the present invention are used with low-voltage device identical p-well and N traps, the present invention can be by the breakdown voltage of device
30V is brought up to from 18V.
Brief description of the drawings
The present invention is further detailed explanation with reference to the accompanying drawings and detailed description：
Fig. 1 is existing DEMOS device architectures schematic diagram；
Fig. 2 is DEMOS device architecture schematic diagrames of the embodiment of the present invention.
Embodiment
As shown in Fig. 2 being DEMOS device architecture schematic diagrames of the embodiment of the present invention；DEMOS of embodiment of the present invention devices are N
Type device, for P-type device, it is only necessary to take the conduction type of corresponding doped region conversely.DEMOS of the embodiment of the present invention
Device includes：
Silicon substrate 1, is formed with N traps 2 and p-well 3a and 3b in the silicon substrate 1.Device of embodiment of the present invention energy and low pressure
Device such as cmos device is integrated, N traps 2 and p-well 3a and 3b using low-voltage device N traps and p-well technique.
Shallow trench oxygen 4 is formed with the surface of silicon substrate 1, active area is isolated by the shallow trench oxygen 4, it is described
Shallow trench oxygen 4 is made up of the silica being filled in shallow trench.
Channel region 3a, is made up of a p-well 3a.
Drift region 2, is made up of a N trap 2, and the first side of the drift region 2 and the channel region 3a are laterally contacted.
Grid structure, is made up of the gate dielectric layer and polysilicon gate 5 that are sequentially formed in the surface of silicon substrate 1；The grid
Channel region 3a surfaces described in the structure covering part of pole simultaneously extend to the top of drift region 2, are covered by the grid structure
The channel region 3a surfaces are used to form raceway groove.Preferably, the gate dielectric layer is gate oxide.
Source region 6, is formed from the N-type heavily doped region i.e. N+ district's groups on the channel region 3a surfaces into, the source region 6 and described
First side autoregistration of grid structure.
Drain region 7, is formed from the N-type heavily doped region composition on the surface of drift region 2, the drain region 7 and the grid knot
Second side of structure is at a distance.
Second side of the drift region 2 and a p-well 3b are in contact, and make p-well 3b draw well region 3b for substrate, described
Substrate is drawn well region 3b surfaces and is formed with by p-type heavily doped region i.e. P+ district's groups into substrate draw-out area 8, passes through the substrate draw-out area
8 and substrate extraction well region 3b realizes the extraction of underlayer electrode.
The shallow trench oxygen 4 is provided between the drain region 7 and the substrate draw-out area 8, the shallow trench is made
Field oxygen 4 is the first shallow trench oxygen 4, and the first shallow trench oxygen 4 is drawn laterally across the drift region 2 and the substrate
Well region 3b contact surface.
The suspension drift region 2 of n-type doping, is formed at the bottom of the first shallow trench oxygen 4, the suspension drift region 2
By the shallow trench formed after, in the shallow trench fill silica before formed by N-type ion implanting；In the horizontal,
The suspension drift region 2 extends to the substrate from the drift region 2 and drawn in well region 3b；In the vertical, the drift that suspends
Move area 2 and first shallow trench bottom of oxygen 4 at a distance and the bottom depth of the suspension drift region 2 is less than etc.
Well region 3b bottom depth is drawn in the drift region 2 or the substrate.Preferably, the ion implanting of the suspension drift region 2
Implanted dopant be phosphorus, Implantation Energy be 250KEV~400KEV, implantation dosage is 1.4E13cm-2, the suspension drift region 2
3000 angstroms~5000 angstroms of first shallow trench described in the peak distance of ion implanting oxygen, 4 bottom.
The embodiment of the present invention is by the setting of the suspension drift region 2, and the suspension drift region 2 can extend to the lining
Bottom is drawn in well region 3b, and the first shallow trench bottom section PN junction of oxygen 4 is exhausted so as to increase so that described the
The electric field of the one shallow trench bottom section PN junction of oxygen 4 is optimized, and so as to improve the breakdown voltage of device, the present invention is implemented
When the p-well and N traps of example are used with low-voltage device identical p-well and N well structures, the breakdown voltage of device can be improved from 18V
To 30V.
The manufacture method of DEMOS devices of the embodiment of the present invention comprises the following steps：
Step 1: forming N traps 2 and p-well 3a and 3b respectively on silicon substrate 1.When DEMOS of embodiment of the present invention devices and low
When voltage device integrates progress, the N traps and p-well of the N traps 2 and p-well 3a and 3b of the embodiment of the present invention respectively with low-voltage device
It is simultaneously integrated.
Channel region 3a is made up of a p-well 3a；Drift region 2 is made up of a N trap 2, and the of the drift region 2
Side and the channel region 3a are laterally contacted；Second side of the drift region 2 and a p-well are in contact, and make the p-well draw for substrate
Go out well region 3b.
Step 2: forming shallow trench on the surface of silicon substrate 1 using shallow ditch groove separation process, separated out by the shallow trench
Active area；Drawn in the drift region 2 and the substrate and a shallow trench is provided with above well region 3b contact surface, order should
Shallow trench is the first shallow trench, and first shallow trench draws connecing for well region 3b laterally across the drain region 7 and the substrate
Contacting surface.
Step 3: carry out N-type ion implanting forms suspension drift region 2 in the bottom of first shallow trench, in the horizontal,
The suspension drift region 2 extends to the substrate from the drift region 2 and drawn in well region 3b；In the vertical, the drift that suspends
Move area 2 and first shallow trench bottom of oxygen 4 at a distance and the bottom depth of the suspension drift region 2 is less than etc.
Well region 3b bottom depth is drawn in the drift region 2 or the substrate.Preferably, the ion implanting of the suspension drift region 2
Implanted dopant be phosphorus, Implantation Energy be 250KEV~400KEV, implantation dosage is 1.4E13cm-2, the suspension drift region 2
3000 angstroms~5000 angstroms of first shallow trench described in the peak distance of ion implanting oxygen, 4 bottom.
Step 4: filling silica formation shallow trench oxygen 4 in the shallow trench, order is filled in first shallow trench
Middle silica is the first shallow trench oxygen 4.
Step 5: gate dielectric layer and polysilicon gate 5 are sequentially formed on the surface of silicon substrate 1, using lithographic etch process
To performing etching to form grid structure with the gate dielectric layer on the polysilicon, raceway groove described in the grid structure covering part
Area 3a surfaces simultaneously extend to the top of drift region 2, and the channel region 3a surfaces covered by the grid structure are used for shape
Into raceway groove.Preferably, the gate dielectric layer is gate oxide, is formed using thermal oxidation technology.
Step 6: carrying out the injection of N-type heavy doping source and drain forms source region 6 and drain region 7 simultaneously；The source region 6 is formed at described
First side autoregistration of channel region 3a, the source region 6 and the grid structure；The drain region 7 is formed at the table of drift region 2
Second side of face, the drain region 7 and the grid structure is at a distance.
Well region 3b surfaces formation substrate draw-out area 8 is drawn Step 7: carrying out p-type heavy doping ion and being infused in the substrate,
The extraction that well region 3b realizes underlayer electrode is drawn by the substrate draw-out area 8 and the substrate；The first shallow trench oxygen 4
Between the drain region 7 and the substrate draw-out area 8.
The present invention is described in detail above by specific embodiment, but these not constitute the limit to the present invention
System.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, and these also should
It is considered as protection scope of the present invention.
Claims (8)
1. a kind of DEMOS devices, it is characterised in that including：
Silicon substrate, is formed with the first conductive type of trap and the second conductive type of trap in the silicon substrate, in the silicon substrate table
Face is formed with shallow trench oxygen, isolates active area by the shallow trench oxygen, the shallow trench oxygen is by being filled in shallow trench
In silica composition；
Channel region, is made up of second conductive type of trap；
Drift region, is made up of, the first side of the drift region and the channel region laterally connect first conductive type of trap
Touch；
Grid structure, is made up of the gate dielectric layer and polysilicon gate that are sequentially formed in the surface of silicon；The grid structure
Channel region surface described in covering part is simultaneously extended to above the drift region, the channel region covered by the grid structure
Surface is used to form raceway groove；
Source region, is formed from the first conduction type heavily doped region composition on the channel region surface, the source region and the grid
First side autoregistration of structure；
Drain region, is formed from the first conduction type heavily doped region composition on the drift region surface, the drain region and the grid
Second side of structure is at a distance；
Second side of the drift region and second conductive type of trap are in contact, and make second conductive type of trap be drawn for substrate
Well region, the substrate draw-out area being made up of the second conduction type heavily doped region is formed with substrate extraction well region surface, is passed through
The substrate draw-out area and the substrate draw the extraction that well region realizes underlayer electrode；
The shallow trench oxygen is provided between the drain region and the substrate draw-out area, it is the to make the shallow trench oxygen
One shallow trench oxygen, the first shallow trench oxygen draws the contact of well region laterally across the drift region with the substrate
Face；
The suspension drift region of first conduction type doping, is formed at the bottom of the first shallow trench oxygen, the suspension drift
Area by the shallow trench formed after, in the shallow trench fill silica before by the first conductive type ion inject shape
Into；In the horizontal, the suspension drift region extends to the substrate from the drift region and drawn in well region；In the vertical, institute
State suspension drift region and first shallow trench oxygen bottom at a distance and the suspension drift region bottom depth it is small
In the bottom depth that well region is drawn equal to the drift region or the substrate.
2. DEMOS devices as claimed in claim 1, it is characterised in that：DEMOS devices are N-type device, and the first conduction type is
N-type, the second conduction type is p-type.
3. DEMOS devices as claimed in claim 1, it is characterised in that：DEMOS devices are P-type device, and the first conduction type is
P-type, the second conduction type is N-type.
4. DEMOS devices as claimed in claim 1, it is characterised in that：The injection energy of the ion implanting of the suspension drift region
Measure as 250KEV~400KEV, implantation dosage is 1.4E13cm-2, described in the peak distance of the ion implanting of the suspension drift region
3000 angstroms~5000 angstroms of first shallow trench oxygen bottom.
5. a kind of manufacture method of DEMOS devices, it is characterised in that comprise the following steps：
Step 1: forming the first conductive type of trap and the second conductive type of trap respectively on a silicon substrate；Channel region is as described in one
Second conductive type of trap is constituted；Drift region is made up of first conductive type of trap, the first side of the drift region and institute
State channel region laterally contact；Second side of the drift region and second conductive type of trap are in contact, and make second conductive-type
Type trap is that substrate draws well region；
Step 2: having been isolated using shallow ditch groove separation process in surface of silicon formation shallow trench by the shallow trench
Source region；Drawn in the drift region and the substrate and be provided with a shallow trench above the contact surface of well region, make the shallow ridges
Groove is the first shallow trench, and first shallow trench draws the contact surface of well region laterally across the drift region and the substrate；
Step 3: the bottom formation suspension drift region that the first conductive type ion is infused in first shallow trench is carried out, in horizontal stroke
Upwards, the suspension drift region extends to the substrate from the drift region and drawn in well region；In the vertical, the drift that suspends
Move area and first shallow trench oxygen bottom at a distance and the bottom depth of the suspension drift region is less than or equal to institute
State drift region or the substrate draws the bottom depth of well region；
Step 4: filling silica formation shallow trench oxygen in the shallow trench, order is filled in oxygen in first shallow trench
SiClx is the first shallow trench oxygen；
Step 5: gate dielectric layer and polysilicon gate are sequentially formed in the surface of silicon, using lithographic etch process to described
Perform etching to form grid structure with the gate dielectric layer on polysilicon, channel region surface described in the grid structure covering part
And extend to above the drift region, the channel region surface covered by the grid structure is used to form raceway groove；
Step 6: carrying out the injection of the first conduction type heavy doping source and drain forms source region and drain region simultaneously；The source region is formed at institute
State channel region, the first side autoregistration of the source region and the grid structure；The drain region is formed at the drift region surface, institute
State the second side of drain region and the grid structure at a distance；
Well region surface formation substrate extraction is drawn Step 7: carrying out the second conduction type heavy doping ion and being infused in the substrate
Area, the extraction that well region realizes underlayer electrode is drawn by the substrate draw-out area and the substrate；The first shallow trench oxygen
Between the drain region and the substrate draw-out area.
6. method as claimed in claim 5, it is characterised in that：DEMOS devices are N-type device, and the first conduction type is N-type,
Second conduction type is p-type.
7. method as claimed in claim 5, it is characterised in that：DEMOS devices are P-type device, and the first conduction type is p-type,
Second conduction type is N-type.
8. method as claimed in claim 5, it is characterised in that：The injection of the ion implanting of suspension drift region described in step 3
Energy is 250KEV~400KEV, and implantation dosage is 1.4E13cm-2, the peak distance institute of the ion implanting of the suspension drift region
State 3000 angstroms~5000 angstroms of the first shallow trench oxygen bottom.
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| CN201310608507.0A CN104659076B (en) | 2013-11-25 | 2013-11-25 | DEMOS devices and manufacture method |
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| US8772871B2 (en) * | 2010-08-20 | 2014-07-08 | Freescale Semiconductor, Inc. | Partially depleted dielectric resurf LDMOS |
| US9024380B2 (en) * | 2012-06-21 | 2015-05-05 | Freescale Semiconductor, Inc. | Semiconductor device with floating RESURF region |
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