CN104658898A - Method for manufacturing low-temperature polycrystalline silicon film - Google Patents
Method for manufacturing low-temperature polycrystalline silicon film Download PDFInfo
- Publication number
- CN104658898A CN104658898A CN201310596975.0A CN201310596975A CN104658898A CN 104658898 A CN104658898 A CN 104658898A CN 201310596975 A CN201310596975 A CN 201310596975A CN 104658898 A CN104658898 A CN 104658898A
- Authority
- CN
- China
- Prior art keywords
- layer
- amorphous silicon
- low
- manufacture method
- polysilicon film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
The invention provides a method for manufacturing a low-temperature polycrystalline silicon film. The method comprises the following steps: providing a glass substrate with a buffer oxidation layer, forming an amorphous silicon layer and a protecting layer for covering the amorphous silicon layer in sequence on the buffer oxidation layer; heating the amorphous silicon layer at high temperature, and performing excimer laser annealing on the amorphous silicon layer, thereby forming a polycrystalline silicon layer; performing a photoetching process and an ion doping process on the polycrystalline silicon layer, thereby forming a grid electrode; forming a grid electrode oxidation layer on the buffer oxidation layer and the polycrystalline silicon layer, thereby forming the polycrystalline silicon film. Compared with the prior art, the method ensures the stability of devices and improves the product quality of the devices as the amorphous silicon layer and the protecting layer covering the amorphous silicon layer are coated with a film once, the amorphous silicon layer is isolated and the situation that the interface of the amorphous silicon layer is combined with an external contamination source when being exposed outside is avoided.
Description
Technical field
The present invention relates to display floater and manufacture field, espespecially a kind of manufacture method of low-temperature polysilicon film.
Background technology
Flourish along with flat-panel screens technology, active matrix type organic luminous display device (Active-Matrix Organic Light-Emitting Diode, AMOLED) because it has more frivolous, the good characteristic such as self-luminous and high reaction rate, the trend that future display develops is called.It can comprise the active switch be sequentially formed on substrate, insulating barrier, transparency electrode, luminescent layer and metal electrode, and wherein, active switch is connected with transparency electrode by contact hole, to control the write of view data.At present, for adapting to the development of AMOLED size-enlargement, active switch adopts low-temperature polysilicon film transistor (Low Temperature Poly-silicon TFT, LTPS-TFT) as pixel switch control element usually; And have direct impact for the preparation of the whether fine or not electrical performance for LTPS-TFT of quality of the low-temperature polysilicon film of LTPS-TFT, therefore, the manufacturing technology of low-temperature polysilicon film also more and more comes into one's own.
In the prior art, the manufacture method of low-temperature polysilicon film generally comprises: the making of the making of device channel, dopping process and gate electrode.Because of in low temperature polycrystalline silicon manufacture craft, many interfaces can be produced between different film kind, wherein, important with the interface of the polysilicon at device channel place and gate insulation layer again.Mainly be: one is that the state of raceway groove place polysilicon surface can be subject to length and changing standby time, directly can affect the characteristic of device as carrier transport factor and electric current; Two is that the pollutant sources of surface in environment are combined, the also more difficult control of its pollutant sources adsorbed, metal ion or organic acidity ion can cause the critical voltage of device to offset, and make the characteristic of device unstable, even cannot reach the requirement of product design and the bad of follow-up reliability test.
Summary of the invention
The object of the present invention is to provide a kind of manufacture method of low-temperature polysilicon film, being exposed to outer state variation and the pollutant sources in environment are combined and affect the problems such as device quality for solving polysilicon interface in prior art.
The technical scheme realizing above-mentioned purpose is:
The invention provides a kind of manufacture method of low-temperature polysilicon film, comprising: the glass substrate with buffer oxide layer is provided; The protective layer of amorphous silicon layer and the described amorphous silicon layer of covering is sequentially formed on described buffer oxide layer; High-temperature heating is carried out to described amorphous silicon layer, and quasi-molecule laser annealing is carried out to described amorphous silicon layer, form polysilicon layer; Photo-etching processes and ion doping technique are performed to described polysilicon layer, forms grid; On described buffer oxide layer and described protective layer, form grid oxic horizon, form polysilicon membrane.
Adopt the manufacture method of above-mentioned low-temperature polysilicon film; by the protective layer of amorphous silicon layer and the described amorphous silicon layer of covering is carried out a plated film; described amorphous silicon layer is isolated; thus avoid the pollutant sources of the interface of described amorphous silicon layer because being exposed to the external world in the external world to be combined; ensure that the device stability subsequently through the polysilicon layer formed after described amorphous silicon layer is given quasi-molecule laser annealing, improve the product quality of device.
The further improvement of the manufacture method of a kind of low-temperature polysilicon film of the present invention is: described buffer oxide layer comprises silicon nitride layer and is positioned at the silicon oxide layer on described silicon nitride layer.
The further improvement of the manufacture method of a kind of low-temperature polysilicon film of the present invention is: the thickness of described amorphous silicon layer is
extremely
The further improvement of the manufacture method of a kind of low-temperature polysilicon film of the present invention is: perform photo-etching processes to described polysilicon layer and comprise: the described protective layer of etch away sections and described polysilicon layer the described buffer oxide layer manifested under described polysilicon layer, and remaining described polysilicon layer is namely as grid.
The further improvement of the manufacture method of a kind of low-temperature polysilicon film of the present invention is: described protective layer is silicon oxide layer.
The further improvement of the manufacture method of a kind of low-temperature polysilicon film of the present invention is: the thickness of described silicon oxide layer is
extremely
The further improvement of the manufacture method of a kind of low-temperature polysilicon film of the present invention is: also comprised form grid oxic horizon on described buffer oxide layer and described protective layer before: carry out surface treatment to described buffer oxide layer and described protective layer.
The further improvement of the manufacture method of a kind of low-temperature polysilicon film of the present invention is: be also included on described grid oxic horizon and form shading metal level.
The further improvement of the manufacture method of a kind of low-temperature polysilicon film of the present invention is: described grid oxic horizon is silicon nitride layer.
The further improvement of the manufacture method of a kind of low-temperature polysilicon film of the present invention is: described shading metal level is Mo layer.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of the manufacture method of low-temperature polysilicon film of the present invention;
Fig. 2 to Fig. 7 is the cross-sectional view of the manufacture method intermediate structure of the forming process of polysilicon membrane in one embodiment of low-temperature polysilicon film of the present invention.
Embodiment
Below by way of specific instantiation, embodiments of the present invention are described, those skilled in the art the content disclosed by this specification can understand other advantages of the present invention and effect easily.The present invention can also be implemented or be applied by embodiments different in addition, and the every details in this specification also can based on different viewpoints and application, carries out various modification or change not deviating under spirit of the present invention.
Refer to accompanying drawing.It should be noted that, the diagram provided in the present embodiment only illustrates basic conception of the present invention in a schematic way, then only the assembly relevant with the present invention is shown in graphic but not component count, shape and size when implementing according to reality is drawn, it is actual when implementing, and the kenel of each assembly, quantity and ratio can be a kind of change arbitrarily, and its assembly layout kenel also may be more complicated.
Below in conjunction with the drawings and specific embodiments, the invention will be further described.
Refer to Fig. 1, Fig. 1 is the manufacture method schematic flow sheet in one embodiment of low-temperature polysilicon film of the present invention.
As shown in Figure 1, the manufacture method of low-temperature polysilicon film of the present invention comprises:
Step S101, provides the glass substrate with buffer oxide layer;
Step S103, sequentially forms the protective layer of amorphous silicon layer and the described amorphous silicon layer of covering on described buffer oxide layer;
Step S105, carries out high-temperature heating to described amorphous silicon layer, and carries out quasi-molecule laser annealing to described amorphous silicon layer, forms polysilicon layer;
Step S107, performs photo-etching processes and ion doping technique to described polysilicon layer, forms grid;
Step S109, forms grid oxic horizon on described buffer oxide layer and described protective layer, forms polysilicon membrane;
Step 111, forms shading metal level on described grid oxic horizon.
In order to illustrate in greater detail the manufacture method of low-temperature polysilicon film provided by the invention, the cross-sectional view below in conjunction with intermediate structure is described in detail.
Step S101, provides glass substrate 200, and glass substrate 200 is formed buffer oxide layer 203, forms structure as shown in Figure 2.In the present embodiment, buffer oxide layer 203 comprises silicon nitride (SiN
x) layer 202 and be positioned at silicon nitride (SiN
x) silica (SiO on layer 202
x) layer 204.Therefore, particularly, as shown in Figure 2, glass substrate 200 after cleaning sequentially forms silicon nitride (SiN
x) layer 202 and silica (SiO
x) layer 204, silicon nitride (SiN
x) layer 202 and silica (SiO
x) layer 204 forms buffer oxide layer 203, the quality of the low-temperature polysilicon film formed after buffer oxide layer 203 affects for preventing the impurity in glass substrate 200 from upwards spreading in subsequent technique, wherein, silicon nitride (SiN
x) layer 202 and silica (SiO
x) formation of layer 204 can adopt chemical vapour deposition (CVD) (Chemical vapor deposition, be called for short CVD), plasma activated chemical vapour deposition (Plasma Enhanced Chemical Vapor Deposition, be called for short PECVD) method, but not as limit, in other embodiments, the methods such as sputtering, vacuum evaporation or low-pressure chemical vapor deposition can also be adopted.
Step S103, buffer oxide layer 203 is sequentially formed the protective layer 208 of amorphous silicon (a-Si) layer 206 and covering amorphous silicon layer 206, forms structure as shown in Figure 3.As shown in Figure 3; in step s 103; by the protective layer 208 of amorphous silicon layer 206 and covering amorphous silicon layer 206 is carried out a plated film, protective layer 208 can be utilized to be isolated by amorphous silicon layer 206, thus avoid the pollutant sources of the interface of amorphous silicon layer 206 because being exposed to the external world in the external world to be combined.In the present embodiment: the thickness of amorphous silicon (a-Si) layer is
(Ethylmercurichlorendimide,
rice) extremely
described protective layer 208 is silica (SiO
x) layer, its thickness is
extremely
in actual applications; amorphous silicon (a-Si) layer 206 and protective layer 208 can complete in a reative cell; chemical vapour deposition (CVD) (Chemical vapor deposition can be adopted; be called for short CVD), plasma activated chemical vapour deposition (Plasma Enhanced Chemical Vapor Deposition; be called for short PECVD) method; but not as limit, in other embodiments, the methods such as sputtering, vacuum evaporation or low-pressure chemical vapor deposition can also be adopted.
Step S105, carries out high-temperature heating to amorphous silicon layer 206, and carries out quasi-molecule laser annealing to amorphous silicon layer 206, forms polysilicon layer 207, forms structure as shown in Figure 4.In the present embodiment, particularly, at the temperature of 400 DEG C to 500 DEG C, the 0.5 little high-temperature heating up to 3 hours is carried out to amorphous silicon layer 206, and quasi-molecule laser annealing is carried out to the amorphous silicon layer after high-temperature heating.This quasi-molecule laser annealing specifically adopts excimer laser (such as chlorination xenon (Xecl) excimer laser, KrF (KrF) excimer laser, argon fluoride (ArF) excimer laser etc.), makes amorphous silicon layer 206 crystallize into polysilicon layer 207.
Step S107, performs photo-etching processes and ion doping technique to polysilicon layer 207, forms grid, forms structure as shown in Figure 5.In the present embodiment; photo-etching processes (Photo Etching Process is performed to polysilicon layer 207; PEP) comprising: be coated with photoresist at polysilicon layer 207 and protective layer 208; optionally cover and etch described photoresist; the protective layer 208 of etch away sections and polysilicon layer 207 buffer oxide layer 203 manifested under polysilicon layer, remaining polysilicon layer 207 is namely as grid.
Step S109, forms grid oxic horizon 210 on buffer oxide layer 203 and protective layer 208, forms polysilicon membrane, forms structure as shown in Figure 6.In the present embodiment, before execution step S109, also comprise: surface treatment is carried out to buffer oxide layer 203 and protective layer 208, make surface more be conducive to the formation of subsequent gate oxide layer 210.Grid oxic horizon 210 can be specifically silicon nitride (SiN
x) layer.Like this, as the silicon nitride (SiN of grid oxic horizon 210
x) layer and be covered in silica (SiO as protective layer 208 on polysilicon layer 207
x) layer combination as gate insulator 209.As the silicon nitride (SiN of grid oxic horizon 210
x) formation of layer can adopt CVD, PECVD method, but not as limit, in other embodiments, can also adopt the methods such as sputtering, vacuum evaporation or low-pressure chemical vapor deposition.
Step S111, forms shading metal level 212 on grid oxic horizon 210, forms structure as shown in Figure 7.In the present embodiment, shading metal level 212 can make molybdenum Mo metal level.Particularly, the molybdenum Mo metal level as shading metal level 212 can adopt the method for physical vapour deposition (PVD) (PhysicalVapor Deposition, PVD) to be formed.
Below the beneficial effect of the manufacture method of a kind of low-temperature polysilicon film of the present invention is described.
The manufacture method of low-temperature polysilicon film of the present invention; by the protective layer of amorphous silicon layer and the described amorphous silicon layer of covering is carried out a plated film; described amorphous silicon layer is isolated; thus avoid the pollutant sources of the interface of described amorphous silicon layer because being exposed to the external world in the external world to be combined; ensure that the device stability subsequently through the polysilicon layer formed after described amorphous silicon layer is given quasi-molecule laser annealing, improve the product quality of device.
Below embodiment is to invention has been detailed description by reference to the accompanying drawings, and those skilled in the art can make many variations example to the present invention according to the above description.Thus, some details in embodiment should not form limitation of the invention, the present invention by the scope that defines using appended claims as protection scope of the present invention.
Claims (10)
1. a manufacture method for low-temperature polysilicon film, is characterized in that, comprising:
The glass substrate with buffer oxide layer is provided;
The protective layer of amorphous silicon layer and the described amorphous silicon layer of covering is sequentially formed on described buffer oxide layer;
High-temperature heating is carried out to described amorphous silicon layer, and quasi-molecule laser annealing is carried out to described amorphous silicon layer, form polysilicon layer;
Photo-etching processes and ion doping technique are performed to described polysilicon layer, forms grid;
On described buffer oxide layer and described protective layer, form grid oxic horizon, form polysilicon membrane.
2. the manufacture method of low-temperature polysilicon film as claimed in claim 1, is characterized in that, described buffer oxide layer comprises silicon nitride layer and is positioned at the silicon oxide layer on described silicon nitride layer.
3. the manufacture method of low-temperature polysilicon film as claimed in claim 1, it is characterized in that, the thickness of described amorphous silicon layer is
extremely
4. the manufacture method of low-temperature polysilicon film as claimed in claim 1; it is characterized in that; perform photo-etching processes to described polysilicon layer to comprise: the described protective layer of etch away sections and described polysilicon layer the described buffer oxide layer manifested under described polysilicon layer, remaining described polysilicon layer is namely as grid.
5. the manufacture method of the low-temperature polysilicon film as described in claim 1 or 4, is characterized in that, described protective layer is silicon oxide layer.
6. the manufacture method of low-temperature polysilicon film as claimed in claim 5, it is characterized in that, the thickness of described silicon oxide layer is
extremely
7. the manufacture method of low-temperature polysilicon film as claimed in claim 1, is characterized in that, also comprise: carry out surface treatment to described buffer oxide layer and described protective layer on described buffer oxide layer and described protective layer before forming grid oxic horizon.
8. the manufacture method of low-temperature polysilicon film as claimed in claim 1, is characterized in that, also comprise: on described grid oxic horizon, form shading metal level.
9. the manufacture method of the low-temperature polysilicon film as described in claim 1,7 or 8, is characterized in that, described grid oxic horizon is silicon nitride layer.
10. the manufacture method of low-temperature polysilicon film as claimed in claim 8, it is characterized in that, described shading metal level is Mo layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310596975.0A CN104658898A (en) | 2013-11-22 | 2013-11-22 | Method for manufacturing low-temperature polycrystalline silicon film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310596975.0A CN104658898A (en) | 2013-11-22 | 2013-11-22 | Method for manufacturing low-temperature polycrystalline silicon film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104658898A true CN104658898A (en) | 2015-05-27 |
Family
ID=53249880
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310596975.0A Pending CN104658898A (en) | 2013-11-22 | 2013-11-22 | Method for manufacturing low-temperature polycrystalline silicon film |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104658898A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017133094A1 (en) * | 2016-02-01 | 2017-08-10 | 武汉华星光电技术有限公司 | Method for manufacturing array substrate |
| CN108227376A (en) * | 2018-01-03 | 2018-06-29 | 京东方科技集团股份有限公司 | A kind of preparation method of micro-structure, impression formboard, display base plate |
| CN109585366A (en) * | 2018-12-03 | 2019-04-05 | 武汉华星光电半导体显示技术有限公司 | Low temperature polycrystalline silicon display panel manufacturing method |
| WO2019136873A1 (en) * | 2018-01-12 | 2019-07-18 | 武汉华星光电半导体显示技术有限公司 | Array substrate and manufacturing method thereof, display device |
| US11069724B2 (en) | 2018-01-12 | 2021-07-20 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Array substrate, manufacturing method thereof and display device using the same |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005064453A (en) * | 2003-07-29 | 2005-03-10 | Advanced Display Inc | Thin film transistor and its manufacturing method |
| CN1722385A (en) * | 2004-07-05 | 2006-01-18 | 三星Sdi株式会社 | Method of fabricating semiconductor device and semiconductor fabricated by the same method |
| CN101021659A (en) * | 2007-02-26 | 2007-08-22 | 友达光电股份有限公司 | Liquid crystal picture element and producing method thereof and liquid crystal display device |
| JP2010278095A (en) * | 2009-05-27 | 2010-12-09 | Dainippon Printing Co Ltd | Method of manufacturing thin film transistor substrate, and intermediate structure for forming thin film transistor substrate |
| CN102945789A (en) * | 2012-11-22 | 2013-02-27 | 京东方科技集团股份有限公司 | Preparation method of low-temperature polycrystalline silicon film, thin-film transistor and preparation method of thin-film transistor |
-
2013
- 2013-11-22 CN CN201310596975.0A patent/CN104658898A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005064453A (en) * | 2003-07-29 | 2005-03-10 | Advanced Display Inc | Thin film transistor and its manufacturing method |
| CN1722385A (en) * | 2004-07-05 | 2006-01-18 | 三星Sdi株式会社 | Method of fabricating semiconductor device and semiconductor fabricated by the same method |
| CN101021659A (en) * | 2007-02-26 | 2007-08-22 | 友达光电股份有限公司 | Liquid crystal picture element and producing method thereof and liquid crystal display device |
| JP2010278095A (en) * | 2009-05-27 | 2010-12-09 | Dainippon Printing Co Ltd | Method of manufacturing thin film transistor substrate, and intermediate structure for forming thin film transistor substrate |
| CN102945789A (en) * | 2012-11-22 | 2013-02-27 | 京东方科技集团股份有限公司 | Preparation method of low-temperature polycrystalline silicon film, thin-film transistor and preparation method of thin-film transistor |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017133094A1 (en) * | 2016-02-01 | 2017-08-10 | 武汉华星光电技术有限公司 | Method for manufacturing array substrate |
| CN108227376A (en) * | 2018-01-03 | 2018-06-29 | 京东方科技集团股份有限公司 | A kind of preparation method of micro-structure, impression formboard, display base plate |
| WO2019136873A1 (en) * | 2018-01-12 | 2019-07-18 | 武汉华星光电半导体显示技术有限公司 | Array substrate and manufacturing method thereof, display device |
| US11069724B2 (en) | 2018-01-12 | 2021-07-20 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Array substrate, manufacturing method thereof and display device using the same |
| CN109585366A (en) * | 2018-12-03 | 2019-04-05 | 武汉华星光电半导体显示技术有限公司 | Low temperature polycrystalline silicon display panel manufacturing method |
| WO2020113841A1 (en) * | 2018-12-03 | 2020-06-11 | 武汉华星光电半导体显示技术有限公司 | Method for manufacturing low-temperature polysilicon display panel |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105514116B (en) | TFT backplate structure and preparation method thereof | |
| CN103050410B (en) | The manufacture method of low-temperature polysilicon film transistor, low-temperature polysilicon film transistor | |
| CN102842619B (en) | A kind of semiconductor device and manufacture method thereof | |
| JP6398000B2 (en) | Thin film transistor array substrate | |
| CN103745955B (en) | Display device, array substrate and manufacturing method of array substrate | |
| US20160343739A1 (en) | Thin film transistor, method of manufacturing thin film transistor, array substrate and display device | |
| JP2007220817A (en) | Thin-film transistor and manufacturing method thereof | |
| CN103745978A (en) | Display device, array substrate and manufacturing method of array substrate | |
| CN106910748A (en) | A kind of array base palte, display device and preparation method thereof | |
| CN107170759B (en) | Array substrate, manufacturing method thereof and display device | |
| CN105304500B (en) | N-type TFT preparation method | |
| CN105097550A (en) | Low-temperature polycrystalline silicon thin film transistor (TFT) and manufacture method thereof | |
| CN104882485A (en) | Thin film transistor and manufacturing method thereof | |
| CN104658898A (en) | Method for manufacturing low-temperature polycrystalline silicon film | |
| CN104576399A (en) | Film transistor and manufacturing method thereof | |
| CN108550625A (en) | A kind of thin film transistor and its manufacturing method | |
| CN107808826A (en) | A kind of preparation method of bottom emitting top-gated self-aligned thin film transistor | |
| CN105097666A (en) | Fabrication method for low-temperature poly-silicon thin film transistor (TFT) substrate and low-temperature poly-silicon TFT substrate | |
| CN105140128A (en) | Low-temperature polycrystalline silicon thin film transistor and preparation method thereof | |
| CN107195583A (en) | A kind of OLED display panel and preparation method thereof | |
| CN105789317A (en) | Thin film transistor device and preparation method therefor | |
| US9252284B2 (en) | Display substrate and method of manufacturing a display substrate | |
| CN103745954A (en) | Display device, array substrate and manufacturing method of array substrate | |
| CN108269856A (en) | A kind of oxide semiconductor thin-film transistor and preparation method thereof, array substrate | |
| CN105552035B (en) | The production method and its structure of low temperature polycrystalline silicon tft array substrate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20150527 |
|
| WD01 | Invention patent application deemed withdrawn after publication |