CN104639080A - Quadrature phase correction circuit - Google Patents

Quadrature phase correction circuit Download PDF

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Publication number
CN104639080A
CN104639080A CN201410767067.8A CN201410767067A CN104639080A CN 104639080 A CN104639080 A CN 104639080A CN 201410767067 A CN201410767067 A CN 201410767067A CN 104639080 A CN104639080 A CN 104639080A
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CN
China
Prior art keywords
resistance
road
differential amplifier
switch
differential
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Pending
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CN201410767067.8A
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Chinese (zh)
Inventor
蒋仁杰
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CHANGSHA JINGJIA MICROELECTRONIC Co Ltd
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CHANGSHA JINGJIA MICROELECTRONIC Co Ltd
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Priority to CN201410767067.8A priority Critical patent/CN104639080A/en
Publication of CN104639080A publication Critical patent/CN104639080A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a quadrature phase correction circuit. The circuit is composed of two channels of differential amplifiers, namely an I-channel differential amplifier and a Q-channel differential amplifier as well as an IQ phase correction circuit, phase relation of IQ signals can be controlled by changing feedback factors of the I and Q channels, and phase correction of the IQ signals is realized.

Description

A kind of orthogonal phase correction circuit
Technical field
The present invention relates generally to the design field of software radio system phasing, refers in particular to a kind of orthogonal phase correction circuit.
Background technology
In the design of current analog CMOS integrated circuit, particularly in radio frequency signal receiver, owing to needing to quantize faint radiofrequency signal, usually digital signal is quantized into high-precision adc, because the excursion of radiofrequency signal is usually larger, in order to radio-frequency front-end signal meets ADC dynamic range, usually a programmable gain amplifier can all be increased in the front end of ADC, its objective is and control its gain according to the amplitude of radiofrequency signal, the input of ADC is made to drop within its dynamic range, thus the dynamic range requirement reduced ADC, alleviate the design pressure of high-precision adc, can be there is a problem in radiofrequency signal in addition when receiving demodulation, namely mirror image suppresses, in order to improve the mirror image rejection ability of receiver, usually all orthogonal quantification can be adopted, the mode of demodulation, namely before signal quantization, first be orthogonal signal intensity signal, this function is completed by frequency mixer usually, but can error be there is when converting the signal into orthogonal signalling due to frequency mixer, add the error that programmable gain amplifier and signal transmission path are introduced, during signal arrival ADC, its amplitude is not identical, also also non-fully is orthogonal for its phase place, and phase error will much larger than the impact of range error on receiver performance on the impact of receiver, so introduce quadrature demodulation to improve receiver mirror image rejection ability, and the phase error how solving orthogonal signalling becomes a key issue and difficult point.
Summary of the invention
The problem to be solved in the present invention is: for prior art Problems existing, proposes orthogonal phase correction circuit.
The solution that the present invention proposes is: introduce 4 resistance when IQ orthogonal signalling are amplified and feed back, by controlling these 4 resistance and controlling feedback factor, the phase difference variable that can control two-way orthogonal signalling is large, diminish or constant, namely realizes orthogonal phase correction.
Accompanying drawing explanation
Fig. 1 is circuit theory schematic diagram of the present invention;
Fig. 2 is reduced graph when Fig. 1 breaker in middle K1 closes, K2 disconnects;
Fig. 3 is reduced graph after Fig. 2 is converted into Single-end output form from fully differential form;
Fig. 4 is reduced graph when Fig. 1 breaker in middle K2 closes, K1 disconnects;
Fig. 5 is reduced graph after Fig. 4 is converted into Single-end output form from fully differential form.
Embodiment
Below with reference to accompanying drawing and concrete enforcement, the present invention is described in further details.
As shown in Figure 1, this circuit is made up of two-pass DINSAR amplifier and I road differential amplifier, Q road differential amplifier and an IQ phase-correcting circuit, by the resistance interactive relation of control I, Q two-way, namely the phase relation that resistance R9, R10, R11, R12 change I/Q signal is changed, the phase difference controlling I/Q signal increases, reduces, or constant.
This circuit has three kinds of mode of operations, and the first situation is that K switch 1 closes, and K2 disconnects; The second situation is that K switch 2 closes, and K1 disconnects; The third situation is K switch 1, K2 disconnects.Be explained respectively below:
(1) K switch 1 closes, and K2 disconnects
As shown in Figure 1, because the circuit parameter of IQ two-way is identical, i.e. R 1=R 3=R 5=R 7, R 2=R 4=R 6=R 8, R 9=R 10=R 11=R 12that K switch 1 closes as shown in Figure 2, mode of operation when K2 disconnects, electric capacity C1, C2, C3, C4 have wherein been channel filtering effects, its bandwidth chahnel is greater than signal bandwidth, can not affect gain and the phase place of passband, for the ease of analyzing, Fig. 2 is simplified to single-ended format as shown in Figure 3, then has:
V in 2 R 1 + V in 2 - V o 3 R 10 + V in 2 - V o 1 R 2 = 0 - - - ( 1 )
V in 4 R 5 + V in 4 - V o 1 R 12 + V in 4 - V o 3 R 6 = 0 - - - ( 2 )
IN1, IN2 are as shown in Figure 1 a pair differential signals, and IN3, IN4 are a pair differential signals, and this two teams' differential signal is orthogonality relation, now supposes V in1=Asin ω t, V in2=Asin (ω t+ π), V in3=Asin (ω t+ pi/2), V in4=Asin (ω t+3 pi/2), i.e. V in1=Asin ω t, V in2=-Asin ω t, V in3=Acos ω t, V in4=-Acos ω t.Through type (1), formula (2) can obtain:
( 1 R 1 + 1 R 10 + 1 R 2 ) · V in 2 = V o 3 R 10 + V o 1 R 2 - - - ( 3 )
( 1 R 1 + 1 R 10 + 1 R 2 ) · V in 4 = V o 1 R 10 + V o 3 R 2 - - - ( 4 )
Can obtain
V o 1 = 1 R 2 · ( 1 R 1 + 1 R 10 + 1 R 2 ) 1 R 2 2 - 1 R 10 2 · A · ( - sin ωt + R 2 R 10 cos ωt ) - - - ( 5 )
V o 3 = 1 R 2 · ( 1 R 1 + 1 R 10 + 1 R 2 ) 1 R 2 2 - 1 R 10 2 · A · ( - cos ωt + R 2 R 10 sin ωt ) - - - ( 6 )
Can obtain trigonometric function abbreviation further:
V o 1 = 1 R 2 · ( 1 R 1 + 1 R 10 + 1 R 2 ) 1 R 2 2 - 1 R 10 2 · 1 + ( R 2 R 10 ) 2 · ( - A sin ( ωt - θ ) ) , θ = arctg ( R 2 R 10 ) - - - ( 7 )
V o 3 = 1 R 2 · ( 1 R 1 + 1 R 10 + 1 R 2 ) 1 R 2 2 - 1 R 10 2 · 1 + ( R 2 R 10 ) 2 · ( - A cos ( ωt + θ ) ) , θ = arctg ( R 2 R 10 ) - - - ( 8 )
Under normal circumstances, R 10value all very large, and because needing the phase place of adjustment little, so all smaller, then have
V o 1 = ( 1 + R 2 R 1 ) · ( - A sin ( ωt - θ ) ) , θ = arctg ( R 2 R 10 ) - - - ( 9 )
V o 3 = ( 1 + R 2 R 1 ) · ( - A cos ( ωt + θ ) ) , θ = arctg ( R 2 R 10 ) - - - ( 10 )
Can be easy to find out from formula (9), formula (10), R 10the change of major effect phase place, can ignore the impact of gain, and phase place change can by controlling adjust, in this case, the phase difference of IQ two-way increases
(2) K switch 2 closes, and K1 disconnects
Be that K switch 2 closes as shown in Figure 4, mode of operation when K1 disconnects, in like manner, in order to just analyze, be simplified to single-ended format as shown in Figure 5, then having by Fig. 4:
V in 2 R 1 + V in 2 - V o 4 R 9 + V in 2 - V o 1 R 2 = 0 - - - ( 11 )
V in 3 R 7 + V in 3 - V o 1 R 12 + V in 3 - V o 4 R 8 = 0 - - - ( 12 )
In like manner can dissolve equation to obtain
V o 1 = ( 1 + R 2 R 1 ) · ( - A sin ( ωt + θ ) ) , θ = arctg ( R 2 R 9 ) - - - ( 13 )
V o 3 = ( 1 + R 2 R 1 ) · ( - A cos ( ωt - θ ) ) , θ = arctg ( R 2 R 9 ) - - - ( 14 )
Can be easy to find out from formula (13), formula (14), R 9the change of major effect phase place, can ignore the impact of gain, and phase place change can by controlling adjust, in this case, the phase difference of IQ two-way reduces
(3) K switch 1, K2 disconnect
In this case, IQ two-way does not feed back, so phase relation remains unchanged.
In sum, the present invention, by control IQ feedback system, can realize phasing direction, and by changing feedback factor, and regulating R9, R10, R11 and R12, can change concrete phase value, and structure is simple, control mode is flexible.

Claims (1)

1. the programmable gain amplifier circuit with orthogonal phase correction, is characterized in that:
By an I road differential amplifier, a Q road differential amplifier and an IQ phase-correcting circuit three part composition; I road differential amplifier is identical with on the differential amplifier arrangements of Q road, and wherein I road differential amplifier is made up of resistance R1, resistance R2, resistance R3, resistance R4, electric capacity C1, an electric capacity C2 and Differential OPAMP U1; Q road differential amplifier is made up of resistance R5, resistance R6, resistance R7, resistance R8, electric capacity C3, an electric capacity C4 and Differential OPAMP U2; IN1, IN2 are the differential signal inputs of I road, and O1, O2 are that I road differential signal exports, and IN3, IN4 are the differential signal inputs of Q road, and O3, O4 are Q road difference output, and the phase place of IN1 and IN2 is orthogonal, and the phase place of IN3 and IN4 is orthogonal; IQ delay control circuit is made up of resistance R9, resistance R10, resistance R11, resistance R12 and K switch 1, K switch 2, just can the feedback factor of control IQ two-way by control switch K1, K switch 2, realizes phasing.
CN201410767067.8A 2014-12-12 2014-12-12 Quadrature phase correction circuit Pending CN104639080A (en)

Priority Applications (1)

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Application Number Priority Date Filing Date Title
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CN104639080A true CN104639080A (en) 2015-05-20

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020029478A1 (en) * 2018-08-06 2020-02-13 上海玮舟微电子科技有限公司 Circuit parameter correction method and apparatus, chip and storage medium

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6044112A (en) * 1997-07-03 2000-03-28 Hitachi America, Ltd. Methods and apparatus for correcting amplitude and phase imbalances in demodulators
CN1684397A (en) * 2004-04-12 2005-10-19 索尼株式会社 Receiver
CN102124649A (en) * 2008-08-18 2011-07-13 日本电信电话株式会社 Vector synthesis type phase shifter, optical transceiver, and control circuit correction
CN102891658A (en) * 2012-11-02 2013-01-23 长沙景嘉微电子股份有限公司 Programmable gain amplifier circuit with orthogonal phase correction

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6044112A (en) * 1997-07-03 2000-03-28 Hitachi America, Ltd. Methods and apparatus for correcting amplitude and phase imbalances in demodulators
CN1684397A (en) * 2004-04-12 2005-10-19 索尼株式会社 Receiver
CN102124649A (en) * 2008-08-18 2011-07-13 日本电信电话株式会社 Vector synthesis type phase shifter, optical transceiver, and control circuit correction
CN102891658A (en) * 2012-11-02 2013-01-23 长沙景嘉微电子股份有限公司 Programmable gain amplifier circuit with orthogonal phase correction

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020029478A1 (en) * 2018-08-06 2020-02-13 上海玮舟微电子科技有限公司 Circuit parameter correction method and apparatus, chip and storage medium

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Application publication date: 20150520