CN104636525A - Checking method and device of printing circuit - Google Patents
Checking method and device of printing circuit Download PDFInfo
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- CN104636525A CN104636525A CN201310566900.8A CN201310566900A CN104636525A CN 104636525 A CN104636525 A CN 104636525A CN 201310566900 A CN201310566900 A CN 201310566900A CN 104636525 A CN104636525 A CN 104636525A
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Abstract
The invention provides a checking method and device of a printing circuit. According to the checking method of the printing circuit, a circuit layout is obtained at first, the circuit layout records a first layer and a second layer, the first layer records a plurality of circuits, each circuit has a code and corresponds to a first set of a plurality of coordinates on a coordinate system, and the second layer also corresponds to a second set of the multiple coordinates on the coordinate system; then, a keyword string is received, and for each circuit, when the code of each circuit contains the keyword string, the second set is compared with the first set corresponding to the circuit. By the adoption of the checking method and device of the printing circuit, the condition of copper exposure of the circuit can be automatically detected.
Description
Technical field
The present invention relates to printed circuit board (PCB) (printed circuit board), particularly relate to the method and apparatus whether design phase inspection circuit enters into brokenly copper (void) district.
Background technology
Electric design automation (electronic design automation, be called for short EDA) focus on the circuit design checking the problems & solutions on producing at present more, though also can the interference of signal and voltage between auxiliary detection routing layer (conductor layer) and flaggy (plane layer), practice be after copper inspection being done brokenly respectively to all circuits (net) in the Copper Foil region on flaggy, transfer to artificial visual comparison one by one.These practices spacious day, when giving up, easily flow and dredge in hundred close one, specifically its shortcoming was do not have specific aim, must check all circuits, and felt simply helpless to the broken copper phenomenon across Copper Foil.
Summary of the invention
In view of the above problems, the present invention aims to provide a kind of P.e.c. inspection method and a kind of P.e.c. testing fixture, can the broken copper situation of self-verifying circuit.
The invention provides a kind of P.e.c. inspection method, step comprises: obtain a circuit layout (layout), it records ground floor and the second layer, ground floor records again many circuits, circuit all has code, each circuit on coordinate system corresponding multiple coordinate first set, the second layer on coordinate system also corresponding multiple coordinate second set; Receive a keyword string; And to each circuit, when the code packages of circuit is containing aforementioned keyword string, compare this second set and corresponding this of this circuit first set.
The present invention also provides a kind of P.e.c. testing fixture, comprises layout modules, load module and checking module.Layout modules is in order to provide a circuit layout, it records ground floor and the second layer, and ground floor records again many circuits, and circuit all has code, each circuit on coordinate system corresponding multiple coordinate first set, the second layer on coordinate system also corresponding multiple coordinate second set.Load module is in order to receive a keyword string.Checking module couples layout modules and load module, in order to compare the first set of the second set and one of them correspondence of circuit; The code packages of this circuit is containing this keyword string.
In sum, P.e.c. inspection method of the present invention and device operate in a circuit layout, and in circuit layout, ground floor records circuit table (netlist), and the second layer is then associated with some rule that circuit need be followed.The coordinate set (or the image be made up of pixel " pixel ") of middle route selection road and the second layer, its deviation is broken copper place.Because circuit selects according in certain keyword string, inspection of the present invention is pointed, the demand of coincidence circuit designer.
The above explanation about content of the present invention and the explanation of following embodiment in order to demonstration and explanation spirit of the present invention and principle, and provide claims of the present invention further to explain.
Accompanying drawing explanation
Fig. 1 is the high level block diagram according to one embodiment of the invention P.e.c. testing fixture;
Fig. 2 is the process flow diagram according to one embodiment of the invention P.e.c. inspection method;
Fig. 3 is the schematic diagram of the first set of multiple coordinates that a circuit is corresponding;
Fig. 4 A is the schematic diagram of the second set of multiple coordinates that a flaggy is corresponding;
Fig. 4 B is the schematic diagram of the 3rd set of multiple coordinates that a flaggy is corresponding;
Fig. 4 C is the schematic diagram of the 3rd relative complement of a set collection that in the first set that a circuit is corresponding, a flaggy is corresponding;
Fig. 5 A is the schematic diagram of the second set of multiple coordinates in a Jin Zhi perforation district;
Fig. 5 B is the schematic diagram of the second relative complement of a set collection that in the first set that a circuit is corresponding, a Jin Zhi perforation district is corresponding.
Reference numeral
10: layout modules 12: image processing module
14: load module 16: checking module
3: coordinate system S201-S211: step
Embodiment
Below detailed features of the present invention and advantage is described in embodiments in detail, its content is enough to make anyly be familiar with person skilled and understand technology contents of the present invention and implement according to this, and according to content disclosed in the present specification, claims and accompanying drawing, be anyly familiar with person skilled and can understand the object and advantage that the present invention is correlated with easily.Following embodiment further describes viewpoint of the present invention, but non-to limit category of the present invention anyways.
Please refer to Fig. 1, Fig. 1 is the high level block diagram according to one embodiment of the invention P.e.c. testing fixture.As shown in Figure 1, P.e.c. testing fixture comprises layout modules 10, image processing module 12, load module 14 and checking module 16.Layout modules 10, image processing module 12 and checking module 16 three couple mutually, and checking module 16 separately couples load module 14.
Fig. 1 please be coordinate with reference to Fig. 2.Fig. 2 is the process flow diagram according to one embodiment of the invention P.e.c. inspection method.As shown in Figure 2, in step S201, layout modules 10 provides a circuit layout, and it can be the one or more archives in electric design automation.Circuit layout records ground floor and the second layer, and wherein ground floor can be routing layer, and routing layer comprises by many railway superstructures circuit table.In the present embodiment, the second layer represents flaggy, can be ground panel (ground plane) or power supply flaggy (power plane).Generally speaking, routing layer has the position of circuit corresponding copper-foil conducting electricity need be had in flaggy to be protected, but routing layer and flaggy are independent individual in fact, in circuit design process, both may produce difference, namely a kind of situation of so-called broken copper.
As previously mentioned, have a set of implicit limited coordinate system in circuit layout, ground floor and the second layer are corresponding all with it.Specifically, an elongated zones (circuit has width) on routing layer in all corresponding routing layer image of every bar circuit, the pixel respective coordinates in this region fastens the first set of multiple coordinate, as shown in Figure 3.In figure 3, circuit respective coordinates be can be labeled as on 3 (2, c), (2, d), (3, c) so that (6, the hatched example areas that coordinate d) etc. is formed.In like manner, flaggy (image) also can respective coordinates fasten multiple coordinate second set.Here alleged flaggy image refers to positive (positive), namely with the complexion of its reality during visual inspection flaggy.In step S203, image processing module 12 obtains in coordinate system gathers the 3rd complementary set with second, namely on flaggy without any the multiple coordinates corresponding to the region of Copper Foil or element.In other words, step S203 is equivalent to the negative film (negative) that image processing module 12 obtains flaggy image.For example, the flaggy image negative film shown in the flaggy image positive shown in Fig. 4 A bend region and Fig. 4 B bend region is Absolute complementarity (absolute complement) relation in limited coordinate system 3.
In step S205, load module receives a keyword string.In circuit table, every bar circuit all has its code or name; When name meets ad hoc rules, if frequency (clock) signal wire is all with " CLK_ " beginning, the frequency signal line that user's input " CLK " is all for keyword string can hunt out.In one embodiment, keyword string is inputted by user.In another embodiment, P.e.c. testing fixture of the present invention is preset with one or more keyword string.
In step S207, checking module 16 compares the first set corresponding to a circuit meeting keyword string and corresponding second the gathering of flaggy.Specifically, checking module 16 obtains the 3rd relative complement of a set collection (relative complement) in the first set, namely calculates the difference that the first set deducts the 3rd set.With image processing, checking module 16 carries out logic NOT (NOT) computing to the image (as Fig. 3) of this circuit with the negative film of flaggy image (as Fig. 4 B), obtains as the hatched example areas in Fig. 4 C.In step S209, checking module 16 judges whether the image of circuit changes, and whether the area as circuit reduces, that is compares the first set and aforementioned relative complement set.When judgement first set is not equal to aforementioned relative complement set, hatched example areas as Fig. 4 C compares Fig. 3 person, and to have lacked coordinate be (4, c) with (4, d) two blocks of broken copper, then checking module 16 at least one erroneous point in step S211 on record circuit, as the coordinate lacked in aforementioned relative complement set, and get back to step S207 and continue to check that other meets the circuit of keyword string.The record of erroneous point is for subsequent treatment, and as in one embodiment, layout modules 10 can show the circuit layout of the part of contiguous erroneous point, or in another embodiment, checking module 16 can revise the circuit layout of the part relevant with erroneous point automatically.In step S209, when judgement first set equals aforementioned relative complement set, checking module 16 is got back to step S207 and is continued to check that other meets the circuit of keyword string.
In another embodiment, the second layer is at least one Jin Zhi perforation district (via keepout), specify routing layer to reveal copper (therefore can not have circuit, have circuit to be broken the another kind of situation of copper) but the region that perforation (via) can not be placed, as shown in the hatched example areas of Fig. 5 A.Because Jin Zhi perforation district has been vague and general empty according to definition, not needing image processing module 12 to obtain, its negative film can be corresponding with the circuit meeting keyword string first gathers and compare.Checking module 16 obtains the second relative complement of a set collection corresponding to the first set Zhong Jinzhi perforation district, or with the image of the second layer (as Fig. 5 A), NOT computing is carried out to the image (as Fig. 3) of certain circuit, can obtain as the hatched example areas in Fig. 5 B, it is (3 compared to the coordinate that Fig. 3 lacks, c) with (4, c) two pieces are broken copper nidus.
In sum, P.e.c. inspection method of the present invention and device can the broken copper situations of specific circuit in self-verifying circuit layout, particularly line crossing flaggy Copper Foil or touch the situation in Jin Zhi perforation district, avoids the not efficiency with artificial inch-by-inch search and correction.
Claims (10)
1. a P.e.c. inspection method, is characterized in that, comprises:
Obtain a circuit layout, this circuit layout records a ground floor and a second layer, this ground floor records multiple circuit, and each this circuit has a code and one first set of multiple coordinate on a corresponding coordinate system, and this second layer is to should one second set of multiple coordinate on coordinate system;
Receive a keyword string; And
To each this circuit, when this code packages of this circuit is containing this keyword string, compare this second set and corresponding this of this circuit first set.
2. P.e.c. inspection method according to claim 1, is characterized in that, the step comparing this second set and corresponding this of this circuit first set comprises:
Obtain on this coordinate system and second gather one the 3rd complementary set with this; And
Obtain the 3rd relative complement of a set collection in this first set;
Wherein when described relative complement set is not equal to this first set, record at least one erroneous point on this circuit.
3. P.e.c. inspection method according to claim 2, is characterized in that, this second layer is a flaggy, the corresponding flaggy image of this flaggy, and this second set is to should the positive of flaggy image, and the 3rd set is to should the negative film of flaggy image.
4. P.e.c. inspection method according to claim 1, is characterized in that, this second layer is at least one Jin Zhi perforation district, and the step comparing this second set and corresponding this of this circuit first set comprises:
Obtain this second relative complement of a set collection in this first set;
Wherein when described relative complement set is not equal to this first set, record at least one erroneous point on this circuit.
5. the P.e.c. inspection method according to claim 2 or 4, is characterized in that, also comprise:
This circuit layout of part of display this erroneous point contiguous.
6. a P.e.c. testing fixture, is characterized in that, comprises:
One layout modules, in order to provide a circuit layout, this circuit layout records a ground floor and a second layer, this ground floor records multiple circuit, each this circuit has a code and one first set of multiple coordinate on a corresponding coordinate system, and this second layer is to should one second set of multiple coordinate on coordinate system;
One load module, in order to receive a keyword string; And
One checking module, couples this layout modules and this load module, and in order to compare this first set of this second set and those one of them correspondences of circuit, this code packages of this circuit is containing this keyword string.
7. P.e.c. testing fixture according to claim 6, is characterized in that, also comprise:
One image processing module, couples this layout modules, second gathers one the 3rd complementary set in order to obtain on this coordinate system with this;
Wherein when this checking module compares this second set and the first set of corresponding this of this circuit, this checking module obtains the 3rd relative complement of a set collection in this first set, and when described relative complement set is not equal to this first set, this checking module is more in order to record at least one erroneous point on this circuit.
8. P.e.c. testing fixture according to claim 7, is characterized in that, this second layer is a flaggy, the corresponding flaggy image of this flaggy, and this second set is to should the positive of flaggy image, and the 3rd set is to should the negative film of flaggy image.
9. P.e.c. testing fixture according to claim 6, it is characterized in that, this second layer is at least one Jin Zhi perforation district, and when this checking module compares this second set and the first set of corresponding this of this circuit, this checking module obtains this second relative complement of a set collection in this first set, and when described relative complement set is not equal to this first set, this checking module is more in order to record at least one erroneous point on this circuit.
10. the P.e.c. testing fixture according to claim 7 or 9, is characterized in that, this layout modules is more in order to show this circuit layout of part of this erroneous point contiguous.
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CN103096613A (en) * | 2011-11-07 | 2013-05-08 | 英业达科技有限公司 | Printed circuit board and manufacture method thereof |
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Effective date of registration: 20191213 Address after: Floor 1, building 3, No. 988, Xinxing Second Road, Pinghu Economic Development Zone, Jiaxing City, Zhejiang Province Patentee after: Jiaxing Weivo Semiconductor Co., Ltd. Address before: 201114 Shanghai City Caohejing export processing zone of Minhang District Pu Xing Road No. 789 Co-patentee before: Yingda Co., Ltd. Patentee before: Yingda Technology Co., Ltd. |
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