CN104617931B - SPWM signal generating circuit based on Direct Digital Synthesizer - Google Patents
SPWM signal generating circuit based on Direct Digital Synthesizer Download PDFInfo
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Abstract
The invention provides a kind of SPWM signal generating circuit based on Direct Digital Synthesizer，Which employs Direct Digital Synthesizer and produce the sine wave signal in SPWM circuit，The triangular signal producing in conjunction with frequency divider and integrating circuit uses the bipolar SPWM signal that Natural Sampling obtains，Make the distortion of the sine wave signal of its inversion reduction minimum，And the feature by Direct Digital Synthesizer，The generation overcoming SPWM signal in prior art adopts the deficiency of pure analog circuit scheme and the shortcoming of pure software programming scheme，Also remain pure analog circuit scheme and the respective advantage of pure software programming scheme in prior art simultaneously，So that the SPWM signal of output disclosure satisfy that waveform distortion is low，The degree of accuracy of signal frequency and amplitude is high，The adjustable extent of signal frequency is big、Degree of stability is good、The technical requirements such as frequency resolution is little，Effectively help promote the development of SPWM application technology performance.
Description
Technical field
The present invention relates to electronic circuit technology and pulse-modulated signal technical field are and in particular to a kind of be based on Direct Digital
The SPWM signal generating circuit of formula frequency synthesizer.
Background technology
Sinusoidal pulse width modulation ripple（SPWM）It is simply that in pulse width modulated wave（PWM）On the basis of change modulation pulse mode,
Pulse width time dutycycle is pressed sinusoidal rule and is arranged, through suitable filtering, such output waveform can accomplish that sine wave is defeated
Go out.It is widely used for the fields such as dc-to-ac inverter, converter, alternating current power supply, is all to utilize generally in these products
SPWM signal encourages full-bridge circuit, obtains sine wave signal after being then passed through low-pass filtering, and by whole machine signal output
End output.
However, in a lot of sinusoidal pulse width modulation Related product applications, all having higher technology to SPWM signal
Require.For example, in application scenarios such as maintenance of equipment, calibrating indicating instrument and scientific researches, generally require using relatively high power alternating current
Source it is desirable to the waveform distortion of this power output signal is low, the degree of accuracy height of output signal frequency, good stability, variable range
Greatly, resolution is little, the amplitude-controllable of output signal.If this alternating current power supply to be realized using SPWM mode, require SPWM signal
The sinusoidal signal of reduction possesses that waveform distortion is low, and frequency accuracy height, good stability, variable range are big, resolution is little, signal
Amplitude-controllable.How one of difficult point of research and development technology therein is it is simply that to generate the SPWM signal meeting above-mentioned requirements.
In the prior art, sinusoidal pulse width modulation ripple（SPWM）Generation method, mainly have hardware simulation circuit and software
Two kinds of implementations of programming.Hardware simulation circuit evolving mode is more traditional, and its analog circuit is mainly produced respectively by discrete device
Raw triangular wave and sine wave, then obtain SPWM waveform, the frequency of SPWM signal so producing and width by comparator synthesis
Degree precision is all higher, but shortcoming is a lack of the motility controlling, because being limited its frequency-adjustable by selected analog device
Scope is very little（Generally bandwidth is only several kHz）, and cannot be programmed to adjust SPWM signal frequency and
Amplitude, is therefore not easy to mutually integrated with stored program controlled and forms closed-loop control system and be applied.With the development of microcontroller,
DSP（Digital Signal Processor, digital signal processor）、FPGA（Field Programmable Gate
Array, field programmable gate array）、SOC（System on a Chip, system level chip, also referred to as SOC(system on a chip)）Etc. advanced
The appearance of high speed microprocessor is so that can be calculated in real time directly by microprocessor by carrying out software programming to microprocessor
Output SPWM waveform, the mode that software programming generates SPWM signal can be saved substantial amounts of external analog circuitry, be made Circuits System
It is simplified, and be conveniently programmed to SPWM signal is adjusted；But because microprocessor computing capability has
Limit, by its directly calculated SPWM waveform often have carrier wave ratio low, wave distortion is big, and signal stabilization is poor, resolution
Larger, the shortcomings of system resource occupancy is higher.
Can see, because the generation of SPWM signal in prior art adopts deficiency and the pure software of pure analog circuit scheme
The shortcoming of programming scheme, the SPWM signal that it produces all is difficult to meet that waveform distortion is low simultaneously, the essence of signal frequency and amplitude
Exactness is high, and the technical requirements such as the adjustable extent of signal frequency is big, degree of stability is good, frequency resolution is little, is just becoming restriction
The key factor of string pulsewidth modulation Related product technical performance development.
Content of the invention
For deficiency above-mentioned present in prior art, it is an object of the invention to provide a kind of be based on Direct Digital frequency
The SPWM signal generating circuit of rate synthesizer, it generates the SPWM signal of output and disclosure satisfy that waveform distortion is low, signal frequency
High with the degree of accuracy of amplitude, and the technical requirements such as the adjustable extent of signal frequency is big, degree of stability is good, frequency resolution is little, use
Cause to limit to limiting the development of sinusoidal pulse width modulation Related product technical performance to solve SPWM signal generation scheme in prior art
The problem of system.
To achieve these goals, present invention employs following technical scheme：
Based on the SPWM signal generating circuit of Direct Digital Synthesizer, including crystal oscillator, Direct Digital
Frequency synthesizer, low pass filter, frequency divider, integrating circuit, pulse width modulator, homophase gate circuit, anti-phase gate circuit, on first
Rise along delay circuit, the second rising edge delay circuit and four and gate circuit；Wherein：
Crystal oscillator exports the clock of the clock signal of CMOS level to Direct Digital Synthesizer and frequency divider
Signal input part；
The frequency configuration input of Direct Digital Synthesizer connects to frequency configuration derived digital signal, and amplitude is arranged
Input connects to amplitude setting simulation signal generator, and the sinusoidal signal outfan of Direct Digital Synthesizer passes through low pass filtered
Ripple device connects to the modulated signal input of pulse width modulator；
The fractional frequency signal outfan of frequency divider connects to the signal input part of integrating circuit, the triangular signal of integrating circuit
Outfan connects to the carrier signal input of pulse width modulator；
The SPWM signal output part of pulse width modulator is respectively connecting to homophase gate circuit and the signal input of anti-phase gate circuit
End；
It is electric with door that the in-phase signal outfan of homophase gate circuit is respectively connecting to first by the first rising edge delay circuit
One signal input part on road and second with a signal input part of gate circuit；Reversely the inversion signal outfan of gate circuit leads to
Cross the signal input part and the 4th and the one of gate circuit that the second rising edge delay circuit is respectively connecting to the 3rd and gate circuit
Individual signal input part；First rising edge delay circuit and the second rising edge delay circuit have identical transmission delay；
First with gate circuit, second with gate circuit, the 3rd with gate circuit, the 4th with another signal input part of gate circuit
Be connected in parallel to control signal level, first with gate circuit, second with gate circuit, the 3rd with gate circuit and the 4th with gate circuit
Four road SPWM signals of outfan output deactivate the left half-bridge upper arm of full-bridge circuit, right half-bridge underarm, left half-bridge respectively
Underarm and right half-bridge upper arm.
In above-mentioned SPWM signal generating circuit, as further improvement project, also include amplitude setting simulation signal generator
Circuit；Amplitude setting analogue signal source circuit includes alternating voltage sampling transformation circuit, digital to analog converter and error amplifier；Hand over
The sampling input of stream voltage sample translation circuit is connected in parallel to and is encouraged and exported by four SPWM signals being exported with gate circuit
The whole machine signal output part of sine wave signal, the voltage signal output end of alternating voltage sampling transformation circuit connects to error amplification
The comparison input of device；The digital signal input end of digital to analog converter arranges the input of program control signal as amplitude, and digital-to-analogue turns
The analog signal output of parallel operation connects to the benchmark input end of error amplifier；The amplification signal output part of error amplifier with
The amplitude setting input of Direct Digital Synthesizer is connected.
In above-mentioned SPWM signal generating circuit, preferably, described Direct Digital Synthesizer adopts type
Number for AD9850 DDS chip.
In above-mentioned SPWM signal generating circuit, preferably, described crystal oscillator adopts compensation crystal to vibrate
Device.
Compared to prior art, the present invention has the advantages that：
1st, the SPWM signal generating circuit based on Direct Digital Synthesizer for the present invention, employs Direct Digital frequency
Rate synthesizer produces the sine wave signal in SPWM circuit, can make sine wave by the feature of Direct Digital Synthesizer
The indexs such as the waveform distortion of signal, frequency accuracy, frequency stability, frequency resolution, frequency range meet design requirement.
2nd, the SPWM signal generating circuit based on Direct Digital Synthesizer for the present invention, is closed by Direct Digital frequency
Grow up to be a useful person generation sine wave signal, it is bipolar that the triangular signal producing in conjunction with frequency divider and integrating circuit uses that Natural Sampling obtains
Property SPWM signal, because the degree of accuracy of triangular wave carrier frequency and degree of stability are determined by crystal oscillator, can guarantee that inversion reduce
Sine wave signal distortion minimum.
3rd, in the SPWM signal generating circuit of the present invention, easily count because Direct Digital Synthesizer provides
The mode of word program control sine wave output signal frequency, additionally provides shifting gears of sine wave output signal amplitude, therefore coordinates
Whole machine voltage close loop controls, and can achieve the stable of whole machine sine wave output signal amplitude and programme-control.
4th, the SPWM signal generating circuit based on Direct Digital Synthesizer for the present invention, on the one hand overcomes existing skill
In art, the generation of SPWM signal adopts the deficiency of pure analog circuit scheme and the shortcoming of pure software programming scheme, on the other hand also same
When remain pure analog circuit scheme and the respective advantage of pure software programming scheme in prior art so that the SPWM signal of output
Disclosure satisfy that waveform distortion is low, the degree of accuracy of signal frequency and amplitude is high, and the adjustable extent of signal frequency is big, degree of stability
The technical requirements such as good, frequency resolution is little, can effectively help promote the development of SPWM application technology performance.
Brief description
Fig. 1 is a kind of framework schematic diagram of specific embodiment of SPWM signal generating circuit of the present invention.
Fig. 2 is the framework schematic diagram of SPWM signal generating circuit another kind specific embodiment of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawings technical scheme is described further.
The present invention provides a kind of SPWM signal generating circuit based on Direct Digital Synthesizer, as shown in figure 1, bag
Include crystal oscillator, Direct Digital Synthesizer, low pass filter, frequency divider, integrating circuit, pulse width modulator, homophase
Gate circuit, anti-phase gate circuit, the first rising edge delay circuit, the second rising edge delay circuit and four and gate circuit.Wherein,
Clock signal OSC that crystal oscillator exports CMOS level is defeated to the clock signal of Direct Digital Synthesizer and frequency divider
Enter end.The frequency configuration input D of Direct Digital SynthesizerFConnect to frequency configuration derived digital signal, amplitude is arranged
Input RSETConnect and simulation signal generator is set to amplitude, the sinusoidal signal outfan of Direct Digital Synthesizer is by low
Bandpass filter connects to the modulated signal input of pulse width modulator.The fractional frequency signal outfan of frequency divider connects to integrating circuit
Signal input part, the triangular signal outfan of integrating circuit connects to the carrier signal input of pulse width modulator.In arteries and veins
In wide manipulator, by the sine wave signal S that low pass filter is exported2Ratio with the triangular signal T of integrating circuit output
Relatively, obtain the bipolar SPWM signal SPWM of Natural Sampling1.The SPWM signal output part of pulse width modulator is respectively connecting to homophase
Gate circuit and the signal input part of anti-phase gate circuit, the in-phase signal outfan of homophase gate circuit passes through the first rising edge time delay electricity
Road be respectively connecting to first with a signal input part of gate circuit and second with a signal input part of gate circuit；Reverse swing door
It is defeated with a signal of gate circuit that the inversion signal outfan of circuit is respectively connecting to the 3rd by the second rising edge delay circuit
Enter a signal input part at end and the 4th and gate circuit；Wherein, the first rising edge delay circuit and the second rising edge time delay electricity
Road has identical transmission delay, in order to produce identical Dead Time.First with gate circuit, second with gate circuit, the 3rd with
Another signal input part of gate circuit, the 4th and gate circuit is connected in parallel to control signal level EN, for when needed（As
During whole machine output short-circuit）Four are made to close with gate circuit（Control signal level ENDuring for 0）And export 0 level, protection rear end quilt
The full-bridge circuit of excitation.First with gate circuit, second with gate circuit, the 3rd with gate circuit and the 4th with the output of gate circuit
Four road SPWM signals of end output deactivate the left half-bridge upper arm of full-bridge circuit, right half-bridge underarm, left half-bridge underarm respectively
With right half-bridge upper arm, this four outfans with gate circuit namely defeated as the SPWM signal of SPWM signal generating circuit of the present invention
Go out end.
In the present invention based in the SPWM signal generating circuit of Direct Digital Synthesizer, crystal oscillator exports
Clock signal OSC is CMOS level.The frequency that the frequency accuracy of OSC and frequency stability determine whole machine output signal is accurate
Degree and frequency stability.In a particular application, the SPWM signal generating circuit of the present invention preferably uses compensation crystal oscillator, because
It is its frequency accuracy of compensation crystal oscillator and frequency stability all can reach 10-5The order of magnitude, frequency accuracy and frequency
Rate degree of stability is all very high.
Direct Digital Synthesizer（DDS）Output signal S1It is the sine wave signal of stepped change shape, through low
Pure sine wave signal S can be obtained after bandpass filter filtering2.The frequency configuration input of Direct Digital Synthesizer
DFFor digital signal input end mouth, the frequency of DDS sine wave output signal directly can be set by digital signal, thus arranging by four
The individual SPWM signal with gate circuit output is encouraged the frequency of the sine wave signal of whole machine output obtaining, can be easily right
The sine wave signal frequency of whole machine output carries out program control.The amplitude setting input R of Direct Digital SynthesizerSETConnect
To amplitude, simulation signal generator S is setM, simulation signal generator S is arranged by amplitudeMGo to control width in Direct Digital Synthesizer
Value setting input RSETThe equivalent resistance being connected；This equivalent resistance is generally made up of the metal-oxide-semiconductor field effect transistor of N-channel, changes field
The grid voltage of effect pipe can change the equivalent resistance of field effect transistor drain-source interpolar, and grid voltage is higher, drain-source interpolar equivalent
Resistance is less, and the sinusoidal amplitude of DDS output is bigger, vice versa, so that the sine wave signal amplitude of DDS output can
Adjust.The waveform distortion of DDS sine wave output signal, frequency accuracy, frequency stability, frequency resolution, frequency change model
Enclose etc. and to determine the waveform distortion of whole machine sine wave output signal, frequency accuracy, frequency stability, frequency resolution, frequently
Rate excursion.As can be seen here, DDS is the critical component meeting design requirement.In a particular application, the SPWM signal of the present invention
Circuit is occurred to preferably employ the DDS chip of model AD9850.Because the SFDR when arrowband for the AD9850 type DDS chip is
80dBc, that is, output fundamental signal is the 10000 of maximum distortion signal（I.e. 104）Times, thus the output of AD9850 type DDS chip
Sine wave has the low-down distortion factor；Meanwhile, the frequency resolution of its sine wave output signal is clock frequency
4294967296（I.e. 232）/ mono-, for example, if clock frequency is 6MHz, the frequency resolution of its sine wave output signal is
0.0014Hz is it is seen that the frequency resolution of its sine wave output signal is very little；Moreover, AD9850 type DDS chip output
The frequency minima of sine wave signal can be 0Hz, and peak can be 1/2nd of clock frequency in theory, in 125MHz highest
Under clock, exportable 62.5MHz sinusoidal signal in theory, the non-constant width of frequency range of its sine wave output；Additionally, by changing
The amplitude setting input R of AD9850 type DDS chipSETThe equivalent resistance connecting can change the amplitude of sine wave output.Therefore,
Using AD9850 type DDS chip as SPWM signal generating circuit of the present invention Direct Digital Synthesizer, can be very
Good reaches many ginsengs such as waveform distortion, frequency accuracy, frequency stability, frequency resolution, frequency range
Number requires.
Frequency divider and integrating circuit are used for producing triangular wave carrier signal.In order to stablize the frequency of carrier signal, by crystal
As frequency of carrier signal after the signal frequency frequency dividing of agitator, output signal of frequency divider N is square-wave signal, after integrated circuit
Obtain triangular signal T.
In pulse width modulator, by comparing sine wave signal S2Obtain the bipolarity of Natural Sampling with triangular signal T
SPWM signal SPWM1.Using the bipolar SPWM mode of Natural Sampling, the distortion of the sine wave signal of reduction can be made minimum.
In order to obtain required full-bridge pumping signal, must be to SPWM signal inversion.SPWM1Export same after homophase gate circuit
Phase SPWM signal SPWM2.SPWM1Anti-phase SPWM signal SPWM is exported after inverted gate circuit2B.In order to ensure full-bridge pumping signal
There is the Dead Time of design, homophase SPWM signal SPWM2With anti-phase SPWM signal SPWM2BProlong through the first rising edge respectively
When the rising edge time delay to signal of circuit and the second rising edge delay circuit, obtain and there is the homophase SPWM signal of Dead Time
SPWM3With the anti-phase SPWM signal SPWM with Dead Time3B.Due to the first rising edge delay circuit and the second rising edge time delay
Circuit has identical transmission delay, therefore in-phase signal SPWM3With inversion signal SPWM3BAlso there is identical Dead Time.
There is the homophase SPWM signal SPWM of Dead Time3Through first with gate circuit and second with gate circuit after respectively defeated
Go out full-bridge pumping signal SPWMLUAnd SPWMRD, there is the anti-phase SPWM signal SPWM of Dead Time3BThrough the 3rd with gate circuit and
4th with gate circuit after export full-bridge pumping signal SPWM respectivelyLDAnd SPWMRU；Wherein, full-bridge pumping signal SPWMLUFor swashing
Encourage the left half-bridge upper arm of full-bridge circuit, full-bridge pumping signal SPWMRDFor encouraging the right half-bridge underarm of full-bridge circuit,
Full-bridge pumping signal SPWMLDFor encouraging the left half-bridge underarm of full-bridge circuit, full-bridge pumping signal SPWMRUFor encouraging
The right half-bridge upper arm of full-bridge circuit；This four full-bridge pumping signals i.e. SPWM signal as SPWM signal generating circuit is defeated
Go out.Additionally, first with gate circuit, second with gate circuit, the 3rd with gate circuit, the 4th with gate circuit another signal input
End is connected in parallel to control signal level source EN；As control signal level ENDuring for high level, four complete with the normal output of gate circuit
Bridge pumping signal；As control signal level ENDuring for low level, four with gate circuit then Close All and export low level, protection
Energized full-bridge circuit.It can be seen that, control signal level ENCan be defeated as the switching signal of full-bridge pumping signal or whole machine
Go out to protect control signal to use.
By the above-mentioned operation principle to the present invention based on the SPWM signal generating circuit of Direct Digital Synthesizer
Introduce it can be seen that in SPWM signal generating circuit of the present invention, the sine wave signal in SPWM circuit being produced using DDS, just making
The indexs such as the waveform distortion of string ripple signal, frequency accuracy, frequency stability, frequency resolution, frequency range meet design
Require, DDS provides the mode of easily digital program controlled sine wave output signal frequency, DDS additionally provides sine wave output letter
The shifting gears of number amplitude, the whole machine voltage close loop of cooperation controls, and can achieve the stable of whole machine amplitude output signal and programme-control.
The degree of accuracy of triangular wave carrier frequency and degree of stability are determined by crystal oscillator.The bipolar SPWM letter being obtained using Natural Sampling
Number, can guarantee that the distortion of the sine wave signal of reduction is minimum.The therefore SPWM based on Direct Digital Synthesizer for the present invention
The generation that signal generating circuit effectively overcomes SPWM signal in prior art adopts the deficiency of pure analog circuit scheme and pure soft
The shortcoming of part programming scheme, disclosure satisfy that waveform distortion is low, and the degree of accuracy of signal frequency and amplitude is high, and signal frequency
The technical requirements such as adjustable extent is big, degree of stability is good, frequency resolution is little.
Additionally, as further prioritization scheme, in the SPWM signal generating circuit of the present invention, as shown in Fig. 2 upper
The amplitude setting analogue signal source circuit of following structure, the setting simulation of this amplitude on the basis of stating circuit structure, can also be set up
Signal source circuit includes alternating voltage sampling transformation circuit, digital to analog converter and error amplifier；Alternating voltage sampling transformation electricity
The sampling input on road is connected in parallel to and is encouraged and the whole machine signal output part of sine wave output signal by SPWM signal, defeated to whole machine
Go out sine wave signal and carry out alternating voltage sampling, and be transformed to d. c. voltage signal, the size of this d. c. voltage signal and whole machine
The size of sine wave output signal is directly proportional, and the voltage signal output end of alternating voltage sampling transformation circuit connects to error amplification
The comparison input of device（"-" end）；The digital signal input end of digital to analog converter arranges the input of program control signal as amplitude,
This amplitude setting program control signal is in order to control DDS sine wave output signal amplitude（Also correspond to control whole machine sine wave output letter
Number amplitude）, the analog signal output of digital to analog converter connects to the benchmark input end of error amplifier（"+", holds）；Error
The signal output part that amplifies of amplifier arranges input R with the amplitude of Direct Digital SynthesizerSETIt is connected, due to by mistake
The signal of difference amplifier amplifies signals outfan output is also analogue signal, arranges simulation signal generator S as amplitudeMGo to control
The amplitude setting input R of DDSSET, thus adjusting the sine wave signal amplitude of DDS output, and then also make whole machine output sinusoidal
The amplitude of ripple signal is correspondingly made available adjustment.Handed over by the sine wave signal that alternating voltage sampling transformation circuit exports to whole machine
Stream voltage sample is simultaneously transformed to d. c. voltage signal, and the d. c. voltage signal that its voltage signal output end is exported is as feedback letter
The comparison input of number B put-into error amplifier A（"-" end）, this feedback signal B become with the amplitude of whole machine sine wave output signal
Proportional relationship；And amplitude setting program control signal can input to the digital signal input end of digital to analog converter, be converted to reference
Signal R（For analog DC signal）Exported to the benchmark input end of error amplifier A（"+", holds）, after circuit closed loop, due to
Error amplifier A has sufficiently large steady-state gain, and after loop stability, error amplifier compares input（"-" end）Feedback letter
Number B and benchmark input end（"+", holds）Reference signal R equal.Since so, if because of certain reason, whole machine sine wave output
Signal amplitude declines, then feedback signal B declines, error amplifier A output signal SMRise, the grid electricity of the field effect transistor of connection
Pressure rises, and the equivalent resistance of the drain-source interpolar of field effect transistor declines, the amplitude setting input R of DDSSETConnect equivalent resistance subtracts
Little, DDS sine wave output signal S1Amplitude rise, the amplitude of whole machine sine wave output signal also accordingly rises, the whole machine of result
The sine wave signal amplitude of output is basically unchanged（The slippage of whole machine sine wave output signal amplitude is in scope of design）, this is just
So that being encouraged the sine wave signal amplitude that the whole machine obtaining exports to have very to by four SPWM signals with gate circuit output
Good stability.If additionally, reference signal R is tuned up, output signal S of error amplifier AMBecome big, DDS output is sinusoidal
Ripple signal amplitude becomes big, and whole machine sine wave output signal amplitude also mutually strains big so that feeding back signal B to become big；Feedback signal B becomes
Loop stability when arriving equal with reference signal R greatly；Now, the variable quantity of feedback signal B is equal with the variable quantity of reference signal R,
And feed back the variable quantity of signal B with the variable quantity direct proportionality of whole machine sine wave output signal amplitude that is to say, that permissible
Adjust the amplitude of whole machine sine wave output signal by changing reference signal R；And simultaneously, reference signal R is by digital to analog converter
DAC provides, and the input of digital to analog converter DAC arranges program control signal D for the amplitude of numeralV, it is output as analogue signal R, therefore may be used
To arrange, by changing amplitude, the size that program control signal adjusts reference signal R, and then adjust whole machine sine wave output signal
Amplitude is so that the amplitude of whole machine sine wave output signal also can realize program control regulation as same frequency.
In sum, the SPWM signal generating circuit based on Direct Digital Synthesizer for the present invention, on the one hand overcomes
In prior art, the generation of SPWM signal adopts the deficiency of pure analog circuit scheme and the shortcoming of pure software programming scheme, another
Aspect also remains pure analog circuit scheme and the respective advantage of pure software programming scheme in prior art simultaneously so that output
SPWM signal disclosure satisfy that waveform distortion is low, and the degree of accuracy of signal frequency and amplitude is high, and the adjustable extent of signal frequency
The technical requirements such as greatly, degree of stability is good, frequency resolution is little, can effectively help promote the development of SPWM application technology performance.
Finally illustrate, above example only in order to technical scheme to be described and unrestricted, although with reference to relatively
Good embodiment has been described in detail to the present invention, it will be understood by those within the art that, can be to the skill of the present invention
Art scheme is modified or equivalent, the objective without deviating from technical solution of the present invention and scope, and it all should be covered at this
In the middle of the right of invention.
Claims (4)
1. the SPWM signal generating circuit based on Direct Digital Synthesizer is it is characterised in that include crystal oscillator, straight
Connect digital frequency synthesizer, low pass filter, frequency divider, integrating circuit, pulse width modulator, homophase gate circuit, inverse gate electricity
Road, the first rising edge delay circuit, the second rising edge delay circuit and four and gate circuit；Wherein：
Crystal oscillator exports the clock signal of the clock signal of CMOS level to Direct Digital Synthesizer and frequency divider
Input；
The frequency configuration input of Direct Digital Synthesizer connects to frequency configuration derived digital signal, amplitude setting input
End connects to amplitude setting simulation signal generator, and the sinusoidal signal outfan of Direct Digital Synthesizer passes through low pass filter
Connect to the modulated signal input of pulse width modulator；
The fractional frequency signal outfan of frequency divider connects to the signal input part of integrating circuit, the triangular signal output of integrating circuit
End connects to the carrier signal input of pulse width modulator；
The SPWM signal output part of pulse width modulator is respectively connecting to homophase gate circuit and the signal input part of anti-phase gate circuit；
The in-phase signal outfan of homophase gate circuit is respectively connecting to first with gate circuit by the first rising edge delay circuit
One signal input part and second with a signal input part of gate circuit；Reversely the inversion signal outfan of gate circuit passes through the
Two rising edge delay circuits be respectively connecting to the 3rd with a signal input part of gate circuit and the 4th with a letter of gate circuit
Number input；First rising edge delay circuit and the second rising edge delay circuit have identical transmission delay；
First with gate circuit, second with gate circuit, the 3rd with gate circuit, the 4th in parallel with another signal input part of gate circuit
Connect to control signal level, first with gate circuit, second with gate circuit, the 3rd with gate circuit and the 4th with the output of gate circuit
Four road SPWM signals of end output deactivate the left half-bridge upper arm of full-bridge circuit, right half-bridge underarm, left half-bridge underarm respectively
With right half-bridge upper arm.
2. SPWM signal generating circuit according to claim 1 is it is characterised in that also include amplitude setting simulation signal generator
Circuit；Amplitude setting analogue signal source circuit includes alternating voltage sampling transformation circuit, digital to analog converter and error amplifier；
The SPWM signal of SPWM signal generating circuit output deactivates full-bridge circuit, the SPWM letter of full-bridge circuit output
Sine wave signal the outfan output by whole machine is obtained after number low-pass filtered device filtering；
The sampling input of alternating voltage sampling transformation circuit is connected in parallel to and is encouraged by four SPWM signals with gate circuit output
And the whole machine signal output part of sine wave output signal, the voltage signal output end of alternating voltage sampling transformation circuit connects to by mistake
The comparison input of difference amplifier；
The digital signal input end of digital to analog converter arranges the input of program control signal, the simulation letter of digital to analog converter as amplitude
Number outfan connects to the benchmark input end of error amplifier；
The signal output part that amplifies of error amplifier is connected with the amplitude setting input of Direct Digital Synthesizer.
3. SPWM signal generating circuit according to claim 1 is it is characterised in that described Direct Digital Synthesizer
DDS chip using model AD9850.
4. SPWM signal generating circuit according to claim 1 is it is characterised in that described crystal oscillator adopts temperature compensation brilliant
Oscillation body device.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003142993A (en) * | 2001-11-02 | 2003-05-16 | Iwatsu Electric Co Ltd | Modulation signal generating device |
| CN101630899A (en) * | 2008-08-07 | 2010-01-20 | 广东易事特电源股份有限公司 | Method and device for forming SPWM waveform based on embedded type NIOS soft IP core |
| CN103728952A (en) * | 2014-01-09 | 2014-04-16 | 渤海大学 | Multi-mode SPWM (Sine Pulse Width Modulation) signal generator and signal generation method thereof applied to embedded control system |
| CN204376857U (en) * | 2015-02-16 | 2015-06-03 | 重庆希诺达通信有限公司 | Based on the SPWM signal generating circuit of Direct Digital Synthesizer |
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