CN104615570B - The bidirectional data exchange system and method for Intrusion Detection based on host and DSP - Google Patents
The bidirectional data exchange system and method for Intrusion Detection based on host and DSP Download PDFInfo
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Abstract
This application discloses a kind of Intrusion Detection based on host and the bidirectional data exchange system and method for DSP, system includes：Counter, decoder, sequential control circuit, data latches, data selection means and converter, method include：Main frame is to transmission pulse signal and data in DSP；Counter carries out clock count to the pulse signal being input into from main frame to DSP；The data that main frame sends are converted to parallel data by converter；The pulse signal that counter is transmitted is translated into data bit by decoder；The invalid data position that sequential control circuit is transmitted to decoder is converted into control sequential instruction, and control sequential instruction is processed；Data latches are stored to the valid data position sent from decoder and valid data；Data selection means are combined selection to the valid data of data latches.Solve the two-way communication data exchange between the main frame and DSP that prior art cannot realize, and reduce the technical problem of the requirement to HPI.
Description
Technical field
It is the bidirectional data exchange system for being related to Intrusion Detection based on host and DSP specifically the present invention relates to communication test field
And method.
Background technology
DSP provides good solution for high speed, Real-time digital signal processing, and the dsp chip of high speed is extensive
Be applied to various fields.But, when dsp chip and main-machine communication, traditional communication mode has been difficult to meet high speed side
Just wait and require.Outward appearance and main-machine communication need a kind of interface to realize.
The method that the common method of present technology can be typically directly connected to using main frame with the HPI of DSP, Huo Zhetong
One piece of special chip host side parallel port connection is crossed, DSP sections switchs to UHPI interfaces, connects sufficiently complex on this method hardware,
Data wire is needed, address wire, control line is higher to main frame requirement.
In addition, in the prior art, disclosing one kind and realizing that DSP is led to other buses or CPU using HPI interfaces
Letter.HPI interfaces can allow the primary processor of outside directly to access the partial memory in the mapping of DSP internal memories, and intervene without DSP.
The program designation of DSP can also be completed by HPI, DSP sends the work(such as interrupt signal requirement response of host interruption to main frame
Energy.HPI provides a parallel port for 16 bit wides, and using 14 bit address, each address fills the word of 16.But HPI can not
Other peripheral hardware registers are directly accessed, if main frame needs to obtain data from other peripheral hardwares, must be by CPU or 6 DMA
One in passage, first data are arranged in DARAM, otherwise still；Thus troublesome poeration, application is strong.
Therefore, the bidirectional data exchange system and method for a kind of Intrusion Detection based on host and DSP how is researched and developed, is solved the above problems,
It is technical problem urgently to be resolved hurrily to become.
The content of the invention
The subject matter that the application is solved is to provide the bidirectional data exchange system and method for Intrusion Detection based on host and DSP, to solve
The two-way communication data exchange that what certainly prior art cannot be realized make between main frame and DSP, and can reduce to HPI
It is required that technical problem.
In order to solve the above-mentioned technical problem, the invention provides Intrusion Detection based on host and the bidirectional data exchange system of DSP, bag
Include：Counter, decoder, sequential control circuit, data latches, data selection means and converter, wherein,
The counter, for carrying out clock count to the pulse signal being input into from main frame to DSP；
The decoder, the pulse signal for counter to be transmitted is translated into data bit, and is divided into valid data position and nothing
Effect data bit；
The sequential control circuit, the invalid data position for being transmitted to the decoder is converted into control sequential instruction,
And control sequential instruction is processed；
The converter, changes for the form to data；
The data latches, for deposit the valid data sent from decoder position and transmit from converter with institute
The corresponding data in valid data position are stated to be stored；
The data selection means, for being combined selection to the valid data that the data latches are latched, concurrently
In delivering to DSP.
Further, wherein, the decoder, including write decoding circuit and read decoding circuit, wherein,
It is described to write decoding circuit, it is described to write the arteries and veins that decoding circuit transmits the main frame when main frame sends write instruction
Rush signal and be translated into data bit, and by the data bit and the data write-in data latches corresponding with data bit；
The reading decoding circuit, when main frame sends reading instruction, in the reading decoding circuit called data latch
Data bit, and the data bit and the data corresponding with the data bit are sent into main frame by converter.
Further, wherein, the decoder is further binary decoder, code conversion decoder or display translate
Code device.
Further, wherein, the converter is further included：Serial-parallel conversion circuit and parallel-to-serial converter, wherein,
The serial-parallel conversion circuit, for converting serial data to parallel data；
The parallel-to-serial converter, for converting parallel data into serial data.
Further, wherein, the system also includes：Memory, the memory is used to be passed between storage host and DSP
The data and data bit sent.
The invention also discloses a kind of Intrusion Detection based on host and the bidirectional data exchange method of DSP, comprise the following steps：
Step 1：Main frame is to transmission pulse signal and data in DSP；
Step 2：Counter carries out clock count to the pulse signal being input into from main frame to DSP；
Step 3：The data that main frame sends are converted to parallel data by converter；
Step 4：The pulse signal that counter is transmitted is translated into data bit by decoder, and is divided into valid data position and invalid number
According to position；
Step 5：The invalid data position that sequential control circuit is transmitted to the decoder is converted into control sequential instruction, and right
After the control sequential instruction is processed, send into DSP；
Step 6：Data latches to the valid data position sent from the decoder and transmit from converter with institute
The corresponding valid data in valid data position are stated to be stored；
Step 7：Data selection means are combined selection to the valid data that the data latches are latched, and send extremely
In DSP.
Further, wherein, when main frame send reading instruction when, methods described also include step：
Step 8：After the sequential control circuit will be processed control sequential instruction, invalid data position is returned
Into the decoder；
Step 9：The decoder transfers the valid data of the data latches storage, sends into the converter,
The decoder sends into counter invalid data position；
Step 10：The valid data are converted to serial data and sent into main frame by the converter；
Step 11：Invalid data position and the valid data corresponding with the valid data in the counter decoder
Position is sent into main frame.
Further, wherein, methods described also include step：
Memory is stored to the data and data bit that are transmitted between main frame and DSP.
Further, wherein, the converter is further included：Serial-parallel conversion circuit and parallel-to-serial converter, wherein,
The serial-parallel conversion circuit, for converting serial data to parallel data；
The parallel-to-serial converter, for converting parallel data into serial data.
Further, wherein, the decoder, including write decoding circuit and read decoding circuit, wherein,
It is described to write decoding circuit, it is described to write the arteries and veins that decoding circuit transmits the main frame when main frame sends write instruction
Rush signal and be translated into data bit, and by the data bit and the data write-in data latches corresponding with data bit；
The reading decoding circuit, when main frame sends reading instruction, in the reading decoding circuit called data latch
Data bit, and the data bit and the data corresponding with the data bit are sent into main frame by converter.
Compared with prior art, Intrusion Detection based on host described herein and the bidirectional data exchange system and method for DSP, reach
Following effect：
(1) the bidirectional data exchange system of Intrusion Detection based on host of the present invention and DSP, including：Counter, decoder, when
Sequence control circuit, data latches, data selection means and converter, total system set simple, and without providing system again
Clock synchronization, transmits altogether 48BIT data, 6 bytes, beneficial to the control of main frame during transmission.
(2) the bidirectional data exchange system of Intrusion Detection based on host of the present invention and DSP, it is no longer necessary to data wire and address
Line, easily realizes the communication between main frame and DSP, and can realize the exchange of two-way communication data, reduces to HPI
Requirement.
(3) the bidirectional data exchange method of Intrusion Detection based on host of the present invention and DSP, its method is simple, and application is strong.
Brief description of the drawings
Accompanying drawing described herein is used for providing a further understanding of the present invention, constitutes a part of the invention, this hair
Bright schematic description and description does not constitute inappropriate limitation of the present invention for explaining the present invention.In the accompanying drawings：
Fig. 1 is the overall structure figure of the Intrusion Detection based on host described in the embodiment of the present invention 1 and the bidirectional data exchange system of DSP.
Fig. 2 is the flow chart of the Intrusion Detection based on host described in the embodiment of the present invention 2 and the bidirectional data exchange method of DSP.
Fig. 3 is the overall structure figure of the Application Example described in the embodiment of the present invention 3.
Specific embodiment
Some vocabulary have such as been used to censure specific components in the middle of specification and claim.Those skilled in the art should
It is understood that hardware manufacturer may call same component with different nouns.This specification and claims are not with name
The difference of title is used as distinguishing the mode of component, but the difference with component functionally is used as the criterion distinguished.Such as logical
The "comprising" of piece specification and claim mentioned in is an open language, therefore should be construed to " include but do not limit
In "." substantially " refer to that in receivable error range, those skilled in the art can solve described in the range of certain error
Technical problem, basically reaches the technique effect.Additionally, " coupling " one word herein comprising it is any directly and indirectly electric property coupling
Means.Therefore, if a first device is coupled to a second device described in text, representing the first device can direct electrical coupling
The second device is connected to, or the second device is electrically coupled to indirectly by other devices or coupling means.Specification
Subsequent descriptions be implement the application better embodiment, so it is described description be for the purpose of the rule for illustrating the application,
It is not limited to scope of the present application.The protection domain of the application ought be defined depending on the appended claims person of defining.
The application is described in further detail below in conjunction with accompanying drawing, but not as the restriction to the application.
Embodiment 1
As shown in figure 1, being a kind of Intrusion Detection based on host of the present invention and the overall structure of the bidirectional data exchange system of DSP
Figure, including：Counter 1, decoder 3, sequential control circuit 4, data latches 5, data selection means 7 and converter 2, its
In,
The counter 1, mutually couples with the decoder 3；During for being carried out to the pulse signal being input into from main frame to DSP
Clock is counted；
The decoder 3, mutually couples with the counter 1, sequential control circuit 4 and data latches 5 respectively；For inciting somebody to action
The pulse signal that counter 1 is transmitted is translated into data bit, and is divided into valid data position and invalid data position；
The sequential control circuit 4, mutually couples with the counter 1, for the invalid data transmitted to the decoder 3
Position is converted into control sequential instruction, and control sequential instruction is processed；
The converter 2, mutually couples, with the decoder 3 and the data latches 5 for entering to data form respectively
Row conversion；
The data latches 5, mutually couple, for right with the decoder 3, converter 2 and data selection means 7 respectively
The valid data position sent from decoder 3 and the data corresponding with valid data position transmitted from converter 2 are carried out
Storage；
The data selection means 7, mutually couple with the data latches 5, for what is deposited to data latches lock 5
Valid data are combined selection, and send into DSP.
Preferably, as shown in figure 3, the decoder 3, including write decoding circuit 31 and read decoding circuit 32, wherein,
Described to write decoding circuit 31, when main frame sends write instruction, the decoding circuit 31 of writing transmits the main frame
Pulse signal be translated into data bit, and by the data bit and the data write-in data latches 5 corresponding with data bit；
The reading decoding circuit 32, when main frame sends reading instruction, the called data latch 5 of the reading decoding circuit 32
In data bit, and the data bit and the data corresponding with the data bit are sent into main frame by converter 2.
Preferably, as shown in figure 3, the converter 2, further includes：Serial-parallel conversion circuit 22 and parallel-to-serial converter
21, wherein,
The serial-parallel conversion circuit 22, for converting serial data to parallel data；
The parallel-to-serial converter 21, for converting parallel data into serial data.
In addition, the converter 2 can also be string simultaneously-parallel-to-serial converter, i.e., can just be realized in a converter
The mutual conversion of serial data and parallel data.
Preferably, the system also includes：Memory, the memory is used for the number transmitted between storage host and DSP
According to and data bit.
During specific implementation, main frame in DSP during transmitting data information, main frame by the data message be divided into pulse signal and
Data, the pulse signal is sent into counter, by the data is activation to converter, due to what is sent from host side
Data are serial data, if then converter for string simultaneously-parallel-to-serial converter, be sent directly to the string simultaneously-parallel-serial conversion electricity
In road, if converter is divided into serial-parallel conversion circuit and parallel-to-serial converter, the data sent from host side are needed to send
Changed to serial-parallel conversion circuit.Sent into the decoder after converting data to parallel data, the decoder can
Think read/write decoder, if decoder is read/write decoder, parallel data is sent directly to the reading/decoder i.e.
Can, if decoder is divided into reading and decoding circuit and writes decoding circuit, parallel data is sent to writing decoding circuit.
When main frame sends write instruction, the pulse signal that the main frame is transmitted is translated into data bit by the decoder, and
By in the data bit and the data is activation corresponding with the data bit to data latches and storage, then, the data choosing
Select device and the valid data that the data latches are latched are combined with selection, and send into DSP.
When main frame sends reads instruction, after the sequential control circuit will be processed control sequential instruction
As a result, it is back in the decoder；If read/write decoder, then directly return and send into the read/write decoder i.e.
Can, if decoder is divided into reading decoding circuit and writes decoding circuit, should send into the reading decoding circuit, it is described in addition to translate
Code device transfers the valid data of the data latches storage, sends into the converter；If the converter for string simultaneously-
Parallel-to-serial converter, then be sent directly to the string simultaneously-parallel-to-serial converter in, if converter is divided into serial-parallel conversion circuit
And parallel-to-serial converter, then the data sent from host side need to be sent to parallel-to-serial converter and be changed；The converter
The valid data are converted into serial data to send into main frame, the counter by invalid data position and with the significant figure
Sent into main frame according to corresponding valid data position.
Embodiment 2
In addition, as shown in Fig. 2 the invention also discloses a kind of bidirectional data exchange method of Intrusion Detection based on host and DSP, including
Following steps：
Step 1：Main frame is to transmission pulse signal and data in DSP；
Step 2：Counter carries out clock count to the pulse signal being input into from main frame to DSP；
Step 3：The data that main frame sends are converted to parallel data by converter；
Step 4：The pulse signal that counter is transmitted is translated into data bit by decoder, and is divided into valid data position and invalid number
According to position；
Step 5：The invalid data position that sequential control circuit is transmitted to the decoder is converted into control sequential instruction, and right
After the control sequential instruction is processed, send into DSP；
Step 6：Data latches to the valid data position sent from the decoder and transmit from converter with institute
The corresponding valid data in valid data position are stated to be stored；
Step 7：Data selection means are combined selection to the valid data that the data latches are latched, and send extremely
In DSP.
In addition, the invention also discloses another Intrusion Detection based on host and the bidirectional data exchange method of DSP, including following step
Suddenly：
Step 1：Main frame is to transmission pulse signal and data in DSP；
Step 2：Counter carries out clock count to the pulse signal being input into from main frame to DSP；
Step 3：The data that main frame sends are converted to parallel data by converter；
Step 4：The pulse signal that counter is transmitted is translated into data bit by decoder, and is divided into valid data position and invalid number
According to position；
Step 5：The invalid data position that sequential control circuit is transmitted to the decoder is converted into control sequential instruction, and right
After the control sequential instruction is processed, send into DSP；
Step 6：Data latches to the valid data position sent from the decoder and transmit from converter with institute
The corresponding valid data in valid data position are stated to be stored；
Step 7：Data selection means are combined selection to the valid data that the data latches are latched, and send extremely
In DSP.
Step 8：After the sequential control circuit will be processed control sequential instruction, invalid data position is returned
Into the decoder；
Step 9：The decoder transfers the valid data of the data latches storage, sends into the converter,
The decoder sends into counter invalid data position；
Step 10：The valid data are converted to serial data and sent into main frame by the converter；
Step 11：The counter by decoder invalid data position and the significant figure corresponding with the valid data
Sent into main frame according to position.
Preferably, methods described also includes step：
Memory is stored to the data and data bit that are transmitted between main frame and DSP.
Preferably, the converter, further includes：Serial-parallel conversion circuit and parallel-to-serial converter, wherein,
The serial-parallel conversion circuit, for converting serial data to parallel data；
The parallel-to-serial converter, for converting parallel data into serial data.
Preferably, the decoder, including write decoding circuit and read decoding circuit, wherein,
It is described to write decoding circuit, it is described to write the arteries and veins that decoding circuit transmits the main frame when main frame sends write instruction
Rush signal and be translated into data bit, and by the data bit and the data write-in data latches corresponding with data bit；
The reading decoding circuit, when main frame sends reading instruction, in the reading decoding circuit called data latch
Data bit, and the data bit and the data corresponding with the data bit are sent into main frame by converter.
Embodiment 3
The invention also discloses a kind of Intrusion Detection based on host and the Application Example of the bidirectional data exchange method of DSP,
Specifically, as shown in figure 3, being the system flow chart of this application embodiment, the main frame in DSP to transmitting 48BIT
During (6 byte) data message, the data message of the 48BIT is divided into pulse signal and data by main frame, by pulse signal hair
In delivering to counter 1, by the data is activation to converter 2, because the data sent from host side are serial data, will be from
Data is activation to the serial-parallel conversion circuit 22 that host side sends is changed.Convert data to and send after parallel data to described
In writing decoding circuit 32.
When main frame sends write instruction, the pulse signal that the main frame is transmitted is translated into 48 by the decoding circuit 32 of writing
Data bit, and in the data bit and the data is activation corresponding with the data bit to data latches 5 and will store, so
Afterwards, the valid data that 7 pairs of data latches 5 of the data selection means are latched are combined selection, and send to DSP
In.When main frame sends write instruction, the corresponding relation of the data bit and the data, as shown in table 1, D43-D12 is
Valid data position, the D47-D44 is control bit, and the D11-D0 is invalid data position, and D47 is used to judge whether data have
Effect, the D46 and D45 control signal for being used to send main frame；Described D44 is used to determine read/write operation.Generally,
After data selection means 7 are combined selection, understand with the combination of high position data and low data, for example, i.e. first will be high 16,
D0-D15 sends into DSP, then will be low 16, i.e. D16-D31 sends into DSP.
The main frame of table 1 sends data to DSP
| D47 | D46 | D45 | D44 | D43-D12 | D11,D10…D0 |
| It is whether effective | HCNTL1 | HCNTL0 | R/W | DATA(31:0) | xxx…xxx |
When main frame sends reads instruction, after the sequential control circuit 4 will be processed control sequential instruction
Result, that is, be back to it is described reading decoding circuit 31 in；The reading decoding circuit 31 is transferred the data latches 5 and is stored in addition
Valid data, send to being changed in the parallel-to-serial converter 21；The parallel-to-serial converter 21 is by the significant figure
Sent into main frame according to parallel data is converted to, the counter 1 by invalid data position and it is corresponding with the valid data
Valid data position is sent into main frame.When main frame sends reading to be instructed, the corresponding relation of the data bit and the data, warp
After data are returned, the data bit changes with the corresponding relation of the data, and as shown in table 2, D43-D32 is invalid number
According to position, the D47-D44 is control bit, and the D31-D0 is valid data position, and whether effectively D47 be used to judge data, D46
Position and the D45 control signal for being used to send main frame；Described D44 is used to determine read/write operation.
The main frame of table 2 reads the data that main frame sends to DSP
| D47 | D46 | D45 | D44 | D43_D32 | D31…D0 |
| It is whether effective | HCNTL1 | HCNTL0 | R/W | xxx…xxx | DATA(31:0) |
Compared with prior art, Intrusion Detection based on host described herein and the bidirectional data exchange system and method for DSP, reach
Following effect：
(1) the bidirectional data exchange system of Intrusion Detection based on host of the present invention and DSP, including：Counter, decoder, when
Sequence control circuit, data latches, data selection means and converter, total system set simple, and without providing system again
Clock synchronization, transmits altogether 48BIT data, 6 bytes, beneficial to the control of main frame during transmission.
(2) the bidirectional data exchange system of Intrusion Detection based on host of the present invention and DSP, it is no longer necessary to data wire and address
Line, easily realizes the communication between main frame and DSP, and can realize the exchange of two-way communication data, reduces and main frame is wanted
Ask.
(3) the bidirectional data exchange method of Intrusion Detection based on host of the present invention and DSP, its method is simple, and application is strong.
Because method part has been described in detail to the embodiment of the present application, the system to being related in embodiment here
Expansion with method corresponding part describes to omit, and repeats no more.Method is referred to for the description of particular content in system to implement
The content of example is no longer specific here to limit.
Described above has shown and described some preferred embodiments of the application, but as previously described, it should be understood that the application
Be not limited to form disclosed herein, be not to be taken as the exclusion to other embodiment, and can be used for various other combinations,
Modification and environment, and can be in application contemplated scope described herein, by above-mentioned teaching or the technology or knowledge of association area
It is modified.And the change and change that those skilled in the art are carried out do not depart from spirit and scope, then all should be in this Shen
Please be in the protection domain of appended claims.
Claims (8)
1. the bidirectional data exchange system of a kind of Intrusion Detection based on host and DSP, it is characterised in that including：Counter, decoder, sequential
Control circuit, data latches, data selection means and converter, wherein,
The counter, for carrying out clock count to the pulse signal being input into from main frame to DSP；
The decoder, for the pulse signal that the counter is transmitted to be translated into data bit, and is divided into valid data position and nothing
Effect data bit；
The sequential control circuit, the invalid data position for being transmitted to the decoder is converted into control sequential instruction, and right
The control sequential instruction is processed；
The converter, changes for the form to data；
The data latches, for deposit the valid data sent from decoder position and transmit from converter with institute
The corresponding data in valid data position are stated to be stored；
The data selection means, for the valid data that the data latches are latched to be combined with selection, and send extremely
In DSP；
The decoder is further binary decoder, code conversion decoder or display decoder；
The system also includes：Memory, the memory is used for the data and data bit transmitted between storage host and DSP.
2. the bidirectional data exchange system of Intrusion Detection based on host according to claim 1 and DSP, it is characterised in that the decoding
Device, including write decoding circuit and read decoding circuit, wherein,
It is described to write decoding circuit, it is described to write the pulse letter that decoding circuit transmits the main frame when main frame sends write instruction
Data bit number is translated into, and by the data bit and the data write-in data latches corresponding with data bit；
The reading decoding circuit, when main frame sends reading instruction, the data in the reading decoding circuit called data latch
Position, and the data bit and the data corresponding with the data bit are sent into main frame by converter.
3. the bidirectional data exchange system of Intrusion Detection based on host according to claim 1 and DSP, it is characterised in that the conversion
Device, further includes：Serial-parallel conversion circuit and parallel-to-serial converter, wherein,
The serial-parallel conversion circuit, for converting serial data to parallel data；
The parallel-to-serial converter, for converting parallel data into serial data.
4. a kind of bidirectional data exchange method of Intrusion Detection based on host and DSP, it is characterised in that comprise the following steps：
Step 1：Main frame is to transmission pulse signal and data in DSP；
Step 2：Counter carries out clock count to the pulse signal being input into from main frame to DSP；
Step 3：The data that main frame sends are converted to parallel data by converter；
Step 4：The pulse signal that the counter is transmitted is translated into data bit by decoder, and is divided into valid data position and invalid number
According to position；
Step 5：The invalid data position that sequential control circuit is transmitted to the decoder is converted into control sequential instruction, and to described
After control sequential instruction is processed, send into DSP；
Step 6：Data latches to the valid data position sent from the decoder and transmit from the converter with institute
The corresponding valid data in valid data position are stated to be stored；
Step 7：Data selection means are combined selection to the valid data that the data latches are latched, and send to DSP
In.
5. the bidirectional data exchange method of Intrusion Detection based on host according to claim 4 and DSP, it is characterised in that when main frame hair
When going out to read instruction, methods described also includes step：
Step 8：After the sequential control circuit will be processed control sequential instruction, invalid data position is back to institute
In stating decoder；
Step 9：The decoder transfers the valid data of the data latches storage, sends into the converter, described
Decoder sends into the counter invalid data position；
Step 10：The valid data are converted to serial data and sent into main frame by the converter；
Step 11：The counter by the decoder invalid data position and the significant figure corresponding with the valid data
Sent into main frame according to position.
6. the bidirectional data exchange method of Intrusion Detection based on host according to claim 4 and DSP, it is characterised in that methods described
Also include step：
Memory is stored to the data and data bit that are transmitted between main frame and DSP.
7. the bidirectional data exchange method of Intrusion Detection based on host according to claim 4 and DSP, it is characterised in that the conversion
Device, further includes：Serial-parallel conversion circuit and parallel-to-serial converter, wherein,
The serial-parallel conversion circuit, for converting serial data to parallel data；
The parallel-to-serial converter, for converting parallel data into serial data.
8. the bidirectional data exchange method of Intrusion Detection based on host according to claim 4 and DSP, it is characterised in that the decoding
Device, including write decoding circuit and read decoding circuit, wherein,
It is described to write decoding circuit, it is described to write the pulse letter that decoding circuit transmits the main frame when main frame sends write instruction
Data bit number is translated into, and by the data bit and the data write-in data latches corresponding with data bit；
The reading decoding circuit, when main frame sends reading instruction, the data in the reading decoding circuit called data latch
Position, and the data bit and the data corresponding with the data bit are sent into main frame by converter.
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| CN102622324A (en) * | 2012-02-29 | 2012-08-01 | 江西省电力科学研究院 | Design method of direct memory access interface for DSP (digital signal processor) system and PC (personal computer) |
| CN204480240U (en) * | 2015-01-23 | 2015-07-15 | 北京奥普维尔科技有限公司 | The bidirectional data exchange system of Intrusion Detection based on host and DSP |
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| CN104615570A (en) | 2015-05-13 |
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Inventor after: Zhu Tianquan Inventor after: Bao Shengqing Inventor after: Zhang Liang Inventor after: Guo Lina Inventor before: Zhu Tianquan Inventor before: Bao Shengqing Inventor before: Zhang Liang |