CN104600185A - LED packaging structure and wafer level packaging method thereof - Google Patents
LED packaging structure and wafer level packaging method thereof Download PDFInfo
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- CN104600185A CN104600185A CN201410845485.4A CN201410845485A CN104600185A CN 104600185 A CN104600185 A CN 104600185A CN 201410845485 A CN201410845485 A CN 201410845485A CN 104600185 A CN104600185 A CN 104600185A
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- 238000000034 method Methods 0.000 title claims abstract description 36
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 22
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 72
- 238000005538 encapsulation Methods 0.000 claims description 40
- 239000000945 filler Substances 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 230000008569 process Effects 0.000 claims description 11
- 239000011241 protective layer Substances 0.000 claims description 10
- 238000005516 engineering process Methods 0.000 claims description 9
- 238000004381 surface treatment Methods 0.000 claims description 8
- 239000000956 alloy Substances 0.000 claims description 6
- 229910045601 alloy Inorganic materials 0.000 claims description 6
- 239000002362 mulch Substances 0.000 claims description 6
- 230000001681 protective effect Effects 0.000 claims description 6
- 230000003287 optical effect Effects 0.000 claims description 5
- 238000001259 photo etching Methods 0.000 claims description 5
- 238000012545 processing Methods 0.000 claims description 5
- 238000009713 electroplating Methods 0.000 claims description 4
- 239000000178 monomer Substances 0.000 claims description 4
- 238000003466 welding Methods 0.000 claims description 4
- 238000004140 cleaning Methods 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 3
- 230000009467 reduction Effects 0.000 claims description 3
- 238000006722 reduction reaction Methods 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- 229920001169 thermoplastic Polymers 0.000 claims description 3
- 239000004416 thermosoftening plastic Substances 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 239000004065 semiconductor Substances 0.000 abstract description 4
- 230000005540 biological transmission Effects 0.000 abstract description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- 238000013461 design Methods 0.000 description 4
- 238000012856 packing Methods 0.000 description 4
- 239000000843 powder Substances 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 229920003023 plastic Polymers 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 239000000741 silica gel Substances 0.000 description 2
- 229910002027 silica gel Inorganic materials 0.000 description 2
- 241000218202 Coptis Species 0.000 description 1
- 235000002991 Coptis groenlandica Nutrition 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
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- 238000004070 electrodeposition Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000035800 maturation Effects 0.000 description 1
- 239000003595 mist Substances 0.000 description 1
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- 239000005304 optical glass Substances 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
The invention discloses an LED packaging structure and a wafer level packaging method thereof, and belongs to the technical field of packaging of semiconductors. The LED packaging structure is that a positive electrode and a negative electrode are arranged on the light output surface (11) of an LED chip (1); the LED chip (1) is inverted on a base (2), and the light output surface (1) of the LED chip (1) faces the base (2); a hollow cavity (20) is formed in the center of the base (2); bulges which are thinner than the base (2) are arranged at the inner side of the cavity (20) and respectively connected with the positive electrode and the negative electrode of the LED chip (1); the base (2) is composed of a plurality of secondary bases which are insulated from each other; each base is corresponding to each bulge; the secondary bases and the bulges are respectively of an integrated structure; a light transmission element (6) equipped with an arc-shaped concave cavity (631) is arranged on the upper surface of the base (2); a plurality of input/ output ends (25) are arranged on the lower surface of the base (2). The LED packaging structure is packaged by the wafer level packaging method; therefore, the LED packaging structure is simplified and thinned, and the production cost is reduced.
Description
Technical field
The present invention relates to a kind of LED encapsulation structure and wafer-level packaging method thereof, belong to technical field of semiconductor encapsulation.
Background technology
The light-emitting element chip of light-emitting diode (Light-Emitting Diode is called for short LED) forms by PN junction the semiconductor device that light emitting source launches the light of shades of colour.LED chip 1 is arranged at base central by traditional LED encapsulation structure, as shown in Figure 1, its electrode information is caused the pin 3 being fixed on pedestal by LED chip 1 by gold thread 11, metal pins 3 is connected with keyset again, and pedestal comprises the plastic base 22 being positioned at LED chip surrounding and the embedded pedestal 21 being embedded in plastic base central authorities, embedded pedestal 21 generally adopts copper billet, the top fixed L ED chip 1 of embedded pedestal 21, and by the heat that produces in LED chip 1 course of work from lower derivation.The complex structure of traditional LED encapsulation structure, its height, at 3 ~ 5 millimeters, limits the application space of LED encapsulation structure; Meanwhile, traditional LED encapsulation structure adopts single chips method for packing, complex process and a large amount of and bulk adopts copper embedded pedestal 21, and production cost is high.
Summary of the invention
The object of the invention is to the deficiency overcoming current LED packages structure and method, simple, the thinning LED encapsulation structure of a kind of structure, the LED encapsulation structure reducing production cost and wafer-level packaging method thereof are provided.
the object of the present invention is achieved like this:
A kind of LED encapsulation structure of the present invention, it comprises LED chip, the exiting surface of described LED chip arranges positive and negative electrode and circuit pattern thereof, described LED chip upside-down mounting is in pedestal, its exiting surface is towards pedestal, and the central authorities of described pedestal offer the die cavity of a hollow, the projection that the inner side thickness setting of described die cavity is thinner than pedestal, the upper surface of described projection and the upper surface flush of pedestal, described projection is connected with the positive and negative electrode of LED chip respectively;
Described pedestal is made up of several sub-base insulated from each other; each sub-base and each projection one_to_one corresponding; and be respectively integrative-structure; the upper surface of described pedestal arranges translucent element; the incidence surface of described translucent element arranges arch shaped cavity above die cavity; described arch shaped cavity covers the exiting surface of LED chip completely; the lower surface of described pedestal arranges several input/output terminals; the back side of LED chip and pedestal another side protective mulch and form the protective layer opening exposing input/output terminal, in described input/output terminal, connector is set.
What the positive and negative electrode of LED chip of the present invention was arranged at exiting surface closes on edge.
The shared area size of die cavity of the present invention is not less than the shared area size of LED chip.
The radian R1 of the incidence surface of arch shaped cavity of the present invention is (1/12) π ~ (1/6) π rad.
The height h2 of each described projection of the present invention is consistent, and the scope of its height h2 is 15 ~ 25 microns.
The exiting surface of translucent element of the present invention arranges blooming or optical texture.
Connector of the present invention is the metal microtrabeculae that soldered ball/welding block or top are provided with soldered ball.
The present invention arranges filler in the arch shaped cavity and/or die cavity of the top of described LED chip.
The wafer-level packaging method of a kind of LED encapsulation structure of the present invention, comprises step:
Get the translucent element be shaped by thermoplastic processes, its incidence surface is provided with arch shaped cavity, its exiting surface is provided with optical texture, again surface treatment is carried out to translucent element, described surface treatment comprises chemical cleaning, polishing or reduction processing and arranges blooming, translucent element is fixed on carrier disk by ephemeral key rubber alloy, arch shaped cavity opening up;
Fluorescent material is filled in above-mentioned arch shaped cavity;
Adopt wafer scale technique plural number to mould litho pattern opening, electroplating technology plated metal in litho pattern opening by splash-proofing sputtering metal Seed Layer, photoetching process successively to the arch shaped cavity surrounding of translucent element and form pedestal and projection, and input/output terminal is set on the surface of pedestal, described pedestal is made up of several sub-base insulated from each other, and described sub-base and projection one_to_one corresponding are also respectively integrative-structure;
Adopt C2W mode (flip-chip is to wafer mode) by LED chip upside-down mounting in the die cavity of pedestal, the positive and negative electrode of LED chip is corresponding with above-mentioned projection to be connected, and the exiting surface of LED chip is towards pedestal;
The back side of LED chip and pedestal another side protective mulch and form the protective layer opening exposing input/output terminal;
In input/output terminal, connector is set;
By tearing bonding technology open, removing ephemeral key rubber alloy and carrier disk, and the LED encapsulation structure that above-mentioned employing wafer-level packaging technique completes is cut along line of cut, forming independently monomer.
The present invention also comprised step in employing C2W mode before LED chip upside-down mounting is in the die cavity of pedestal: in described die cavity, fill filler, the height of described filler is no more than the height of above-mentioned projection.
Compare and existing scheme, the invention has the beneficial effects as follows:
1, the present invention adopts positive and negative electrode to be placed in the LED chip of exiting surface, and by LED chip upside-down mounting to pedestal, makes the light of LED chip from outgoing in the die cavity of base central hollow, and make LED encapsulation structure succinct, reliability is high; In arch shaped cavity, can fluorescent material be set, to obtain the LED encapsulation structure of such as white light;
2, the present invention adopts the wafer-level packaging technique of processing technology maturation, by the ingehious design of structure, simplify and be thinned LED encapsulation structure, the thickness of whole LED encapsulation structure is less than 1 micron, save the consumption of glass, fluorescent coating, coating and insulating barrier etc., reduce production cost; Meanwhile, LED encapsulation structure can directly SMT be on pcb board, and late stage process cost also can reduce further.
Accompanying drawing explanation
Fig. 1 is the generalized section of conventional LED package structure;
Fig. 2 is the flow chart of the method for packing of a kind of LED encapsulation structure of the present invention;
Fig. 3 is the schematic diagram of a kind of LED encapsulation structure of the present invention;
Fig. 4 A to Fig. 4 D is the A-A generalized section of the embodiment one of Fig. 3;
Fig. 5 is the A-A generalized section of the embodiment two of Fig. 3;
Fig. 6 is the distortion of Fig. 5;
Fig. 7 to Figure 14 is the schematic flow sheet of the method for packing of a kind of LED encapsulation structure of Fig. 6;
In figure:
LED chip 1
Exiting surface 11
Electrode I 131
Electrode II 132
Electrode III 133
Pedestal 2
Die cavity 20
Stitch I 201
Stitch II 202
Stitch III 203
Sub-base I 21
Sub-base II 22
Sub-base III 23
Projection I 211
Projection II 221
Projection III 231
Filler 24
Input/output terminal 25
Fluorescent material 3
Protective layer 4
Protective layer opening 41
Connector 5
Translucent element 6
Incidence surface 63
Exiting surface 65
Arch shaped cavity 631
Line of cut 7
Carrier disk 9
Bonding glue 91.
Embodiment
See Fig. 2, the technological process of the method for packing of a kind of LED encapsulation structure of the present invention is as follows:
S1: the translucent element getting heat ductile forming, and surface treatment is carried out to translucent element;
S2: adopt wafer scale technique to form pedestal with die cavity and projection in the arch shaped cavity surrounding of the incidence surface of translucent element, and input/output terminal is set on the surface of pedestal;
S3: adopt C2W mode by LED chip upside-down mounting in the die cavity of pedestal, the exiting surface of LED chip is towards pedestal;
S4: at the another side protective mulch of the back side of LED chip and pedestal, connector is set in input/output terminal;
S5: the LED encapsulation structure completed above by wafer-level packaging technique cut along line of cut, forms independently monomer.
Describe the present invention more fully hereinafter with reference to accompanying drawing now, exemplary embodiment of the present invention shown in the drawings, thus scope of the present invention is conveyed to those skilled in the art by the disclosure fully.But the present invention can realize in many different forms, and should not be interpreted as being limited to the embodiment set forth here.
Embodiment one, see Fig. 3 and Fig. 4 A, Fig. 4 B, Fig. 4 C, Fig. 4 D
A kind of LED encapsulation structure of the present invention, the exiting surface 11 of its LED chip 1 arranges the circuit pattern of positive and negative electrode and coupling thereof, and wherein positive and negative electrode closes on edge at exiting surface 11.As shown in Figure 3, positive electricity is electrode I 131 very, is positioned at LED chip 1 left side central portion; Negative electricity is electrode II 132, electrode III 133 very, and electrode II 132 is positioned at the upper right corner of LED chip 1, and electrode III 133 is positioned at the lower right corner of LED chip 1.
Pedestal 2 preferably adopts the metallic copper of good conductivity, rapid heat dissipation to make, but is not limited to copper, as shown in Figure 4 A, and the thickness h 1 of pedestal 2, thickness h 1 scope: 50 ~ 80 microns.The central authorities of pedestal 2 offer the die cavity 20 of a hollow, the shape of cross section of die cavity 20 includes but not limited to the polygons such as circle, quadrangle, hexagon, usual die cavity 20 shape of cross section is consistent with LED chip 1, but the size of this die cavity 20 is more bigger than the size of LED chip 1.Projection I 211, projection II 221, projection III 231 that the inner side thickness setting of die cavity 20 is thinner than pedestal 2, the height of projection I 211, projection II 221, projection III 231 is consistent, its height h2's is preferred at 20 microns, and particularly, the scope of height h2 is 15 ~ 25 microns.Projection I 211 is arranged at the left side central portion of die cavity 20, and projection II 221 is arranged at the upper right corner of die cavity 20, and projection III 231 is arranged at the lower right corner of die cavity 20.Pedestal 2 is made up of sub-base I 21 insulated from each other, sub-base II 22, sub-base III 23, to mate with the positive and negative electrode number of LED chip 1.Gap between sub-base I 21 and sub-base II 22 is seam I 201, and the gap between sub-base II 22 and sub-base III 23 is seam II 202, and the gap between sub-base I 21 and sub-base III 23 is seam III 203.Wherein sub-base I 21 is positioned at left side, in [shape, itself and projection I 211 are structure as a whole; Sub-base II 22 is positioned at upper right side, and in ﹁ shape, itself and projection II 221 are structure as a whole; Sub-base III 23 is positioned at lower right side, and in ﹂ shape, itself and projection III 231 are structure as a whole.The upper surface of projection I 211, projection II 221, projection III 231 and the upper surface flush of pedestal 2.
LED chip 1 is connected with pedestal 2, and the exiting surface 11 of LED chip 1 is towards pedestal 2.Wherein, the electrode I 131 of LED chip 1 is corresponding with projection I 211 to be connected, and the electrode II 132 of LED chip 1 is corresponding with projection II 221 to be connected, and the electrode III 133 of LED chip 1 is corresponding with projection III 231 to be connected.Alternatively, electrode I 131, electrode II 132, electrode III 133 and projection I 211, projection II 221, projection III 231 can be distinguished only part and be connected, and only need meet the reliable connected of telecommunications.Because the die cavity 20 of the central authorities of pedestal 2 is the open area of hollow, the light that the exiting surface 11 of LED chip 1 sends can by this die cavity 20 from pedestal 2 outgoing, and pedestal 2 can stop or turn back sidelight, to improve radiation direction, improves light emission rate.
The upper surface of pedestal 2 arranges translucent element 6; thickness h 4 scope of translucent element 6 above pedestal 2 is 300 ~ 400 microns; but its material simple glass, optical glass, polymethyl methacrylate etc., both can make light appear this LED encapsulation structure, LED chip 1 can be protected again to avoid falling ash, scuffing etc.The incidence surface 63 of translucent element 6 arranges arch shaped cavity 631 above die cavity 20, and arch shaped cavity 631 covers the exiting surface 11 of LED chip 1 completely, and its radian R1 is (1/12) π ~ (1/6) π rad, is beneficial to light and enters translucent element 6.Can fill the excellent filler of light transmission 24 in arch shaped cavity 631 above LED chip 1, die cavity 20, as shown in Figure 4 B, this filler 24 includes but not limited to silica gel, epoxy resin etc.Stitch I 201, seam II 202, seam III 203 also can fill by filler 24.The filling of filler 24 can strengthen the reliability of whole LED encapsulation structure.And design the exiting surface 65 of translucent element 6 as required, to adjust the parameters such as angular, mist degree, light emission rate, if the exiting surface 65 of translucent element 6 is in lens-shaped, as shown in Figure 4 C, its radian R2 is (1/12) π ~ (1/6) π rad, is beneficial to beam projecting; Or be less than the bloomings 67 such as the anti-reflection film of 1 micron, as shown in Figure 4 D, to improve light emission rate in exiting surface 65 thickness setting of translucent element 6.
The lower surface of pedestal 2 arranges input/output terminal 25, and as shown in Figure 3, number and the position of input/output terminal 25 are arranged according to actual needs.Protective layer 4 covers the back side of LED chip 1 and the lower surface of pedestal 2, and seam I 201, seam II 202, seam III 203 are also filled by protective layer 4, and form the protective layer opening 41 exposing input/output terminal 25, as shown in Figure 4 A.Connector 5 can be set in input/output terminal 25, connector 5 includes but not limited to soldered ball/welding block, metal microtrabeculae etc. that top is provided with soldered ball, to facilitate it to be connected with the substrate with electrical circuit, as pcb board.
Embodiment two, see Fig. 5 and Fig. 6
This embodiment is substantially identical with the encapsulating structure of embodiment one, and difference is as follows:
According to the difference of the compound semiconductor materials for the formation of LED chip 1, this LED chip 1 can launch blue light, green light or red light.And LED chip 1 also can be launched does not have coloured ultraviolet (UV) light.In daily life, people use white light.In order to obtain white light, the LED chip 1 of coloured light of can selecting to turn blue, and fluorescent material 3 is set above the exiting surface 11 of LED chip 1, as shown in Figure 5, fluorescent material 3 is filled in the arch shaped cavity 631 of translucent element 6.
Fluorescent material 3 is as yellow fluorescent powder, gold-tinted is sent by blue-light excited yellow fluorescent powder, and then with LED chip 1 the some blue light sent out mix and obtain white light, or use yellow fluorescent powder to obtain warm white with mixing of a small amount of red fluorescence powder, the encapsulating structure of white light or warm white LED.
The excellent filler of light transmission 24 also can be filled in space between fluorescent material 3 and LED chip 1, and as shown in Figure 6, this filler 24 includes but not limited to silica gel, epoxy resin etc.Stitch I 201, seam II 202, seam III 203 also can fill by filler 24.The filling of filler 24 can firm fluorescent material 3 further, enhances the reliability of whole LED encapsulation structure, also reduces the technique of coating fluorescent material 3 simultaneously.
The wafer-level packaging method of a kind of LED encapsulation structure of embodiment described in Fig. 6 of the present invention, see Fig. 7 to Figure 14, comprises step:
See Fig. 7, get the translucent element 6 be shaped by thermoplastic processes, its incidence surface 63 is provided with arch shaped cavity 631, its exiting surface 65 is provided with optical texture, again surface treatment is carried out to translucent element 6, surface treatment comprises chemical cleaning, polishing or reduction processing, with the pollution that the particle and the course of processing of removing translucent element 6 surface cause, improve translucent element 6 and the adhesion of material (as metal, fluorescent material 3) forming in its surface, obtain the translucent element 6 meeting thickness requirement simultaneously; The exiting surface 65 that surface treatment is also included in translucent element 6 arranges blooming 67.Translucent element 6 is fixed on carrier disk 9 by ephemeral key rubber alloy 91, arch shaped cavity 631 opening up.
See Fig. 8, fill fluorescent material 3, and struck off in arch shaped cavity 631 opening part by fluorescent material 3 with scraper plate in above-mentioned arch shaped cavity 631, after solidification, the surface of fluorescent material 3 sinks slightly.
See Fig. 9 A to Fig. 9 D, splash-proofing sputtering metal Seed Layer is passed through successively in arch shaped cavity 631 surrounding of translucent element 6, photoetching process moulds litho pattern opening, electroplating technology plated metal (as metallic copper) in litho pattern opening forms sub-base I 21 ', sub-base II 22 ', sub-base III 23 ' and projection I 211, projection II 221, projection III 231, sub-base I 21 is made again ' by rubbing down, sub-base II 22 ', sub-base III 23 ' height and projection I 211, projection II 221, the height of projection III 231 is consistent, as Fig. 9 A, shown in 9B, wherein Fig. 9 A is the B-B cutaway view of Fig. 9 B, again in sub-base I 21 ', sub-base II 22 ', sub-base III 23 ' surface mould litho pattern opening by photoetching process successively, electroplating technology plated metal (as metallic copper) in litho pattern opening forms sub-base I 21 ", sub-base II 22 ", sub-base III 23 ", as Fig. 9 C, shown in 9D, wherein Fig. 9 C is the B-B cutaway view of Fig. 9 D, sub-base I 21 ' and sub-base I 21 " form sub-base I 21, sub-base II 22 ' and sub-base II 22 " form sub-base II 22, sub-base III 23 ' and sub-base III 23 " form sub-base III 23, the height of pedestal 2 and projection can be controlled by the height controlling the litho pattern opening that photoetching process is moulded, in sub-base I 21 ", sub-base II 22 ", sub-base III 23 " surface input/output terminal 25 is set.
See Figure 10, fill filler 24 in die cavity 20, the height of filler 24 is no more than the height of projection, has and be partially filled thing 24 in seam I 201, seam II 202, seam III 203.
See Figure 11, adopt C2W mode (flip-chip is to wafer mode) by LED chip 1 upside-down mounting in the die cavity 20 of pedestal 2, design because bump position is corresponding with the electrode position of LED chip 1 when foundation design, therefore electrode I 131, electrode II 132, electrode III 133 are soldered with projection I 211, projection II 221, projection III 231 respectively, and the exiting surface 11 of LED chip 1 is towards pedestal 2.
See Figure 12, the back side of LED chip 1 and pedestal 2 another side protective mulch 4 and form the protective layer opening 41 exposing input/output terminal 25.
See Figure 13, connector 5 can be set in input/output terminal 25, connector 5 includes but not limited to soldered ball/welding block, metal microtrabeculae etc. that top is provided with soldered ball.
See Figure 14, by tearing bonding technology open, removing ephemeral key rubber alloy 91 and carrier disk 9, and the LED encapsulation structure that above-mentioned employing wafer-level packaging technique completes is cut along line of cut 7, forming independently monomer.
A kind of LED encapsulation structure of the present invention and wafer-level packaging method thereof are not limited to above preferred embodiment, the number of sub-base insulated from each other and shape can increase or change according to actual needs, the number of usual sub-base is consistent with the positive and negative electrode number of LED chip 1, similarly, the number of projection and shape also can increase or change according to actual needs.Therefore, any those skilled in the art without departing from the spirit and scope of the present invention, any amendment done above embodiment according to technical spirit of the present invention, equivalent variations and modification, all fall in protection range that the claims in the present invention define.
Claims (10)
1. a LED encapsulation structure, it comprises LED chip (1),
It is characterized in that: the exiting surface (11) of described LED chip (1) arranges positive and negative electrode and circuit pattern thereof, described LED chip (1) upside-down mounting is in pedestal (2), its exiting surface (11) is towards pedestal (2), the central authorities of described pedestal (2) offer the die cavity (20) of a hollow, the projection that the inner side thickness setting of described die cavity (20) is thinner than pedestal (2), the upper surface flush of the upper surface of described projection and pedestal (2), described projection is connected with the positive and negative electrode of LED chip (1) respectively;
Described pedestal (2) is made up of several sub-base insulated from each other, each sub-base and each projection one_to_one corresponding, and be respectively integrative-structure, the upper surface of described pedestal (2) arranges translucent element (6), the incidence surface (63) of described translucent element (6) arranges arch shaped cavity (631) in die cavity (20) top, described arch shaped cavity (631) covers the exiting surface (11) of LED chip (1) completely, the lower surface of described pedestal (2) arranges several input/output terminals (25), at the another side protective mulch (4) of the back side of LED chip (1) and pedestal (2), and form the protective layer opening (41) exposing input/output terminal (25), in described input/output terminal (25), connector (5) is set.
2. a kind of LED encapsulation structure according to claim 1, is characterized in that: what the positive and negative electrode of described LED chip (1) was arranged at exiting surface (11) closes on edge.
3. a kind of LED encapsulation structure according to claim 1, is characterized in that: the shared area size of described die cavity (20) is not less than the shared area size of LED chip (1).
4. a kind of LED encapsulation structure according to claim 1, is characterized in that: the radian R1 of the incidence surface (63) of described arch shaped cavity (631) is (1/12) π ~ (1/6) π rad.
5. a kind of LED encapsulation structure according to claim 1, is characterized in that: the height h2 of each described projection is consistent, and the scope of its height h2 is 15 ~ 25 microns.
6. a kind of LED encapsulation structure according to claim 1, is characterized in that: the exiting surface (65) of described translucent element (6) arranges blooming or optical texture.
7. a kind of LED encapsulation structure according to claim 1, is characterized in that: described connector (5) is provided with the metal microtrabeculae of soldered ball for soldered ball/welding block or top.
8. a kind of LED encapsulation structure according to any one of claim 1 to 7, is characterized in that: in the arch shaped cavity (631) and/or die cavity (20) of the top of described LED chip (1), arrange filler.
9. a wafer-level packaging method for LED encapsulation structure, comprises step:
Get the translucent element (6) be shaped by thermoplastic processes, its incidence surface (63) is provided with arch shaped cavity (631), its exiting surface (65) is provided with optical texture, again surface treatment is carried out to translucent element (6), described surface treatment comprises chemical cleaning, polishing or reduction processing and arranges blooming, translucent element (6) is fixed on carrier disk (9) by ephemeral key rubber alloy (91), arch shaped cavity (631) opening up;
Fluorescent material (3) is filled in above-mentioned arch shaped cavity (631);
Adopt wafer scale technique plural number to mould litho pattern opening, electroplating technology plated metal in litho pattern opening by splash-proofing sputtering metal Seed Layer, photoetching process successively to arch shaped cavity (631) surrounding of translucent element (6) and form pedestal (2) and projection, and input/output terminal (25) is set on the surface of pedestal (2), described pedestal (2) is made up of several sub-base insulated from each other, and described sub-base and projection one_to_one corresponding are also respectively integrative-structure;
Adopt C2W mode (flip-chip is to wafer mode) by LED chip (1) upside-down mounting in the die cavity (20) of pedestal (2), the positive and negative electrode of LED chip (1) is corresponding with above-mentioned projection to be connected, and the exiting surface (11) of LED chip (1) is towards pedestal (2);
The back side of LED chip (1) and pedestal (2) another side protective mulch (4) and form the protective layer opening (41) exposing input/output terminal (25);
In input/output terminal (25), connector (5) is set;
By tearing bonding technology open, removing ephemeral key rubber alloy (91) and carrier disk (9), and the LED encapsulation structure that above-mentioned employing wafer-level packaging technique completes is cut along line of cut, forming independently monomer.
10. the wafer-level packaging method of a kind of LED encapsulation structure according to claim 9, it is characterized in that: before LED chip (1) upside-down mounting is in the die cavity (20) of pedestal (2), also comprise step in employing C2W mode: in described die cavity (20), fill filler, the height of described filler is no more than the height of above-mentioned projection.
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101325188A (en) * | 2007-03-30 | 2008-12-17 | 育霈科技股份有限公司 | Wafer level semiconductor package with dual side build-up layers and method thereof |
CN102569599A (en) * | 2011-11-08 | 2012-07-11 | 无锡瑞威光电科技有限公司 | Wafer-level LED (light emitting diode) lens packaging structure and method |
US8237257B2 (en) * | 2008-09-25 | 2012-08-07 | King Dragon International Inc. | Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same |
CN103022307A (en) * | 2012-12-27 | 2013-04-03 | 江阴长电先进封装有限公司 | Wafer-level LED packaging method |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101325188A (en) * | 2007-03-30 | 2008-12-17 | 育霈科技股份有限公司 | Wafer level semiconductor package with dual side build-up layers and method thereof |
US8237257B2 (en) * | 2008-09-25 | 2012-08-07 | King Dragon International Inc. | Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same |
CN102569599A (en) * | 2011-11-08 | 2012-07-11 | 无锡瑞威光电科技有限公司 | Wafer-level LED (light emitting diode) lens packaging structure and method |
CN103022307A (en) * | 2012-12-27 | 2013-04-03 | 江阴长电先进封装有限公司 | Wafer-level LED packaging method |
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