CN104599569A - Demonstrating experiment device for NAND gate circuit - Google Patents
Demonstrating experiment device for NAND gate circuit Download PDFInfo
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- CN104599569A CN104599569A CN201410826423.9A CN201410826423A CN104599569A CN 104599569 A CN104599569 A CN 104599569A CN 201410826423 A CN201410826423 A CN 201410826423A CN 104599569 A CN104599569 A CN 104599569A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09B—EDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
- G09B23/00—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes
- G09B23/06—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics
- G09B23/18—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism
- G09B23/183—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for circuits
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Abstract
The invention relates to the field of design of demonstrating experiment devices, and in particular relates to a demonstrating experiment device for an NAND gate circuit. The device only comprises a base, a display board, a gate circuit replacing board and a plurality of conductors; the structure is simple, and the device structure is simplified; the display board is vertically fixed on the base to conveniently demonstrate the experiment; a power input end and a power output end are arranged on the display board; the gate circuit replacing board is equipped with a circuit input end and a circuit output end which are correspondingly communicated with the power input end and the power output end of the display board, so as to connect the whole circuit; when in actual use, the gate circuit replacing board can be simply replaced for demonstrating different circuit combinations, and therefore, the composition of the NAND gate circuit and the demonstrating can be simplified, the demonstrating time of the teaching experiment can be decreased, and the demonstrating efficiency of the teaching experiment can be increased; in addition, the composition process of the NAND gate circuit, the circuit effect and the principle of the NAND gate circuit can be clearly demonstrated, so that the teaching effect is improved.
Description
Technical field
The present invention relates to Demonstrator Trials apparatus design field, particularly a kind of NAND gate circuit demonstrating experiment device.
Background technology
With door (AND gate), also known as with circuit.It is the basic logic gate circuit performing AND operation.Have multiple input end, an output terminal, multi input and door can input by multiple two and form with door.When all inputs are high level (logical one) simultaneously, exporting is just high level, otherwise exports as low level (logical zero).
Or door (OR gate), also known as or circuit.It is the basic logic gate circuit performing inclusive-OR operation.Or door has multiple input end, an output terminal, multi input or door can input by multiple two or door is formed.If in several condition, as long as there is a condition to be met, certain event will occur, and this relation is called "or" logical relation.As long as have one in input for (logical one) during high level, just exporting is high level (logical one); Only have when all inputs are entirely for low level (logical zero), exporting is just low level (logical zero).
Sheffer stroke gate (NAND gate), Sheffer stroke gate can be regarded as and the superposing of door and not gate, and is a kind of elementary logic circuit of digital circuit.If when input is high level (logical one), then export as low level (logical zero); If have one in input at least for low level (logical zero), then export as high level (logical one).
NAND gate circuit is by the circuit formed with logic gates such as door or door, not gate, Sheffer stroke gates.
NAND gate circuit is electrical science and technology teaching and application important content, it is the basic circuit of electronic circuit specialty, the subject related to also comprises microelectric technique, Electronics Science and Technology, computer technology, the communication technology, photoelectron technology, automatic technology etc., has great importance at teaching field.
Modern education, after reform, is advocated gradually and is started and the quality-oriented education combined that beats one's brains, auxiliary start to impart knowledge to students all kinds of teaching and experiment appliance arise at the historic moment, simplify the difficulty of teaching, further increase the application power of student.
At the related discipline of Electronics Science and Technology, when imparting knowledge to students, make use of relevant teaching test demonstration device equally, existing NAND gate circuit lecture experiment case, including casing, wiring board and the relevant components and parts to door, not gate or door, Sheffer stroke gate.Built-in circuit board is in casing, be provided with the jack of electrical communication in the circuit board, the mode utilizing wire jumper to connect plugs in jack, and each components and parts are electrically connected, the components and parts energising be interconnected finally is made to form logical circuit, for demonstrating the actual effect of NAND gate circuit.
But there is following defect in existing NAND gate circuit lecture experiment case:
At application, existing NAND gate circuit lecture experiment case includes multiple parts, comparatively complicated in structure, when experimental demonstration, need tie jumper and components and parts one by one, the time of at substantial, the efficiency of experimental demonstration is low, learner clearly can not understand the principle of NAND gate circuit and the thinking of electric circuit teaching, practical teaching weak effect.Simultaneously the structure of existing experimental box complexity and diversified components and parts make the overall weight of experimental box increase the weight of, not portable, use not convenient.
In production aspect, existing NAND gate circuit lecture experiment case comprises multiple parts, and need to produce different components and parts and the building block of experimental box respectively when producing, production cost is higher, indirectly cause price during launch higher, be not easy to the popularization in market.
Summary of the invention
Embodiment of the present invention goal of the invention is to provide a kind of NAND gate circuit demonstrating experiment device, apply the apparatus structure that this technical scheme can simplify NAND gate circuit demonstration, simplify composition and the demonstration step of NAND gate circuit, shorten the time of teaching and experimental demonstration, improve the efficiency of teaching and experimental demonstration, and clearly demonstrate the anabolic process of NAND gate circuit, circuit effect, and the principle of NAND gate circuit, practical teaching excellent.The structure simultaneously simplified makes the weight saving of this province of device, more portable, and it is more convenient to use.When producing, simplification structure be more conducive to a large amount of production, production efficiency is higher, and production cost is lower, indirect launch price is reduced, is more conducive to raising market share.
In order to realize foregoing invention object, complete skill scheme of the present invention is:
A kind of NAND gate circuit demonstrating experiment device, comprises base, Graphic Panel, gate circuit replacement plate; Described Graphic Panel is vertically to the end face being installed on described base; Described Graphic Panel is provided with power input and power output end; Described gate circuit is replaced plate and is had circuit input end and circuit output end; This circuit input end connects the power input of described Graphic Panel by wire; Described circuit output end connects the power output end of described Graphic Panel by wire.
It is preferably, described that gate circuit replacement plate comprises AND circuit replacement plate, OR circuit replaces plate, NAND gate circuit replaces plate.
Preferably, described AND circuit is replaced plate and is comprised first substrate, AND circuit, and described AND circuit is arranged on the plate face of described first substrate.
Preferably, described OR circuit is replaced plate and is comprised second substrate, OR circuit, and described OR circuit is arranged on the plate face of described second substrate.
Preferably, described NAND gate circuit is replaced plate and is comprised Sheffer stroke gate replacement AND circuit replacement plate, Sheffer stroke gate replacement OR circuit replacement plate.
Preferably, described Sheffer stroke gate is replaced AND circuit replacement plate and is comprised the 3rd substrate, the first NAND gate circuit, the second NAND gate circuit; The output terminal of described first NAND gate circuit connects the input end of described second NAND gate circuit.
Preferably, described Sheffer stroke gate is replaced OR circuit replacement plate and is comprised tetrabasal, the 3rd NAND gate circuit, the 4th NAND gate circuit, the 5th NAND gate circuit; Described 3rd NAND gate circuit and the output terminal of the 4th NAND gate circuit are connected the input end of described 5th NAND gate circuit respectively.
Preferably, the circuit input end and circuit output end of described gate circuit replacement plate are respectively arranged with conduction VELCRO; The power input and power output end of described Graphic Panel are respectively arranged with conduction VELCRO; Conduction VELCRO is respectively arranged with at the two ends of described wire.
Preferably, described conduction VELCRO comprises the male subsides of the conduction magic that can mutually fasten and conduction magic mother subsides; Described conduction magic public affairs are pasted and are comprised the first base band, and the first base band is provided with hook and the first conductive pole; Described conduction magic mother pastes and comprises the second base band, and the second base band is provided with pile loop and the second conductive pole; Described hook is used for mutually fastening with described pile loop, and described first conductive pole and described second conductive pole contact with each other electrical communication.
Preferably, the power output end of described Graphic Panel is provided with pilot lamp.
Therefore application the present embodiment technical scheme, only comprise base, Graphic Panel, gate circuit replacement plate and some wires from parts, structure is extremely simple.The apparatus structure of NAND gate circuit demonstration can be simplified, simplify composition and the demonstration step of NAND gate circuit, shorten the time of teaching and experimental demonstration, improve the efficiency of teaching and experimental demonstration.Graphic Panel vertical direction is fixed on base to be convenient to do the demonstration of testing, and Graphic Panel is provided with power input and power output end, same, and gate circuit is replaced plate and had circuit input end and circuit output end; Gate circuit is replaced the circuit input end of plate and corresponding being communicated with power output end with the power input of Graphic Panel of circuit output end difference, integrated circuit is communicated with, only need to change gate circuit replacement plate in actual use and can demonstrate different electrical combination, simplify composition and the demonstration step of NAND gate circuit, shorten the time of teaching and experimental demonstration, improve the efficiency of teaching and experimental demonstration, and clearly demonstrate the anabolic process of NAND gate circuit, circuit effect, and the principle of NAND gate circuit, practical teaching effect is better.
The embodiment of the invention also discloses the kind that plate replaced by gate circuit, as AND circuit replaces plate, OR circuit replacement plate, Sheffer stroke gate replacement plate.In actual presentation process, only need to replace between plate at different gate circuits to change, be combined into different circuit, demonstrate different experiment purposes, efficiency is high, simple, intuitive, and experiment teaching effect is better.
The embodiment of the invention also discloses the connected mode between gate circuit replacement plate, Graphic Panel, when utilizing wire to connect, at the two ends of wire, circuit input end and the circuit output end of the power input of Graphic Panel and power output end gate circuit replacement plate are respectively arranged with conduction VELCRO, when connecting circuit.Utilize the connection convenience of conduction VELCRO, improve the efficiency of demonstration, to conduct electricity serviceable life of VELCRO longer simultaneously, is beneficial to the durability of the embodiment of the present invention.
Further, the embodiment of the present invention is on the basis of technique scheme, also disclose the concrete structure of conduction VELCRO, make use of the male female pattern mutually fastened of pasting with conduction magic of pasting of conduction magic to form, the first conductive pole that the male subsides of conduction magic have pastes with conduction magic mother the second conductive pole had and is mutually electrically connected, and forms path.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
The structural representation that Fig. 1 provides for the embodiment of the present invention 1;
The structural representation of the AND circuit replacement plate that Fig. 2 provides for the embodiment of the present invention 1;
The structural representation of the OR circuit replacement plate that Fig. 3 provides for the embodiment of the present invention 1;
The structural representation of the Sheffer stroke gate replacement AND circuit replacement plate that Fig. 4 provides for the embodiment of the present invention 1;
The structural representation of the Sheffer stroke gate replacement OR circuit replacement plate that Fig. 5 provides for the embodiment of the present invention 1;
The structural representation that Fig. 6 provides for the embodiment of the present invention 2;
The another kind of structural representation that Fig. 7 provides for the embodiment of the present invention 2.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Embodiment 1:
As shown in Figure 1, the present embodiment provides a kind of NAND gate circuit demonstrating experiment device, comprises base 100, Graphic Panel 110, gate circuit replacement plate 120; Graphic Panel 110 is vertically to the end face being installed on base 100; Graphic Panel 110 is provided with power input (A and B) and power output end 101; Gate circuit is replaced plate 120 and is had circuit input end and circuit output end; This circuit input end connects the power input (A and B) of Graphic Panel 110 by wire; Circuit output end connects the power output end 101 of Graphic Panel 110 by wire.
Of course, but be not limited to, gate circuit is replaced plate 120 and is comprised AND circuit replacement plate, OR circuit replacement plate, NAND gate circuit replacement plate.
As shown in Figure 2, the structure that a kind of AND circuit replaces plate is disclosed.Wherein, AND circuit is replaced plate and is comprised first substrate 125, AND circuit 124, and this AND circuit 124 is arranged on the plate face of first substrate 125.More particularly, the circuit input end (121,122) and circuit output end 123 of AND circuit replacement plate are provided with conduction VELCRO.
As shown in Figure 3, disclose the structure that a kind of OR circuit replaces plate, wherein, OR circuit is replaced plate and is comprised second substrate 220, OR circuit 224, and this OR circuit 224 is arranged on the plate face of second substrate 220.More particularly, the circuit input end (221,222) and circuit output end 223 of OR circuit replacement plate are provided with conduction VELCRO.
Of course, but be not limited to, above-mentioned NAND gate circuit replaces plate can comprise Sheffer stroke gate replacement AND circuit replacement plate, Sheffer stroke gate replacement OR circuit replacement plate.
As shown in Figure 4, disclose a kind of Sheffer stroke gate and replace AND circuit replacement plate, wherein Sheffer stroke gate replacement AND circuit replacement plate comprises the 3rd substrate 320, first NAND gate circuit 324, second NAND gate circuit 325; The output terminal of the first NAND gate circuit 324 connects the input end of the second NAND gate circuit 325.More particularly, the circuit input end (321,322) and circuit output end 323 of Sheffer stroke gate replacement AND circuit replacement plate are provided with conduction VELCRO.
As shown in Figure 5, disclose a kind of Sheffer stroke gate and replace OR circuit replacement plate, wherein Sheffer stroke gate replacement OR circuit replacement plate comprises tetrabasal 420, the 3rd NAND gate circuit 424, the 4th NAND gate circuit 425, the 5th NAND gate circuit 426; 3rd NAND gate circuit 424 is connected the input end of the 5th NAND gate circuit 426 respectively with the output terminal of the 4th NAND gate circuit 425.More particularly, the circuit input end (421,422) and circuit output end 423 of Sheffer stroke gate replacement OR circuit replacement plate are provided with conduction VELCRO.
In order to utilize the convenient connection performance of conduction VELCRO, the power input (A and B) and power output end 101 of Graphic Panel 110 arrange conduction VELCRO respectively; And conduction VELCRO is set respectively at the two ends of the wire of all connections.
The present embodiment openly can also conduct electricity the related art scheme of VELCRO, pastes comprising the male subsides of the conduction magic that can mutually fasten and conduction magic mother; Conduction magic public affairs are pasted and are comprised the first base band, the first base band are provided with hook and the first conductive pole; Conduction magic mother pastes and comprises the second base band, and the second base band is provided with pile loop and the second conductive pole; Hook and be used for mutually fastening with pile loop, the first conductive pole and the second conductive pole contact with each other electrical communication.
Effect simultaneously in order to make embodiment of the present invention illustrative circuitry clearly be communicated with, can arrange pilot lamp on the power output end 101 of Graphic Panel 110.
Embodiment 2:
The embodiment of the present invention 2 discloses the actual application of technical solution of the present invention, demonstrates three people's voting machine anabolic processes.
As shown in Figure 6, the embodiment of the invention discloses a kind of NAND gate circuit demonstrating experiment device, include base 500, Graphic Panel 510 and be arranged on AND circuit replacement plate (521,522,523), OR circuit replacement plate (524,525) on Graphic Panel 510 plate face; Graphic Panel 510 is provided with power input (C, D, E) and power output end 501; Wherein the circuit input end of AND circuit replacement plate 521 connects power input (C and D) respectively, and circuit output end connects the circuit input end that OR circuit replaces plate 524; The circuit input end that AND circuit replaces plate 522 connects power input (C and E) respectively, and circuit output end connects the circuit input end that OR circuit replaces plate 524; The circuit input end that AND circuit replaces plate 523 connects power input (D and E) respectively, and circuit output end connects the circuit input end that OR circuit replaces plate 525; The circuit output end that OR circuit replaces plate 524 connects the circuit input end that OR circuit replaces plate 525, and OR circuit replaces the power output end 501 of the circuit output end connection Graphic Panel 510 of plate 525.
As shown in Figure 7, the present embodiment directly can be changed each gate circuit and replace plate when reality uses, on the base 500 comprised equally, Graphic Panel 510, each replacement plate is replaced with new replacement plate, the principle of demonstration NAND gate circuit and process, as shown in the figure, include AND circuit and replace plate (621,622,623), OR circuit replacement plate (624,625), each annexation of replacing between plate is same as above.
This example demonstrates the efficient of teaching and experimental demonstration when technical solution of the present invention is applied, be easily understood, improve the effect of education experiment.
Above-described embodiment, does not form the restriction to this technical scheme protection domain.The amendment done within any spirit at above-mentioned embodiment and principle, equivalently to replace and improvement etc., within the protection domain that all should be included in this technical scheme.
Claims (10)
1. a NAND gate circuit demonstrating experiment device, is characterized in that:
Comprise base, Graphic Panel, gate circuit replacement plate;
Described Graphic Panel is vertically to the end face being installed on described base; Described Graphic Panel is provided with power input and power output end;
Described gate circuit is replaced plate and is had circuit input end and circuit output end; This circuit input end connects the power input of described Graphic Panel by wire; Described circuit output end connects the power output end of described Graphic Panel by wire.
2. a kind of NAND gate circuit demonstrating experiment device according to claim 1, is characterized in that:
Described gate circuit is replaced plate and is comprised AND circuit replacement plate, OR circuit replacement plate, NAND gate circuit replacement plate.
3. a kind of NAND gate circuit demonstrating experiment device according to claim 2, is characterized in that:
Described AND circuit is replaced plate and is comprised first substrate, AND circuit, and described AND circuit is arranged on the plate face of described first substrate.
4. a kind of NAND gate circuit demonstrating experiment device according to claim 2, is characterized in that:
Described OR circuit is replaced plate and is comprised second substrate, OR circuit, and described OR circuit is arranged on the plate face of described second substrate.
5. a kind of NAND gate circuit demonstrating experiment device according to claim 2, is characterized in that:
Described NAND gate circuit is replaced plate and is comprised Sheffer stroke gate replacement AND circuit replacement plate, Sheffer stroke gate replacement OR circuit replacement plate.
6. a kind of NAND gate circuit demonstrating experiment device according to claim 5, is characterized in that:
Described Sheffer stroke gate is replaced AND circuit replacement plate and is comprised the 3rd substrate, the first NAND gate circuit, the second NAND gate circuit;
The output terminal of described first NAND gate circuit connects the input end of described second NAND gate circuit.
7. a kind of NAND gate circuit demonstrating experiment device according to claim 5, is characterized in that:
Described Sheffer stroke gate is replaced OR circuit replacement plate and is comprised tetrabasal, the 3rd NAND gate circuit, the 4th NAND gate circuit, the 5th NAND gate circuit;
Described 3rd NAND gate circuit and the output terminal of the 4th NAND gate circuit are connected the input end of described 5th NAND gate circuit respectively.
8., according to any one NAND gate circuit demonstrating experiment device described in claim 1 to 7, it is characterized in that:
The circuit input end and circuit output end of described gate circuit replacement plate are respectively arranged with conduction VELCRO; The power input and power output end of described Graphic Panel are respectively arranged with conduction VELCRO; Conduction VELCRO is respectively arranged with at the two ends of described wire.
9. a kind of NAND gate circuit demonstrating experiment device according to claim 8, is characterized in that:
Described conduction VELCRO comprises the male subsides of the conduction magic that can mutually fasten and conduction magic mother pastes;
Described conduction magic public affairs are pasted and are comprised the first base band, and the first base band is provided with hook and the first conductive pole;
Described conduction magic mother pastes and comprises the second base band, and the second base band is provided with pile loop and the second conductive pole;
Described hook is used for mutually fastening with described pile loop, and described first conductive pole and described second conductive pole contact with each other electrical communication.
10. a kind of NAND gate circuit demonstrating experiment device according to claim 1, is characterized in that:
The power output end of described Graphic Panel is provided with pilot lamp.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410826423.9A CN104599569A (en) | 2014-12-25 | 2014-12-25 | Demonstrating experiment device for NAND gate circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410826423.9A CN104599569A (en) | 2014-12-25 | 2014-12-25 | Demonstrating experiment device for NAND gate circuit |
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| Publication Number | Publication Date |
|---|---|
| CN104599569A true CN104599569A (en) | 2015-05-06 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410826423.9A Pending CN104599569A (en) | 2014-12-25 | 2014-12-25 | Demonstrating experiment device for NAND gate circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106847022A (en) * | 2017-03-01 | 2017-06-13 | 东北大学秦皇岛分校 | A kind of gate circuit experimental provision |
| CN106847021A (en) * | 2017-03-01 | 2017-06-13 | 东北大学秦皇岛分校 | A kind of gate circuit chip treatment method suitable for gate circuit experiment |
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Application publication date: 20150506 |
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