CN104598962B - A kind of active passive type dual-band chip and RFID system - Google Patents
A kind of active passive type dual-band chip and RFID system Download PDFInfo
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- CN104598962B CN104598962B CN201510046606.3A CN201510046606A CN104598962B CN 104598962 B CN104598962 B CN 104598962B CN 201510046606 A CN201510046606 A CN 201510046606A CN 104598962 B CN104598962 B CN 104598962B
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Abstract
The invention discloses a kind of active passive type dual-band chip and RFID systems, include the passive wake-up module for receiving 125K low frequency activation signals, and the active module embedded therein for emitting 2.4G radiofrequency signals;Wherein passive wake-up module includes the first radio-frequency antenna, the rectification circuit being sequentially connected electrically, demodulator circuit, logic circuit and power switch;The input terminal of power switch receives the wake-up signal of logic circuit transmission, receive the wake-up feedback signal of active module embedded therein, output end is electrically connected with the wake-up Enable Pin of microprocessor circuit, and the output end of microprocessor circuit is electrically connected with the second radio-frequency antenna for emitting 2.4G radiofrequency signals.Because active module embedded therein is under battery saving mode under normal condition of the present invention, to save electricity;When receiving 125K low frequency activation signals, passive wake-up module can wake up active module embedded therein, and active module embedded therein can emit the radiofrequency signal of 2.4G;Therefore the advantages of present invention has that data storage capacity is big simultaneously, and reading/writing distance is remote and long working life.
Description
Technical field
The present invention relates to dual band radio frequency technical field more particularly to a kind of active passive type dual-band chips and RFID system.
Background technology
Label either active label is also by RFID (Radio Frequency IDentification) currently on the market
It is passive label, is mostly one working frequency.Passive label mainly has 125KHz, 13.56MHz, 915MHz, three frequency ranges
Product, main feature long lifespan, wherein 125KHz, 13.56MHz product memory capacity are small, and reading/writing distance is short, does not adapt to long distance
It is required from read-write;Although 915MHz products are greatly improved on reading/writing distance, memory capacity is also very limited, cannot meet
Massive store demand.Active label mainly has 2.4GHzHz products, memory capacity is big, reading/writing distance is remote but due to such production
Product are presently mainly active transmission data, and power consumption is big, and the service life is subject to certain restrictions, and generally 3~5 years, cannot meet longevity
The requirement of life.Recently also occur some double frequency RFID tags in the market, but all there is also many deficiencies from performance, than
If memory capacity is not big enough, maximum 16KB, service life are long not enough, 6 years maximum, and the present invention is integrated with simultaneously in a chip
125KHz and 2.4GHzHz, 125k signal play activation, and only when being activated, 2.4GHz signals can just work, and drop significantly
Low power consumption, extends service life.
Invention content
The first object of the present invention is to provide a kind of active passive type dual-band chip, the active passive type dual-band chip number
Big according to memory capacity, reading/writing distance is remote, long working life, solves the short difficulty of the active label working life of current single-frequency
Topic and the close disadvantage of passive label reading/writing distance.
In order to solve the above technical problems, the technical scheme is that:A kind of active passive type dual-band chip includes being used for
Receive 125K low frequency activation signals passive wake-up module, the passive wake-up module include the first radio-frequency antenna, described first
Radio-frequency antenna is electrically connected with rectification circuit, and the rectification circuit is defeated with the demodulator circuit for cracking 125K low frequency activation signals
Enter end electrical connection, the input of the output end of the demodulator circuit and the logic circuit for verifying the 125K low frequency activations signal
End electrical connection, the logic circuit select logic circuit low in energy consumption;Further include power switch, the power switch includes first defeated
Enter end and the second input terminal, the first input end is electrically connected with the output end of the logic circuit, the power switch and electricity
Pond is electrically connected;The power switch includes logic sum gate, and two input terminals of the logic sum gate are opened respectively as the power supply
The first input end of pass and the second input terminal, the output end of the logic sum gate are electrically connected with the grid of a MOS switch pipe, institute
The drain electrode for stating MOS switch pipe connects battery, and the battery is electrically connected by resistance with the grid of the MOS switch pipe, and the MOS is opened
Close output end of the source electrode of pipe as the power switch;Active module embedded therein for emitting 2.4GHz radiofrequency signals, it is described active
Module includes microprocessor circuit, and the microprocessor circuit includes waking up Enable Pin, waking up enabled feedback end and output end, institute
Stating wake-up makes feedback end be electrically connected with the second input terminal of the power switch, described to wake up Enable Pin and the power switch
Output end is electrically connected;The output end of the microprocessor circuit and the second radio-frequency antenna electricity for emitting 2.4GHz radiofrequency signals
Connection.
Preferred embodiment is, the passive wake-up module further include the equal amplitude limiter circuit being electrically connected with the rectification circuit and when
Clock restoring circuit, the clock recovery circuitry are also electrically connected with the demodulator circuit, the amplitude limiter circuit and a reference circuit
Electrical connection, the reference circuit is also electrically connected with upper and lower reset circuit and regulator circuit respectively, the regulator circuit also with institute
State logic circuit electrical connection.
Preferred embodiment is that the rectification circuit includes two PMOS tube and two NMOS tubes.
Preferred embodiment is that the voltage stabilized range of the regulator circuit is 1.9~3.6V.
It is outer to be that the microprocessor circuit includes microprocessor, and is electrically connected with the microprocessor for preferred embodiment
Portion's memory and microprocessor peripheral circuit, the microcontroller carry out communication company with the external memory by SPI modes
It connects.
Preferred embodiment is that the microprocessor circuit further includes amplifying circuit, the input terminal of the amplifying circuit with it is described
Microprocessor is electrically connected, the output end of the output end of the amplifying circuit as the microprocessor circuit.
Preferred embodiment is that the microprocessor circuit includes the nRF24LE chips for having 2.4GHz wireless transceivers, described
The port P0.0 of nRF24LE chips enables feedback end as described wake up.
Preferred embodiment is that the external memory selects LF2PAS3933 chips.
The second object of the present invention is to provide a kind of active passive type Double-Frequency System, the active passive type double frequency
RFID system reading/writing distance is remote, and long working life makes it have a wide range of application.
In order to solve the above technical problems, the technical scheme is that:A kind of active passive type Double-Frequency System, including
125K low frequency activations device, above-mentioned active passive type dual-band chip and 2.4GHz gateways.
After adopting the above technical scheme, the beneficial effects of the invention are as follows:Due to the active passive type dual-band chip of the present invention
Include the passive wake-up module for receiving 125K low frequency activation signals, passive wake-up module includes the first radio-frequency antenna, and first
Radio-frequency antenna is electrically connected with rectification circuit, the input terminal of rectification circuit and the demodulator circuit for cracking 125K low frequency activation signals
Electrical connection, the output end of demodulator circuit are electrically connected with the input terminal of the logic circuit for verifying 125K low frequency activation signals, patrol
It collects circuit and selects logic circuit low in energy consumption.Above-mentioned passive wake-up module enables the invention to receive 125K low frequency activation signals, and
125K low frequency activation signals are cracked and verified, and output wake-up signal is judged whether according to the result of verification.
The invention also includes the active module embedded therein for emitting 2.4G radiofrequency signals, active module embedded therein includes microprocessor circuit,
Microprocessor circuit includes waking up Enable Pin, waking up enabled feedback end and output end, wherein waking up makes feedback end and power switch
The second input terminal electrical connection, wake up Enable Pin be electrically connected with the output end of power switch;The output end of microprocessor circuit with
The second radio-frequency antenna for emitting 2.4G radiofrequency signals is electrically connected.Above-mentioned active module embedded therein is in battery saving mode under normal circumstances,
After waking up Enable Pin and receiving wake-up signal, microprocessor circuit revives from battery saving mode and starts work, exports 2.4G
Radiofrequency signal is simultaneously launched by the second radio-frequency antenna.
The present invention is additionally provided with power switch between passive wake-up module and active module embedded therein, which, which receives, comes from nothing
The wake-up signal of source wake-up module wakes up active module embedded therein according to the wake-up signal of reception, while active module embedded therein transmission wakes up feedback
Signal is to power switch, to ensure reliability of the present invention.
It can be seen from the above, the active passive type dual-band chip of the present invention has the work(of 125K chips and 2.4G chips simultaneously
Can, when being applied in double-frequency electronic label, by particular communication agreement, the present invention can read 125K low frequency signals, send
2.4G radiofrequency signal.Therefore the characteristics of present invention incorporates low frequency high-precision and high frequency large coverages, also has data storage
The advantages of capacity is big, and reading/writing distance is remote and long working life, the active label working life for solving current single-frequency is short
Problem and the close disadvantage of passive label reading/writing distance.Using the active passive type RFID system of the dual-band chip of the present invention, because making
With the dual-band chip that this law is bright, make RFID system also and have the advantages that reading/writing distance remote and long working life, and make its application
Range is very wide.It can be applied to high-precision asset management (such as gun off-location system, critical asset handling of goods and materials) and accurate
Garden personnel positioning management (such as kindergarten, campus, home for destitute, Prison staff positioning) is suitable for fixed capital management, logistics, state
Anti- safety, the fields such as personnel positioning management.
Since active module embedded therein further includes amplifying circuit, the input terminal of amplifying circuit is electrically connected with microprocessor, amplifying circuit
Output end of the output end as microprocessor circuit, which puts the 2.4G radiofrequency signals that microprocessor circuit exports
Greatly, 2.4G radiofrequency signals is made to be reinforced conducive to the transmitting of the second radio-frequency antenna.
Description of the drawings
Fig. 1 is the chip pin schematic diagram of the active passive type dual-band chip of the present invention;
Fig. 2 is the memory control module block diagram of the active passive type dual-band chip of the present invention;
Fig. 3 is the functional block diagram of the active passive type dual-band chip of the present invention;
Fig. 4 is the demodulator circuit of the active passive type dual-band chip of the present invention;
Fig. 5 is the microcontroller block diagram of the active passive type dual-band chip of the present invention;
Fig. 6 is the switching circuit figure of the active passive type dual-band chip of the present invention;
In figure:1—CE、2—XI、3—XO、4—RFP、5—RFN、6—GND、7—VCC、8—SCK、9—MOSI、
10—MISO、11—LRF、12—IREE。
Specific implementation mode
In order to make the purpose , technical scheme and advantage of the present invention be clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
As depicted in figs. 1 and 2, a kind of active passive type dual-band chip includes passive wake-up module and active module embedded therein, wherein
Passive wake-up module can receive 125K low frequency activation signals by particular communication agreement, and the low frequency activation signal is by passive wake-up
After first radio-frequency antenna of module receives, the first radio-frequency antenna is by 125K low frequency activation signal transmissions to rectification circuit.Rectification
Circuit will be transferred to demodulator circuit after 125K low frequency activation signal shapings, and demodulator circuit cracks the signal received, works as signal
When reaching threshold requirement, the electric signal that demodulator circuit exports corresponding 125K low frequency activation signals is patrolled to the low-power consumption being connected electrically
Circuit is collected, which judges whether to export wake-up signal (pulse) to electricity after verification, according to check results
Source switch.After power switch receives wake-up signal, wake-up electric signal, micro- place are assigned to the microprocessor circuit of active module embedded therein
Reason device circuit receives wake-up electric signal, and enabled feedback end is waken up after being waken up and transmits feedback electric signal again to the defeated of power switch
Enter end, after power switch receives feedback signal, output end reliably links together active module embedded therein and battery.Active module embedded therein
Microprocessor circuit receive wake-up signal after, work of reviving from battery saving mode, and transmit 2.4G radiofrequency signals give second
Radio-frequency antenna allows the dual-band chip transmitting high frequency radio signals of the present invention to go response.
Include 12 pins after the dual-band chip encapsulation of the present invention, specially pin 1 is CE, pin 2 is XI, pin 3 is
XO, pin 4 are RFP, pin 5 is RFN, pin 6 is GND, pin 7 is VCC, pin 8 is SCK, pin 9 is MOSI, pin 10
For MISO, pin 11 is LRF and pin 12 is IREE.
The rectification circuit of the present embodiment includes two PMOS tube and two NMOS tubes, and two of which NMOS tube is respectively defined as
N1 and n2, two PMOS tube are respectively defined as p1 and p2.The source electrode of n1, p1, n2, p2 interconnection, wherein n1 and n2 is grounded, and two
Grid connects the first radio-frequency antenna, which simultaneously connects a capacitance, forms capacitor and inductor resonant tank.The leakage of n1
Pole connects p1 source electrodes and the grid of p2, and the drain electrode of n2 connects the source electrode of p2 and the grid of p1.The drain electrode of P1 exports Vc with the drain electrode of p2.It should
Vc is entire passive wake-up module power supply, ensure that service life to save electricity.
The demodulator circuit of the present embodiment is as shown in figure 4, input signal exists through P21 low-pass filtering, output in demodulator circuit
Signal in the hysteresis comparator circuit that P22, P23, P24, P25, P26, N21, N22, N23 and N24 are constituted is compared, and realizes packet
Network detection exports.R1 and R2 realizations sample the output of rectification circuit, and demodulation output is demod_out.
The passive wake-up module of the present embodiment further includes the amplitude limiter circuit being electrically connected with rectification circuit and clock recovery electricity
Road, wherein clock recovery circuitry are also electrically connected with demodulator circuit, and amplitude limiter circuit is electrically connected with a reference circuit, and reference circuit is also
It is electrically connected respectively with upper and lower reset circuit and regulator circuit, regulator circuit is also electrically connected with logic circuit, the regulator circuit
Voltage stabilized range is 1.9~3.6V.Because amplitude limiter circuit, clock recovery circuitry and regulator circuit are the prior art, herein no longer in detail
Thin description.
As shown in fig. 6, the power switch of the present embodiment includes logic sum gate, two input terminals of logic sum gate, one with
The output end of logic circuit is electrically connected, another is electrically connected with the ports P0.0 of microprocessor, the output end of logic sum gate and one
The grid of a MOS switch pipe is electrically connected, and the drain electrode of MOS switch pipe connects battery, and battery is by resistance and the grid of MOS switch pipe electricity
Connection, the source electrode of MOS switch pipe are electrically connected with the wake-up Enable Pin WAKE of microprocessor.
As shown in Fig. 2, microprocessor circuit includes microprocessor, and the external memory that is electrically connected with microprocessor and
Microprocessor peripheral circuit, wherein microprocessor peripheral circuit are related according to the microprocessor of selection, after having selected microprocessor
Microprocessor peripheral circuit also discloses, and is not described in detail herein.Its external memory passes through SPI (Serial
Peripheral interface) mode carries out communication with microprocessor and connect.In addition microprocessor circuit further includes amplification electricity
The input terminal on road, the amplifying circuit is electrically connected with microprocessor, and the output end of amplifying circuit is electrically connected with the second radio-frequency antenna.
As shown in Figure 2 and Figure 5, the microcontroller of the present embodiment selects nRF24LE chips, nRF24LE chips to have 2.4G
Wireless transceiver, and the ROM of itself SRAM (Static RAM) and 512 bytes with 4K, have there are one individual SPI,
Containing three Serial Port Lines, related register is configured, while nRF24LE chips can be controlled by program and be set as power saving
Pattern, in battery saving mode, nRF24LE chips are stopped.
Microcontroller is attached with power switch by P0.2 and P0.0 simultaneously, and WAKE wake-up signals are sent by P0.2
To power switching module, P0.0 connection power supplys in enable port are waken up by microcontroller and receive feedback signal WAKE_UP signals, it will
Microcontroller wakes up from battery saving mode, works.Microprocessor connects amplifying circuit by ANT1, ANT2, VDD_PA pin,
Amplifying circuit is electrically connected with the second radio-frequency antenna again.
It is stored in the RAM of ROM and 4Kbyte of the nRF24LE chip interiors of the present embodiment with 512 bytes, ROM
The cured bootstrap of producer, power on it is initial after will be automatically in from loading procedure in external memory to the RAM of 4Kbyte.
RAM is other than for storing the main program that external load is come in and the memory block of inter-process data.After power-off, in RAM
Content will lose, therefore will have been carried out to nRF24LE chips outer to it into the programming of line program in order to avoid using every time
The extension of portion's memory stores data processing main program, i.e. the LF2PAS3933 chips of the present embodiment by external memory.
The ports P1.4 of nRF24LE chips, the ports P1.5, the ports P1.6 as SPI data communication interfaces, with
LF2PAS3933 chips are configured, and the ports P0.0 of nRF24LE chips receive the wake-up signal of power switch, and the ports p0.3 are come
CL-DAT (clock data) output signal for receiving LF2PAS3933 chips, according to the rule of clock signal, with the ports p1.4 come
The data information for receiving the output of the ends LF2PAS3933 chip DAT, is combined into corresponding data frame format, passes through nRF24LE chips
The ends ANT1 and the ends ANT2 be modulated into 2.4G radio signal transmissions to amplifying circuit.
In conclusion the work(for the 125K chips and 2.4G chips that the active passive type dual-band chip of the present invention has simultaneously
Can, it is mainly used in double-frequency electronic label.In application, the passive wake-up module of the present invention reads 125K low frequency activation signals,
By particular communication agreement, active module embedded therein sends 2.4G high frequency radio signals.It is high-precision that the dual-band chip of the present invention combines low frequency
The characteristics of degree and high frequency large coverage, has accomplished high-precision asset management, such as such as gun off-location system, critical asset object
Money management, has also accomplished accurate garden personnel positioning management, such as:Such as kindergarten, campus, home for destitute, Prison staff positioning;
Suitable for fixed capital management, logistics, national defense safety, the fields such as personnel positioning management.
When the active passive type dual-band chip of the present invention is applied to RFID system, RFID system is mainly by 125K low frequency activations
Device, 125K+2.4G dual-frequency labels and 2.4G gateways composition.125K low frequency activation devices:Have in a set of equipment multiple with unique ID
Radio-frequency transmissions antenna;125K+2.4G dual-frequency label:It is made of dual-band chip, the chip in label receives 125K activation letters
After number, 2.4G signals are activated, by the unique encodings information and corresponding RSSI (Received of the id information of activation and 2.4G
Signal Strength Indication) value sent by 2.4G radio frequencies;2.4G gateway:2.4G radiofrequency signals are received,
And server is reached by RJ45 cables.
The present invention dual-band chip concrete principle be:Using digital modulation and demodulation techniques, at the same support in 125K and
It works under 2.4G.Message transmission rate can be adjusted, and support 1Mbps, two kinds of message transmission rates of 1.5Mbps, high data speed
Rate can complete same data transmit-receive in the shorter time, therefore can have lower power consumption.
The dual-band chip of the present invention has carried out special optimization for low-power consumption application scenario, in the shutdown mode, all to post
Storage value is remained unchanged with FIFO (First Input First Output) value, cut-off current 0.7uA;In standby mode
Under, clock keeps work, electric current 15uA, and can start the transmitting-receiving of data within the longest 130uS times.
The dual-band chip mode of operation of the present invention is very convenient, it is only necessary to which microcontroller is by SPI interface to chip minority
The transmitting-receiving communication of data can be thus achieved in several register configurations.
The dual-band chip of the present invention has low-down system application cost, it is only necessary to a microcontroller and a small amount of periphery
Passive device can form a wireless data transceiving system.It is internally integrated high PSRR (Power Supply Rejection
Ratio LDO power supplys) ensure steady operation within the scope of 1.9-3.6V wide powers;Digital I/O compatibilities 2.5V/3.3V/5V etc. is more
Kind standard I/O voltages, can be directly connected to various microcontroller ports.
The preferred embodiment of present invention described above, is not intended to limit the invention, it is all the present invention spirit and
Made by within principle it is any modification, etc. same active passive type dual-band chip structure improvement etc., should be included in this hair
Within bright protection domain.
Claims (10)
1. a kind of active passive type dual-band chip, which is characterized in that including
Passive wake-up module for receiving 125K low frequency activation signals, the passive wake-up module include the first radio-frequency antenna,
First radio-frequency antenna is electrically connected with rectification circuit, the rectification circuit and the demodulation for cracking 125K low frequency activation signals
The input terminal of circuit is electrically connected, the output end of the demodulator circuit and the logic electricity for verifying the 125K low frequency activations signal
The input terminal on road is electrically connected, and the logic circuit selects logic circuit low in energy consumption;
Power switch, the power switch include first input end and the second input terminal, the first input end and the logic
The output end of circuit is electrically connected, and the power switch is electrically connected with battery;
Active module embedded therein for emitting 2.4G radiofrequency signals, the active module embedded therein include microprocessor circuit, the microprocessor
Circuit includes waking up Enable Pin, waking up and enable feedback end and output end, and the wake-up makes the of feedback end and the power switch
Two input terminals are electrically connected, and the wake-up Enable Pin is electrically connected with the output end of the power switch;The microprocessor circuit
Output end is electrically connected with the second radio-frequency antenna for emitting 2.4GHz radiofrequency signals;
After the first input end of the power switch receives wake-up signal, the power switch transmission wakes up electric signal and gives
The wake-up Enable Pin of the microprocessor circuit, the microprocessor circuit enable to feed back after being waken up by described wake up
Transmission feedback electric signal in end gives second input terminal of the power switch, and the power switch is according to receiving the feedback
Electric signal connects the active module embedded therein and the battery.
2. active passive type dual-band chip according to claim 1, which is characterized in that the passive wake-up module further includes
The amplitude limiter circuit and clock recovery circuitry being electrically connected with the rectification circuit, the clock recovery circuitry are also electric with the demodulation
Road is electrically connected, and the amplitude limiter circuit is electrically connected with a reference circuit, the reference circuit also respectively with upper and lower reset circuit
It is electrically connected with regulator circuit, the regulator circuit is also electrically connected with the logic circuit.
3. active passive type dual-band chip according to claim 2, which is characterized in that the rectification circuit includes two
PMOS tube and two NMOS tubes.
4. active passive type dual-band chip according to claim 3, which is characterized in that the voltage stabilized range of the regulator circuit
For 1.9~3.6V.
5. active passive type dual-band chip according to claim 1, which is characterized in that the microprocessor circuit includes micro-
Processor, and the external memory and microprocessor peripheral circuit that are electrically connected with the microprocessor, the microprocessor with
The external memory carries out communication connection by SPI modes.
6. active passive type dual-band chip according to claim 5, which is characterized in that the microprocessor circuit further includes
Amplifying circuit, the input terminal of the amplifying circuit are electrically connected with the microprocessor, and the output end of the amplifying circuit is as institute
State the output end of microprocessor circuit.
7. active passive type dual-band chip according to claim 5, which is characterized in that the microprocessor selection has
The port P0.0 of the nRF24LE chips of 2.4GHz wireless transceivers, the nRF24LE chips wakes up enabled feedback as described
End.
8. active passive type dual-band chip according to claim 7, which is characterized in that the external memory is selected
LF2PAS3933 chips.
9. active passive type dual-band chip according to claim 1, which is characterized in that the power switch include logic or
Door, two input terminals of the logic sum gate respectively as the power switch first input end and the second input terminal, it is described
The output end of logic sum gate is electrically connected with the grid of a MOS switch pipe, and the drain electrode of the MOS switch pipe connects battery, the electricity
Pond is electrically connected by resistance with the grid of the MOS switch pipe, and the source electrode of the MOS switch pipe is as the defeated of the power switch
Outlet.
10. a kind of active passive type Double-Frequency System, which is characterized in that including 125K low frequency activations device, claim 1 to 9
The active passive type dual-band chip of any one of them and 2.4GHz gateways.
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