CN104579208A - Differential amplification circuit based on ferro-electric field effect transistors - Google Patents
Differential amplification circuit based on ferro-electric field effect transistors Download PDFInfo
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- CN104579208A CN104579208A CN201510011376.7A CN201510011376A CN104579208A CN 104579208 A CN104579208 A CN 104579208A CN 201510011376 A CN201510011376 A CN 201510011376A CN 104579208 A CN104579208 A CN 104579208A
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Abstract
The invention discloses a differential amplification circuit based on ferro-electric field effect transistors; the differential amplification circuit comprises a first P-type ferro-electric field effect transistor, a second P-type ferro-electric field effect transistor, a third P-type ferro-electric field effect transistor, a first N-type ferro-electric field effect transistor and a second N-type ferro-electric field effect transistor; the drain electrodes of the first P-type ferro-electric field effect transistor and the first N-type ferro-electric field effect transistor are connected; the drain electrodes of the second P-type ferro-electric field effect transistor and the second N-type ferro-electric field effect transistor are connected; the source electrodes of the first P-type ferro-electric field effect transistor and the second P-type ferro-electric field effect transistor are connected with a power supply and the grid electrodes are connected with their own drain electrodes; the source electrodes of the first N-type ferro-electric field effect transistor and the second N-type ferro-electric field effect transistor are connected with the drain electrode of the third P-type ferro-electric field effect transistor; the source electrode of the third P-type ferro-electric field effect transistor is grounded and the grid electrode is connected with a variable current source. The differential amplification circuit based on the ferro-electric field effect transistors has excellent performances such as numerical value storage and radiation resistance.
Description
Technical field
The present invention relates to integrated circuit fields, particularly a kind of differential amplifier circuit based on ferro-electric field effect transistor.
Background technology
Along with the fast development of integrated circuit technique, its application has penetrated into the every aspect of life, and semiconductor memory technologies is the important symbol of integrated circuit development level.In recent years, along with the development of space exploration and the raising to integrated circuit requirement, the shortcomings such as operating voltage is high owing to having for conventional field effect transistor, power consumption large, write operation speed is slow, cannot meet the requirement of the demand of people and the application on space product.
Summary of the invention
For the above-mentioned technical problem that prior art exists, the object of this invention is to provide that a kind of operating voltage is low, low in energy consumption, the information retention time is long, fast, the radiation-resistant differential amplifier circuit based on ferro-electric field effect transistor of write operation speed.
For achieving the above object, a kind of differential amplifier circuit based on ferro-electric field effect transistor of the present invention, comprises a P Ferroelectric field-effect transistor, the 2nd P Ferroelectric field-effect transistor, the 3rd P Ferroelectric field-effect transistor, the first N-type ferro-electric field effect transistor, the second N-type ferro-electric field effect transistor, the drain electrode of a described P Ferroelectric field-effect transistor is connected as the first output of differential amplifier circuit with the drain electrode of the first N-type ferro-electric field effect transistor, the drain electrode of described 2nd P Ferroelectric field-effect transistor is connected as the second output of differential amplifier circuit with the drain electrode of the second N-type ferro-electric field effect transistor, a described P Ferroelectric field-effect transistor is all connected with power supply with the source electrode of the 2nd P Ferroelectric field-effect transistor, grid is all connected with the drain electrode of self, the grid of described first N-type ferro-electric field effect transistor and the second N-type ferro-electric field effect transistor is respectively as the first input end of differential amplifier circuit and the second input, described first N-type ferro-electric field effect transistor is all connected with the drain electrode of the 3rd P Ferroelectric field-effect transistor with the source electrode of the second N-type ferro-electric field effect transistor, the source ground of described 3rd P Ferroelectric field-effect transistor, grid connects variable current source.
The present invention can not only complete the logic function of conventional differential amplifying circuit, also possesses the excellent properties such as value storage, Flouride-resistani acid phesphatase.The application of ferro-electric field effect transistor in traditional large scale integrated circuit makes integrated circuit can complete traditional logical operation under low operating voltage, can carry out data storage and possess the characteristic of Flouride-resistani acid phesphatase under high bias voltage.
Accompanying drawing explanation
Fig. 1 is the structural representation of ferro-electric field effect transistor;
Fig. 2 is the circuit structure diagram of differential amplifier circuit of the present invention;
Fig. 3 is the present invention V under different loads
out1, V
out2and V
pinput output Relationship;
Fig. 4 is P ferro-electric field effect transistor of the present invention when being 90nm, the output characteristic curve under different common-mode signal;
Fig. 5 is the Input output Relationship of the present invention under sinusoidal small-signal effect;
Fig. 6 is substantially differential right input-output characteristic in differential amplifier circuit of the present invention.
Embodiment
Below by embodiment, the present invention is described in detail by reference to the accompanying drawings.
As shown in Figure 1, be the cross-sectional view of N-type ferro-electric field effect transistor.Under the gate voltage of different directions, can there is the electric polarization of different directions in ferroelectric layer, and this polarization is power down can preserve.In the present invention N-type ferroelectric transistor adopt channel length be 50nm, ferroelectric layer thickness is that 300nm, P Ferroelectric transistor channel length adopts channel length to be 30nm, 50nm and 90nm tri-groups respectively, other parts and standard CMOS process similar.
Fig. 2 is the circuit structure diagram building differential amplifier circuit with the ferro-electric field effect transistor of suitable parameters, M1 and M2 is the first N-type ferro-electric field effect transistor, the second N-type ferro-electric field effect transistor, form the substantially ferroelectric differential right of N-type, M3 and M4 is a P Ferroelectric field-effect transistor, the 2nd P Ferroelectric field-effect transistor, as the P Ferroelectric transistor load of differential amplifier circuit, M5 is operated in the 3rd P Ferroelectric field-effect transistor that saturated mode channel length is 50nm.V
in1and V
in2be respectively first input end and the second input, be connected with the grid of the second N-type ferro-electric field effect transistor M2 with the first N-type ferro-electric field effect transistor M1.The source electrode of the one P Ferroelectric field effect transistor M 3 and the 2nd P Ferroelectric field effect transistor M 4 all with power supply V
dDbe connected.
As shown in Figure 3, a P Ferroelectric field effect transistor M 3 and the 2nd P Ferroelectric field effect transistor M 4 have employed three kinds of different loads P Ferroelectric field-effect transistors that channel length is respectively 30nm, 50nm, 90nm, V
in1and V
in2add the particles voltage of-3.5V to+3.5V, result display is along with the increase of channel length, and output voltage swing also can increase simultaneously.
Fig. 4 is that a P Ferroelectric field effect transistor M 3 and the 2nd P Ferroelectric field effect transistor M 4 are when to choose 90nm P Ferroelectric field-effect transistor be load, at different common-mode voltage ± 3.0V, ± 3.5V, ± 4.0V, input-output curve under ± 4.5V scanning, output shows good Output rusults, because the polarization of ferroelectric layer, voltage surface sweeping there will be hysteretic phenomenon back and forth, two input-output curves back and forth do not overlap, we find the increase along with common-mode signal, hysteresis window is larger, if added common mode signal voltage is lower than the turnover voltage of ferroelectric layer, input-output curve so back and forth will overlap relatively good.
Fig. 5 is the difference mode signal output characteristic choosing the load of 90nm P sections fulgurite.Along with the increase of difference mode signal, V
out1and V
out2output difference also larger, result shows to have good differential amplification ability based on the differential amplifier circuit of ferroelectric transistor.
Fig. 6 is the input-output curve under key player on a team's small-signal, at V
in1and V
in2end, under the bias voltage of 1.0V, adds V respectively
in11=0.08sin (10
6and V t)
in22=0.2sin (10
6t) sinusoidal signal, two output Output rusults are consistent, and have good output characteristic.
Claims (1)
1. the differential amplifier circuit based on ferro-electric field effect transistor, it is characterized in that, comprise a P Ferroelectric field-effect transistor, the 2nd P Ferroelectric field-effect transistor, the 3rd P Ferroelectric field-effect transistor, the first N-type ferro-electric field effect transistor, the second N-type ferro-electric field effect transistor, the drain electrode of a described P Ferroelectric field-effect transistor is connected as the first output of differential amplifier circuit with the drain electrode of the first N-type ferro-electric field effect transistor, the drain electrode of described 2nd P Ferroelectric field-effect transistor is connected as the second output of differential amplifier circuit with the drain electrode of the second N-type ferro-electric field effect transistor, a described P Ferroelectric field-effect transistor is all connected with power supply with the source electrode of the 2nd P Ferroelectric field-effect transistor, grid is all connected with the drain electrode of self, the grid of described first N-type ferro-electric field effect transistor and the second N-type ferro-electric field effect transistor is respectively as the first input end of differential amplifier circuit and the second input, described first N-type ferro-electric field effect transistor is all connected with the drain electrode of the 3rd P Ferroelectric field-effect transistor with the source electrode of the second N-type ferro-electric field effect transistor, the source ground of described 3rd P Ferroelectric field-effect transistor, grid connects variable current source.
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CN201510011376.7A CN104579208A (en) | 2015-01-09 | 2015-01-09 | Differential amplification circuit based on ferro-electric field effect transistors |
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CN201510011376.7A CN104579208A (en) | 2015-01-09 | 2015-01-09 | Differential amplification circuit based on ferro-electric field effect transistors |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108538828A (en) * | 2017-03-01 | 2018-09-14 | 三星电子株式会社 | Use the logic gate of monopole semiconductor devices, integrated circuit and digital circuit |
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CN101159432A (en) * | 2007-11-13 | 2008-04-09 | 东南大学 | CMOS type difference interface circuit |
CN102130659A (en) * | 2011-01-20 | 2011-07-20 | 西安理工大学 | Circuit structure for reducing input offset voltage of two-stage operational amplifier |
KR20120003799A (en) * | 2010-07-05 | 2012-01-11 | 미쓰미덴기가부시기가이샤 | Differential amplifier circuit and series regulator |
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2015
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Patent Citations (4)
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US6370056B1 (en) * | 2000-03-10 | 2002-04-09 | Symetrix Corporation | Ferroelectric memory and method of operating same |
CN101159432A (en) * | 2007-11-13 | 2008-04-09 | 东南大学 | CMOS type difference interface circuit |
KR20120003799A (en) * | 2010-07-05 | 2012-01-11 | 미쓰미덴기가부시기가이샤 | Differential amplifier circuit and series regulator |
CN102130659A (en) * | 2011-01-20 | 2011-07-20 | 西安理工大学 | Circuit structure for reducing input offset voltage of two-stage operational amplifier |
Non-Patent Citations (3)
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KAI LI 等: "Design and implementation of fefet-based lookup table", 《IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT)》 * |
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CN108538828A (en) * | 2017-03-01 | 2018-09-14 | 三星电子株式会社 | Use the logic gate of monopole semiconductor devices, integrated circuit and digital circuit |
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