CN104538496B - A kind of efficiently silicon heterogenous solar cell electroplated electrode preparation method - Google Patents
A kind of efficiently silicon heterogenous solar cell electroplated electrode preparation method Download PDFInfo
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- CN104538496B CN104538496B CN201410827142.5A CN201410827142A CN104538496B CN 104538496 B CN104538496 B CN 104538496B CN 201410827142 A CN201410827142 A CN 201410827142A CN 104538496 B CN104538496 B CN 104538496B
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- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 23
- 239000010703 silicon Substances 0.000 title claims abstract description 23
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 22
- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 186
- 229910021419 crystalline silicon Inorganic materials 0.000 claims abstract description 179
- 239000010410 layer Substances 0.000 claims abstract description 97
- 238000007747 plating Methods 0.000 claims abstract description 81
- 239000011241 protective layer Substances 0.000 claims abstract description 73
- 230000008021 deposition Effects 0.000 claims abstract description 41
- 239000002184 metal Substances 0.000 claims abstract description 32
- 229910052751 metal Inorganic materials 0.000 claims abstract description 32
- 239000000463 material Substances 0.000 claims description 63
- 238000000151 deposition Methods 0.000 claims description 46
- 238000000034 method Methods 0.000 claims description 44
- 238000007650 screen-printing Methods 0.000 claims description 36
- 239000011800 void material Substances 0.000 claims description 15
- 239000013078 crystal Substances 0.000 claims description 10
- 230000000873 masking effect Effects 0.000 claims description 10
- 238000005507 spraying Methods 0.000 claims description 8
- 239000000126 substance Substances 0.000 claims description 8
- 229920002120 photoresistant polymer Polymers 0.000 claims description 6
- 239000002904 solvent Substances 0.000 claims description 5
- 238000004528 spin coating Methods 0.000 claims description 5
- 239000007921 spray Substances 0.000 claims description 5
- -1 by print Substances 0.000 claims description 4
- 239000003921 oil Substances 0.000 claims 1
- 238000005516 engineering process Methods 0.000 abstract description 21
- 239000010949 copper Substances 0.000 abstract description 18
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 7
- 229910052802 copper Inorganic materials 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 12
- 230000015572 biosynthetic process Effects 0.000 description 9
- 238000009713 electroplating Methods 0.000 description 8
- 238000012856 packing Methods 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 description 6
- 230000005611 electricity Effects 0.000 description 6
- 239000002585 base Substances 0.000 description 5
- 238000007639 printing Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 239000002253 acid Substances 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000008595 infiltration Effects 0.000 description 3
- 238000001764 infiltration Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 239000003513 alkali Substances 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 231100000252 nontoxic Toxicity 0.000 description 2
- 230000003000 nontoxic effect Effects 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000002033 PVDF binder Substances 0.000 description 1
- 229920002472 Starch Polymers 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000003912 environmental pollution Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000011344 liquid material Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920002981 polyvinylidene fluoride Polymers 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000012260 resinous material Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
- H01L31/074—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a heterojunction with an element of Group IV of the Periodic System, e.g. ITO/Si, GaAs/Si or CdTe/Si solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a kind of efficiently silicon heterogenous solar cell electroplated electrode preparation method, main technical schemes to include：Plating mask is formed in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer, protective layer is formed in the side of the surrounding of the crystalline silicon substrate；Wherein, plating mask is formed on the transparent conductive medium layer includes groove；In the groove location electroplated metal layer.Battery edge electric leakage and Cu atoms is easily caused to easily infiltrate into inside battery to solve the problems, such as to exist in the prior art electric copper facing technology.
Description
Technical field
The present invention relates to silicon wafer area of solar cell, more particularly relates to a kind of efficiently silicon heterogenous solar cell electricity
The preparation method of plated electrode.
Background technology
With the increasingly depleted of traditional energy and the getting worse of problem of environmental pollution, photovoltaic power generation technology increasingly by
Concern, it is considered to be important renewable and clean energy resource.Improve the photoelectric transformation efficiency of photovoltaic cell, reduce cost of electricity-generating, make
It has the target that competitiveness is photovoltaic industry compared with traditional grid generation cost.Industrialization crystal-silicon solar cell at present
Front surface electrode is that technology starch and sintered using silk-screen printing Ag forms the Ag grid lines patterned, is technique the advantages of the technology
Simply, production capacity is higher.But the gate electrode line depth-width ratio example of technology production is small, causes battery shading-area larger；Starched after sintering
The residual of organic substance and fault of construction cause grid line resistance larger in material；Ag's is expensive simultaneously, is unfavorable for solar cell
The further lifting of conversion efficiency and the reduction of production cost.
Plating Cu grid line technologies are the Ag gate line electrode substitute technologies of great potential.Wherein, it is relative that Cu grid line technologies are electroplated
Plating Ag grid line technologies have following advantage：Cu price is more cheap than Ag；Electric copper facing technology can be in relatively low temperature
Lower completion；The grid line that is obtained in electric copper facing technology it is very narrow (<20μm).
For in the electroplated electrode technological process of efficient silicon heterojunction solar battery, generally elder generation is in transparent conductive medium layer table
Face preparation has the anti-plate material of grid line pattern as plating mask.Because process conditions limit, crystalline silicon substrate edge and side
It is difficult to be covered by anti-plate layer simultaneously, in following electroplating process, the edge and side of crystalline silicon substrate are in doped layer and conductive layer
The lower low resistance region of material covering may grow Cu particles, cause battery drain, or Cu ions to penetrate into crystalline silicon substrate material
Material is internal, has a strong impact on battery performance.
In the solar cell electroplated electrode technology being currently known, battery edge is removed by the method for subsequent corrosion cleaning
And lateral parts region growing or the Cu particles of attachment, this method can corrode Cu grid line conductive layers simultaneously, and can not effectively go
Except the Cu penetrated into electroplating process by side inside silicon chip.
In summary, exist at the edge of crystalline silicon substrate of unprotect layer protection and the side of surrounding under traditional handicraft
The problem of electric copper facing technology easily causes battery edge electric leakage and Cu atoms to easily infiltrate into inside battery.
The content of the invention
The embodiment of the present invention provides a kind of efficiently silicon heterogenous solar cell electroplated electrode preparation method, existing to solve
Have in technology and the problem of electric copper facing technology easily causes battery edge electric leakage and Cu atoms to easily infiltrate into inside battery be present.
The embodiment of the present invention provides a kind of efficiently silicon heterogenous solar cell electroplated electrode preparation method, including：
Plating mask is formed in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer, the four of the crystalline silicon substrate
The side in week forms protective layer；Wherein, plating mask is formed on the transparent conductive medium layer includes groove；
In the groove location electroplated metal layer.
Further, it is described to form plating mask in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer, in institute
The side for stating the surrounding of crystalline silicon substrate forms protective layer, including：
By silk-screen printing technique deposition have transparent conductive medium layer crystalline silicon substrate upper surface formed plating mask with
And the side of the surrounding in the crystalline silicon substrate forms protective layer, wherein, plates for screen printing includes void region and grid region.
Further, in addition to：
The marginal portion horizontal range of the marginal portion of the upper surface of the crystalline silicon substrate and the printed panel for 10~
2000μm。
Further, it is described to form plating mask in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer, in institute
The side for stating the surrounding of crystalline silicon substrate forms protective layer, including：
It is described to form plating mask in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer；
Multiple crystalline silicon substrates that the crystalline silicon substrate upper surface is formed to plating mask stack, in the multiple crystalline substances stacked
The side of silicon chip surrounding forms protective layer；
Wherein, the edge of the multiple crystalline silicon substrates stacked is perfectly aligned.
Further, the side of the multiple crystalline silicon substrate surroundings stacked in edge alignment forms protective layer, bag
Include：
At the edge, the side for multiple crystalline silicon substrate surroundings that alignment stacks forms protective layer by spraying.
Further, it is described to form plating mask in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer, in institute
The side for stating the surrounding of crystalline silicon substrate forms protective layer, including：
It is described to form plating mask in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer；
Multiple crystalline silicon substrates that the crystalline silicon substrate upper surface is formed to plating mask are disposed vertically in protective layer liquid material
In material, the side of the multiple crystalline silicon substrate surrounding is set to be immersed in the protective layer fluent material successively, in the multiple crystalline substance
The side of silicon chip surrounding forms protective layer.
Further, the side for making the multiple crystalline silicon substrate surrounding successively is immersed in protective layer fluent material, bag
Include：
1~2000 μm of the side of the multiple crystalline silicon substrate surrounding is set to be immersed in the protective layer fluent material.
Further, the crystalline silicon substrate upper surface formation plating mask for having transparent conductive medium layer in deposition, including：
Deposition have in the crystalline silicon substrate of transparent conductive medium layer, by print, spray or spin coating method formed protective layer.
Further, in addition to：
The crystalline silicon substrate for depositing and having transparent conductive medium layer is removed using chemical attack, directly stripping or solvent dissolving
Upper surface forms plating mask；Or
The crystalline silicon substrate for depositing and having transparent conductive medium layer is removed using chemical attack, directly stripping or solvent dissolving
The side that upper surface forms the surrounding of plating mask and the crystalline silicon substrate forms protective layer.
Further, 0.1 μm~1000 μm of the thickness of the protective layer.
Further, the electroplate masking material includes ink or photoresist.
The embodiment of the present invention forms plating mask in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer, described
The side of the surrounding of crystalline silicon substrate forms protective layer；Wherein, plating mask is formed on the transparent conductive medium layer includes groove；
Using the above method, before electroplated metal layer, covering protection is carried out to the side of the surrounding of crystalline silicon substrate, in electroplated metal layer
When, reduce the phenomenon for causing battery edge to leak electricity by electroplating technology, while decrease the infiltration of electroplated metal layer atom
To inside battery, the problem of causing to influence battery performance.
Brief description of the drawings
Fig. 1 provides a kind of solar cell electroplated electrode preparation method flow chart for the embodiment of the present invention；
Fig. 2 is solar cell substrates structural representation provided in an embodiment of the present invention；
Fig. 3 is screen printing plate schematic diagram provided in an embodiment of the present invention；
Fig. 4 for it is provided in an embodiment of the present invention using silk-screen printing technique crystalline silicon substrate upper surface formed plating mask and
Protective layer schematic diagram is formed in the side of the surrounding of the crystalline silicon substrate；
Fig. 5 is formed with reeded plating mask schematic diagram to be provided in an embodiment of the present invention in crystalline silicon substrate upper surface；
Multiple crystalline silicon substrates are stacked schematic diagram by Fig. 6 to be provided in an embodiment of the present invention；
Fig. 7 is that the side of multiple crystalline silicon substrate surroundings provided in an embodiment of the present invention forms protective layer schematic diagram；
Fig. 8 is that crystalline silicon substrate upper surface provided in an embodiment of the present invention forms plating mask, in the surrounding of crystalline silicon substrate
Side forms protective layer schematic diagram；
Fig. 9 is the schematic diagram provided in an embodiment of the present invention that electroplated metal layer is completed in crystalline silicon substrate；
Figure 10 removes crystalline silicon substrate upper surface plating mask to be provided in an embodiment of the present invention, and by crystalline silicon substrate surrounding
Lateral protection layer retain schematic diagram；
Figure 11 is provided in an embodiment of the present invention by crystalline silicon substrate upper surface plating mask and the side of crystalline silicon substrate surrounding
Schematic diagram after protective layer removal.
Embodiment
The embodiment of the present invention forms plating mask in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer, described
The side of the surrounding of crystalline silicon substrate forms protective layer；Wherein, plating mask is formed on the transparent conductive medium layer includes groove；
Using the above method, before electroplated metal layer, covering protection is carried out to the side of the surrounding of crystalline silicon substrate, in electroplated metal layer
When, reduce the phenomenon for causing battery edge to leak electricity by electroplating technology, while decrease the infiltration of electroplated metal layer atom
To inside battery, the problem of causing to influence battery performance.
The preferred embodiments of the present invention are illustrated below in conjunction with Figure of description, it will be appreciated that described herein
Preferred embodiment is merely to illustrate and explain the present invention, and is not intended to limit the present invention, and in the case where not conflicting, this hair
The feature in embodiment and embodiment in bright can be mutually combined.
As shown in figure 1, the embodiment of the present invention one provides a kind of efficiently silicon heterogenous electrode of solar battery electro-plating method, bag
Include following steps：
Step 101, deposition have transparent conductive medium layer crystalline silicon substrate upper surface formed plating mask, in the crystal silicon
The side of the surrounding of substrate forms protective layer；Wherein, plating mask is formed on the transparent conductive medium layer includes groove；
Step 102, in the groove location electroplated metal layer.
As shown in Fig. 2 the main body of crystalline silicon substrate 1 to be processed is Si bases, in the upper surface of crystalline silicon substrate 1, deposition has intrinsic
Amorphous silicon layer 2 and doped amorphous silicon layer 3, deposition has transparent conductive medium layer 4 above doped amorphous silicon layer 3；In crystal silicon base
Also deposition has intrinsic amorphous silicon layer 2 and doped amorphous silicon layer 3 accordingly at the back side of piece 1, in the lower surface of doped amorphous silicon layer 3
Deposition has transparent conductive medium layer 4, there is back metal electrode layer 5 below transparent conductive medium layer 4.
In a step 101, plating mask is formed in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer, described
The side of the surrounding of crystalline silicon substrate forms protective layer, including two methods, wherein in first method, can have simultaneously in deposition
The side that the crystalline silicon substrate upper surface of transparent conductive medium layer forms the surrounding of plating mask and the crystalline silicon substrate forms protection
Layer；In second method, plating mask first is formed in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer, then in institute
The side for stating the surrounding of crystalline silicon substrate forms protective layer.Both approaches are introduced respectively below：
First method：
In embodiments of the present invention, there can be the crystal silicon of transparent conductive medium layer in deposition simultaneously using silk-screen printing technique
The side of the surrounding of substrate upper surface and the crystalline silicon substrate sequentially forms plating mask and protective layer.
As shown in figure 3, plates for screen printing includes grid line structure 6 and void region 7, when screen printing plate is in printing
Wait, by the extruding of scraper plate, ink or other materials is transferred to by the void region hole of plates for screen printing on stock,
The pattern formed on the substrate as void region on screen printing plate.In embodiments of the present invention, have to deposition
When the crystalline silicon substrate upper surface and surrounding side of bright conducting medium layer prepare plating mask and protective layer, filled by positioning
Put so that the void region of the inside of plates for screen printing is equal with the distance holding on four sides of crystalline silicon substrate, that is, ensures crystal silicon base
Piece is located at the half tone center of plates for screen printing, it is preferred that ensureing void region and the crystalline silicon substrate of the inside of plates for screen printing
The distance on four sides is between 10~2000 μm.
When printing, packing material is filled in the inside void region of plates for screen printing, packing material is in scraper plate
Pressure effect is lower to be transferred in crystalline silicon substrate by the void region of screen printing plate, formation and silk-screen printing in crystalline silicon substrate
The plating mask of the same pattern in void region of version, due to scraper plate be applied with the packing material on screen printing forme it is certain
Pressure, while moved towards the screen printing forme other end.Packing material is under the movement of scraper plate by scraper plate from the mesh of void region
It is expressed in crystalline silicon substrate, in embodiments of the present invention, due to the void region of screen printing plate and four sides of crystalline silicon substrate
Distance is between 10~2000 μm, so packing material is whole by the side of the surrounding of crystalline silicon substrate under the active force of scraper plate
In covering.Plates for screen printing is set to be attached in crystalline silicon substrate due to packing material viscous effect, printing process middle scraper is all the time
It is in linear contact lay with screen printing plate and crystalline silicon substrate, contact line is mobile with scraper plate and moves, due to screen printing forme and crystalline silicon substrate
Between keep certain gap so that screen printing forme during printing produces the reaction force to scraper plate by the tension force of itself,
This reaction force is referred to as screen resilience.Due to the effect of screen resilience, it is in only portable linear contact lay to make screen printing forme and crystalline silicon substrate,
And the grid region of screen printing forme and crystalline silicon substrate are disengaged position.
In embodiments of the present invention, due to screen printing plate void region thickness be 0.1 μm~1000 μm between, phase
Answer, be 0.1 μm~1000 μm in the thickness for the plating mask that crystalline silicon substrate upper surface is formed.In embodiments of the present invention, by
Plating mask and the surrounding in the crystalline silicon substrate are formed in the crystalline silicon substrate upper surface for having transparent conductive medium layer in deposition
Side forms what protective layer was simultaneously formed, so the material of plating mask and protective layer is identical, due in crystalline silicon substrate
After upper electroplated metal layer, it is necessary to by corroding the method cleaned by the plating mask of crystalline silicon substrate upper surface and the crystal silicon base
The protective layer of the side of the surrounding of piece removes, so, the packing material being filled on plates for screen printing is necessarily required in acid electricity
The physical phenomenon such as do not chemically react and peel off in plating liquor, has good stability, and nontoxic, nonpollution environment etc. is i.e.
Can.In embodiments of the present invention, from electroplate masking material and guarantor can be used as using materials such as the resinae of acid and alkali resistance, silica types
Jacket material.
Further, because screen printing plate includes grid region and void region, when screen printing plate is from crystal silicon base
When disengaging on piece, after the grid region of screen printing plate departs from from crystalline silicon substrate, the pattern that retains in crystalline silicon substrate
Mutually complementary with the pattern of the void region of screen printing plate, the region of hollow out is the grid on screen printing plate in crystalline silicon substrate
Line region, so the position in the region of hollow out is the position of grid region in the protective layer covered in crystalline silicon substrate, grid line area
The position in domain is the position of metal level to be electroplated.
The crystalline silicon substrate of silk-screen printing is completed after solidification, as described in Figure 4, has transparent conductive medium layer 4 in deposition
The upper surface of crystalline silicon substrate 1 forms plating mask 8, and the side of the surrounding in the crystalline silicon substrate 1 forms protective layer 9.
Second method：
Plating mask first is formed in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer described, then described
The side of the surrounding of crystalline silicon substrate forms protective layer.Wherein, there is formation plating mask on transparent conductive medium layer specific in deposition
Including：Printing, spraying, spin coating etc..
Wherein, spraying is to be sprayed into compressed air from the air nozzle center of spray gun, forms negative pressuren zone in spray nozzle front end, makes
The protective layer material obtained in container sprays from nozzle, and quickly enters high-speed compressed air stream so that and liquid-gas rapidly spreads,
Protective layer material is attached to the surface of crystalline silicon substrate by micronized, comprising layer material in vaporific fly to, and forms uniform plating and covers
Film；Spin coating method is completed on spin coater, and the electroplate masking material of spin coating and crystalline silicon substrate are placed on spin coater, when
Spin coater is in the running, more steady when being rotated due to spin coater rotating disk, so the plating mask thickness formed in crystalline silicon substrate
Than more uniform；The method of photoetching is to determine photo etched mask according to the position of metal level to be electroplated.Wherein, have in the deposition transparent
The crystalline silicon substrate upper surface of conducting medium layer forms photoresist mask, the photoresist is covered exposed by film, develop after shape
Into groove；Wherein, the position of groove is corresponding with the position of metal level to be electroplated.Using the above method, the protection thickness of formation
Degree is between 0.1 μm~1000 μm.
Further, due to after the electroplated metal layer in crystalline silicon substrate, it is necessary to by corroding the method for cleaning by crystal silicon
The protective layer of the side of the surrounding of the plating mask of substrate upper surface and the crystalline silicon substrate removes, so, it is filled into screen printing
Packing material on brush board such as necessarily requires not chemically react and peel off in acid electroplating solution the physical phenomenon, has good
Good stability, and nontoxic, nonpollution environment etc..In embodiments of the present invention, from can with the resinae of acid and alkali resistance,
The materials such as silica type are as electroplate masking material and protective layer material.
Formed as shown in figure 5, having in deposition in the crystalline silicon substrate 1 of transparent conductive medium layer 4 with reeded plating mask
8, wherein, the position of groove is the position of electroplated metal layer.
In embodiments of the present invention, when the crystalline silicon substrate upper surface for having transparent conductive medium layer in deposition forms plating mask
Afterwards, following two schemes are comprised at least to the method for the side formation protective layer of the surrounding of crystalline silicon substrate, separately below to two
Kind scheme is introduced：
Scheme one：
The crystalline silicon substrate edge for depositing the crystalline silicon substrate upper surface formation plating mask for having transparent conductive medium layer is alignd
It is stacked together, in embodiments of the present invention, four edges of crystalline silicon substrate must all align, in the embodiment of the present invention, to folded
The quantity for the crystalline silicon substrate put does not limit.The shape of crystalline silicon substrate that stacks is completed as shown in fig. 6, multiple crystal silicons to stacking
The side of the surrounding of substrate 11 is covered, wherein, it is placed in a crystalline silicon substrate of the superiors in the multiple crystalline silicon substrates stacked
Including：Grid line 12 and plating mask 8, certain gap, institute because crystalline silicon substrate stacks, and between crystalline silicon substrate be present
With, when the surrounding of multiple crystalline silicon substrates to stacking covers selection use spraying method, using the method for spraying,
The surrounding for the multiple crystalline silicon substrates that can ensure to stack can uniformly cover up-protective layer material.Wherein, the guarantor of selection is sprayed
Jacket material includes the materials such as resinae, silica type, further, the protective layer of the surrounding covering of the multiple crystalline silicon substrates stacked
It is completely the same that material can form electroplate masking material with the crystalline silicon substrate upper surface that stacks, such as, electroplate masking material and guarantor
Jacket material all selects resinous material, or electroplate masking material and protective layer material all to select ink class material；Stack
The protective layer material that the side of the surrounding of multiple crystalline silicon substrates is formed can also be formed with the crystalline silicon substrate upper surface stacked and electroplated
Mask material is inconsistent, such as, electroplate masking material is ink, and the side material of the surrounding of crystalline silicon substrate is photoresist.Such as
Fig. 7 show the multiple crystalline silicon substrate surroundings stacked side formed protective layer 9 schematic diagram, wherein, be placed in stack it is multiple
A crystalline silicon substrate of the superiors includes grid line 12 and plating mask 8 in crystalline silicon substrate, and the embodiment of the present invention is more to what is stacked
The protective layer material of the side selection of individual crystalline silicon substrate surrounding and the multiple crystalline silicon substrate upper surfaces stacked form plating mask material
Further restriction is not done in the selection of material.
Scheme two
The crystalline silicon substrate for depositing the crystalline silicon substrate upper surface formation plating mask for having transparent conductive medium layer is sequentially inserted into
Into the gaily decorated basket, in embodiments of the present invention, four edges of crystalline silicon substrate for ensureing to be inserted into the gaily decorated basket must all align, wherein,
The quantity of crystalline silicon substrate to being inserted into the gaily decorated basket does not limit.Because the gaily decorated basket uses PVDF, FTFE or PFA to be made up of raw material,
So the gaily decorated basket has a stronger rigid, corrosion-resistant, wear-resisting, long-term use of indeformable, not foul solution, during device crystalline silicon substrate not
Crystalline silicon substrate can be scratched.
When the crystalline silicon substrate being inserted into the gaily decorated basket is placed into the liquid equipped with protective layer material, ensure crystal silicon
1~2000 micron of each side of substrate is immersed in protective layer material liquid, treats the side of surrounding of crystalline silicon substrate all
Formed after up-protective layer material, multiple crystalline silicon substrates complete the covering of the lateral protection layer material of surrounding.Implement in the present invention
In example, the material of the plating mask of the protective layer material of the side formation of crystalline silicon substrate surrounding and the upper surface formation of crystalline silicon substrate
It is able to can also be differed with identical.The embodiment of the present invention to the protective layer material that the side of crystalline silicon substrate surrounding is formed with
The upper surface of crystalline silicon substrate forms whether electroplate masking material is identical not to be done further restriction.
In a step 102, in the groove location electroplated metal layer.
There is the plating mask groove location in the crystalline silicon substrate of transparent conductive medium layer to carry out electroplated metal layer in deposition, its
In, as shown in Fig. 8 deposition has the groove of plating mask 8 and crystalline silicon substrate four in the crystalline silicon substrate 1 of transparent conductive medium layer 4
The side in week forms the schematic diagram of the crystalline silicon substrate of protective layer 9, in the groove location of the upper surface plating mask 8 of crystalline silicon substrate 1
Electroplated metal layer is carried out, wherein, the metal of electroplated metal layer can be copper product or composite material, further
Ground, the performance of composite material and the performance of metallic copper are basically identical.
In the embodiment of the present invention, the method for electroplated metal layer can be following any method, for example Direct Electroplating, change
Learn plating, photoinduction plating, immersion plating.
As shown in figure 9, the position of groove of the position of electroplated metal layer 10 with being formed on transparent conductive medium layer 4 is relative
Should, it is necessary to by the side of the plating mask 8 of crystalline silicon substrate upper surface and the surrounding of crystalline silicon substrate 1 after the completion of metal level plating
Protective layer 9 removes, wherein, the minimizing technology of plating mask 8 and protective layer 9 can be molten including chemical attack, directly stripping, solvent
The combination of any one or a variety of methods in the methods of solution, in embodiments of the present invention, if the side of the surrounding of crystalline silicon substrate
The protective layer material in face does not influence the guarantor of the performance of crystalline silicon substrate and the performance of solar cell, the then side of crystalline silicon substrate surrounding
Jacket material can continue to retain after the completion of electroplated metal layer.But the plating mask of crystalline silicon substrate upper surface is then needed in electricity
Got rid of after the completion of metal cladding.
As shown in Figure 10, it is the signal for the plating mask 8 that removal crystalline silicon substrate 1 upper surface is provided in the embodiment of the present invention
Figure；As shown in figure 11, it is the plating mask 8 and crystalline silicon substrate 1 of the upper surface of removal crystalline silicon substrate 1 provided in the embodiment of the present invention
The schematic diagram of the lateral protection layer 9 of surrounding.In embodiments of the present invention, to the crystalline silicon substrate after electroplated metal layer is completed
Whether the protective layer of the side of surrounding removes not further limited.
The embodiment of the present invention forms plating mask in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer, described
The side of the surrounding of crystalline silicon substrate forms protective layer；Wherein, plating mask is formed on the transparent conductive medium layer includes groove；
Using the above method, before electroplated metal layer, covering protection is carried out to the side of the surrounding of crystalline silicon substrate, in electroplated metal layer
When, reduce the phenomenon for causing battery edge to leak electricity by electroplating technology, while decrease the infiltration of electroplated metal layer atom
To inside battery, the problem of causing to influence battery performance.
Obviously, those skilled in the art can carry out the essence of various changes and modification without departing from the present invention to the present invention
God and scope.So, if these modifications and variations of the present invention belong to the scope of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to comprising including these changes and modification.
Claims (10)
- A kind of 1. efficiently silicon heterogenous solar cell electroplated electrode preparation method, it is characterised in that including：Using silk-screen printing technique simultaneously deposition have transparent conductive medium layer crystalline silicon substrate upper surface formed plating mask and The side of the surrounding of the crystalline silicon substrate forms protective layer；Or there is the crystalline silicon substrate upper table of transparent conductive medium layer in deposition Face is formed after plating mask, and protective layer is formed in the side of the surrounding of the crystalline silicon substrate；Wherein, the transparent conductive medium Forming plating mask on layer includes groove；0.1 μm~1000 μm of the thickness of the protective layer；The material of the protective layer includes oil Ink or photoresist；In the groove location electroplated metal layer.
- 2. method as claimed in claim 1, it is characterised in that have transparent conductive medium in deposition simultaneously using silk-screen printing technique When the side that the crystalline silicon substrate upper surface of layer forms the surrounding of plating mask and the crystalline silicon substrate forms protective layer, the silk that uses Wire mark brush board includes void region and grid region.
- 3. method as claimed in claim 2, it is characterised in that also include：The marginal portion horizontal range of the marginal portion of the upper surface of the crystalline silicon substrate and the printed panel is 10~2000 μm.
- 4. method as claimed in claim 1, it is characterised in that the crystalline silicon substrate upper table for having transparent conductive medium layer in deposition Face is formed after plating mask, and protective layer is formed in the side of the surrounding of the crystalline silicon substrate, including：Plating mask is formed in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer；Multiple crystalline silicon substrates that the crystalline silicon substrate upper surface is formed to plating mask stack, in the multiple crystal silicon bases stacked The side of piece surrounding forms protective layer；Wherein, the edge of the multiple crystalline silicon substrates stacked is perfectly aligned.
- 5. method as claimed in claim 4, it is characterised in that the multiple crystalline silicon substrate surroundings stacked in edge alignment Side formed protective layer, including：At the edge, the side for multiple crystalline silicon substrate surroundings that alignment stacks forms protective layer by spraying.
- 6. method as claimed in claim 1, it is characterised in that the crystalline silicon substrate upper table for having transparent conductive medium layer in deposition Face is formed after plating mask, and protective layer is formed in the side of the surrounding of the crystalline silicon substrate, including：It is described to form plating mask in the crystalline silicon substrate upper surface that deposition has transparent conductive medium layer；Multiple crystalline silicon substrates that the crystalline silicon substrate upper surface is formed to plating mask are disposed vertically in protective layer fluent material, The side of the multiple crystalline silicon substrate surrounding is set to be immersed in the protective layer fluent material successively, in the multiple crystalline silicon substrate The side of surrounding forms protective layer.
- 7. method as claimed in claim 6, it is characterised in that the side for making the multiple crystalline silicon substrate surrounding successively is immersed In protective layer fluent material, including：1~2000 μm of the side of the multiple crystalline silicon substrate surrounding is set to be immersed in the protective layer fluent material.
- 8. method as claimed in claim 1, it is characterised in that the crystalline silicon substrate upper table for having transparent conductive medium layer in deposition Face forms plating mask, including：Deposition have in the crystalline silicon substrate of transparent conductive medium layer, by print, spray or spin coating method formed protective layer.
- 9. method as claimed in claim 1, it is characterised in that also include：The crystalline silicon substrate upper table for depositing and having transparent conductive medium layer is removed using chemical attack, directly stripping or solvent dissolving Face forms plating mask；OrThe crystalline silicon substrate upper table for depositing and having transparent conductive medium layer is removed using chemical attack, directly stripping or solvent dissolving The side that face forms the surrounding of plating mask and the crystalline silicon substrate forms protective layer.
- 10. such as claim 1~9 any claim methods described, it is characterised in that the electroplate masking material includes ink Or photoresist.
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| CN107658368A (en) * | 2016-07-26 | 2018-02-02 | 福建金石能源有限公司 | A kind of method of achievable solar battery edge insulation |
| CN107275189A (en) * | 2017-06-29 | 2017-10-20 | 苏州苏纳光电有限公司 | The method that the side of chip four and its side wall are protected during evaporated metal |
| CN109427917A (en) * | 2017-08-30 | 2019-03-05 | 福建钧石能源有限公司 | A kind of heterojunction solar battery method for making its electrode |
| CN108428766B (en) * | 2018-03-23 | 2020-04-03 | 南通苏民新能源科技有限公司 | Crystal silicon battery capable of preventing edge electric leakage and preparation method thereof |
| CN111129179A (en) * | 2019-12-31 | 2020-05-08 | 晋能光伏技术有限责任公司 | Heterojunction battery and preparation method thereof |
| CN117352585A (en) * | 2021-03-02 | 2024-01-05 | 苏州太阳井新能源有限公司 | Electrode manufacturing method for preventing edge short circuit of photovoltaic cell and photovoltaic cell formed by method |
| CN115295638A (en) * | 2022-08-29 | 2022-11-04 | 通威太阳能（成都）有限公司 | Solar cell and preparation process thereof |
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| CN101360850A (en) * | 2005-11-18 | 2009-02-04 | 莱里斯奥鲁斯技术公司 | Master electrode and method of forming it |
| CN103107212A (en) * | 2013-02-01 | 2013-05-15 | 中国科学院上海微***与信息技术研究所 | Heterojunction solar battery with electroplate electrodes and preparation method |
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| US9773928B2 (en) * | 2010-09-10 | 2017-09-26 | Tesla, Inc. | Solar cell with electroplated metal grid |
| CN103137791B (en) * | 2013-03-13 | 2016-03-02 | 中国科学院上海微***与信息技术研究所 | Wet method deposition and Low Temperature Heat Treatment combine and prepare heterojunction solar cell method |
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| CN101360850A (en) * | 2005-11-18 | 2009-02-04 | 莱里斯奥鲁斯技术公司 | Master electrode and method of forming it |
| CN103107212A (en) * | 2013-02-01 | 2013-05-15 | 中国科学院上海微***与信息技术研究所 | Heterojunction solar battery with electroplate electrodes and preparation method |
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