CN104538454A - 低温多晶硅薄膜晶体管及其制造方法 - Google Patents
低温多晶硅薄膜晶体管及其制造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 239000010409 thin film Substances 0.000 title abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 229920005591 polysilicon Polymers 0.000 claims description 43
- 238000000034 method Methods 0.000 claims description 28
- 239000000463 material Substances 0.000 claims description 19
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 14
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 12
- 239000012212 insulator Substances 0.000 claims description 10
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 7
- 239000000377 silicon dioxide Substances 0.000 claims description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 7
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 6
- 229910052750 molybdenum Inorganic materials 0.000 claims description 6
- 239000011733 molybdenum Substances 0.000 claims description 6
- 238000005240 physical vapour deposition Methods 0.000 claims description 6
- 235000012239 silicon dioxide Nutrition 0.000 claims description 6
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 238000009413 insulation Methods 0.000 abstract 2
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- 238000000576 coating method Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
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- 239000007790 solid phase Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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Abstract
本发明提供一种低温多晶硅薄膜晶体管及其制造方法,包括:基板(1)、设于基板(1)上的遮光层(2)、设于遮光层(2)上的衬垫层(3)、设于衬垫层上的介质层(4)、设于介质层上的有源层(5)、设于有源层(5)上的栅极绝缘层(6)、设于栅极绝缘层(6)上的栅极层(7);其中,遮光层(2)包括设于基板(1)上的平坦部(21)、及设于平坦部(21)上的凸起部(22);有源层(5)的投影至少覆盖所述凸起部(22)的上表面局部区域及所述凸起部(22)的一个侧壁(224),能够在不改变显示装置开口率的前提下,有效地增加沟道宽度,增加沟道的宽长比,提高了开态电流,提升低温多晶硅薄膜晶体管的驱动能力及器件性能。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种低温多晶硅薄膜晶体管及其制造方法。
背景技术
随着显示技术的发展,平板显示装置因具有高画质、省电、机身薄及应用范围广等优点,而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品,成为显示装置中的主流。
主动矩阵式(Active Matrix,AM)平板显示装置是目前最常用的显示装置,所述主动矩阵式平板显示装置通过一薄膜晶体管开关(Thin FilmTransistor,TFT)来控制数据信号的输入,进而控制画面显示。
目前的显示技术朝着高分辨率的方向不断发展,例如手机的分辨率已经达到1080P的水准(1080×1920),而电视的分辨率更是达到4K(4096×2160)的级别,伴随着分辨率的不断提升,需要不断提高TFT器件的驱动能力。因而,具有高分辨率、反应速度快、高亮度、高开口率等优点的低温多晶硅(LowTemperature Poly-silicon,LTPS)薄膜晶体管显示装置也越来越受关注,为了满足高分辨率的显示装置的驱动能力要求,需要提高显示装置像素区和驱动区的开态电流,提高开态电流的方法为增大TFT器件沟道的宽长比,具体的,所述开态电流ID与TFT器件沟道的宽长比的相关公式为:线性区: 饱和区: 从上述公式可确定,无论是对于线性区还是饱和区,提高开态电流都有两种方法,一是增加沟道宽度W,但是随着沟道宽度W的增加,显示装置的开口率也会随之降低,从而降低面板设计的空间;二是减小沟道长度L,但是沟道长度L过小会增加沟道被击穿风险,因此在沟道长度L的变化上范围十分有限。
发明内容
本发明的目的在于提供一种低温多晶硅薄膜晶体管,用于驱动主动矩阵式显示器件,该低温多晶硅薄膜晶体管能够在不改变显示装置开口率的前提下,有效地增加沟道宽度,增加沟道的宽长比,提高了开态电流,进而提升了低温多晶硅薄膜晶体管的驱动能力及器件性能。
本发明的目的还在于提供一种低温多晶硅薄膜晶体管的制造方法,采用该法能够制造具有较大的沟道宽度与沟道的宽长比低温多晶硅薄膜晶体管,进而提高开态电流,使得该低温多晶硅薄膜晶体管具有优异的驱动能力及器件性能。
为实现上述目的,本发明首先提供一种低温多晶硅薄膜晶体管,包括:基板、设于所述基板上的遮光层、设于所述遮光层上的衬垫层、设于所述衬垫层上的介质层、设于所述介质层上的有源层、设于所述有源层上的栅极绝缘层、设于所述栅极绝缘层上的栅极层;
其中,所述遮光层包括设于所述基板上的平坦部、及设于所述平坦部上的凸起部;
所述有源层的投影至少覆盖所述凸起部的上表面局部区域及所述凸起部的一个侧壁。
所述遮光层的材料为钼。
所述遮光层位于凸起部处的厚度为800至2500埃,所述凸起部的高度为300至800埃,所述凸起部的两侧侧壁与所述衬垫层之间的角度为35°至70°。
所述衬垫层的材料为氮化硅,厚度为400至500埃;所述介质层的材料为二氧化硅,厚度为1000至2000埃。
所述有源层的厚度为400至500埃。
本发明还提供一种低温多晶硅薄膜晶体管的制造方法,包括如下步骤:
步骤1、提供一基板,在所述基板上通过物理气相沉积工艺沉积一遮光层,通过灰阶曝光和刻蚀形成所述遮光层的平坦部与凸起部;
步骤2、采用等离子增强化学气相沉积工艺在所述遮光上依次沉积形成衬垫层、及介质层;
步骤3、在介质层上与所述遮光层的凸起部相对应的区域沉积一非晶硅层,所述非晶硅层的投影覆盖整个凸起部,然后将所述非晶硅层转化为多晶硅层;
步骤4、刻蚀所述多晶硅层形成一有源层,所述有源层至少覆盖在所述凸起部上表面的局部区域及所述凸起部的一个侧壁上;
步骤5、在所述有源层的上方依次沉积并刻蚀形成栅极绝缘层及栅极层。
所述步骤1中所述遮光层的材料为钼。
所述步骤1中所述遮光层位于凸起部处的厚度为800至2500埃,所述凸起部的高度为300至800埃,所述凸起部的两侧侧壁与所述衬垫层之间的角度为35°至70°。
所述步骤2中所述衬垫层的材料为氮化硅,厚度为400至500埃;所述介质层的材料为二氧化硅,厚度为1000至2000埃。
所述步骤4中所述有源层的厚度为400至500埃。
本发明的有益效果:本发明提供一种低温多晶硅薄膜晶体管及其制造方法,通过在基板上设置一具有凸起的遮光层,再在遮光层上设置其余部分,有效地增加了该低温多晶硅薄膜晶体管沟道宽度和沟道的宽长比,提高了开态电流,提升了低温多晶硅薄膜晶体管的驱动能力及器件性能,且不影响显示器件的开口率,采用的制造方法工艺简单,易于操作。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其它有益效果显而易见。
附图中,
图1为一种低温多晶硅薄膜晶体管的平面示意图;
图2为本发明的低温多晶硅薄膜晶体管沿A-A线截面图;
图3为本发明的低温多晶硅薄膜晶体管的制造方法的流程图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
图1为一种低温多晶硅薄膜晶体管的平面示意图;如图1所示,所述低温多晶硅薄膜晶体管包括栅极100、源极200、漏极300及有源层400,所述源极200与漏极300分别通过过孔500与有源层400相接触。
图2为本发明的低温多晶硅薄膜晶体管沿A-A线截面图,如图2所示,本发明提供一种低温多晶硅薄膜晶体管,包括:基板1、设于所述基板1上的遮光层2、设于所述遮光层2上的衬垫层3、设于所述衬垫层3上的介质层4、设于所述介质层4上的有源层5、设于所述有源层5上的栅极绝缘层6、设于所述栅极绝缘层6上的栅极层7;
具体的,所述遮光层2包括设于所述基板1上的平坦部21、及设于所述平坦部21上的凸起部22;所述遮光层2的材料为钼。所述遮光层2位于凸起部22处的厚度为800至2500埃,所述凸起部22的高度为300至800埃,所述凸起部22的两侧侧壁224与所述衬垫层3之间的角度为35°至70°。通过在所述遮光层2上制备凸起部22,可以在不改变显示装置开口率的前提下,有效地增加沟道宽度。
进一步的,所述衬垫层3的材料为氮化硅,厚度为400至500埃;所述介质层4的材料为二氧化硅,厚度为1000至2000埃。所述衬垫层3和介质层4共同构成缓冲层。
此外,所述有源层5的投影至少覆盖所述凸起部22的上表面局部区域及所述凸起部22的一个侧壁224。所述有源层5的厚度为400至500埃。
请参阅图2及图3,本发明还提供了一种低温多晶硅薄膜晶体管的制造方法,包括如下步骤:
步骤1、提供一基板1,在所述基板1上通过物理气相沉积工艺沉积一遮光层2,通过灰阶曝光和刻蚀形成所述遮光层2的平坦部21与凸起部22;
具体的,所述遮光层2的材料为钼或其他类似的金属或有机材料,所述遮光层2位于凸起部22处的厚度为800至2500埃,所述凸起部22的高度为300至800埃,所述凸起部22的两侧侧壁224与所述衬垫层3之间的角度为35°至70°。通过在所述遮光层2上制备凸起部22,然后在所述凸起部22上形成有源层,可以在不改变显示装置开口率的前提下,有效地增加的沟道宽度。
具体的,采用半透掩模工艺,利用干刻蚀形成所述遮光层2的平坦部21和的凸起部22。
步骤2、采用等离子增强化学气相沉积工艺在所述遮光层2上依次沉积形成衬垫层3、及介质层4;
具体的,沉积的温度为400度至450度,所述衬垫层3的材料为氮化硅,厚度为400至500埃;所述介质层4的材料为二氧化硅,厚度为1000至2000埃。所述衬垫层3与介质层4共同构成缓冲层。
步骤3、在介质层2上与所述遮光层2的凸起部22相对应的区域沉积一非晶硅层,所述非晶硅层的投影覆盖整个凸起部22,然后将所述非晶硅层转化为多晶硅层;
具体的,采用化学气相沉积工艺沉积所述非晶硅层,沉积的温度为400℃至500℃,沉积的非晶硅层的厚度为400至500埃。采用准分子激光退火(ELA)或固相结晶(SPC)的方法将非晶硅层转化为多晶硅层。
步骤4、刻蚀所述多晶硅层形成一有源层5,所述有源层5至少覆盖在所述凸起部22上表面的局部区域及所述凸起部22的一个侧壁224;
具体的,所述有源层5的厚度为400至500埃。
步骤5、在所述有源层5的上方依次沉积并刻蚀形成栅极绝缘层6及栅极层7。
此外,该低温多晶硅薄膜晶体管的制造方法还可以包括:
步骤6、在具有栅极层7的基板1表面上,再沉积一介电层,该介电层的材料可以为氧化硅或氮化硅;接着利用光刻和蚀刻工序在源极欧姆接触区域以及漏极欧姆区域的上方的介电层以及栅极绝缘层6内分别形成直达源极的接触孔以及直达漏极的接触孔;
步骤7、最后在基板1表面上沉积第二金属层,如一铝层、一钨层、一铬层或其他金属单层或复合多层导电层;接着利用光刻及刻蚀工序,形成源极和漏极,这样就可以把信号从源极电连接至漏极,完成整个低温多晶硅薄膜晶体管的制造过程。
综上所述,本发明提供一种低温多晶硅薄膜晶体管及其制造方法,通过在基板上设置一具有凸起的遮光层,再在遮光层上设置其余部分,可以有效地增加该低温多晶硅薄膜晶体管的沟道宽度和沟道的宽长比,提高了开态电流,进而提升了低温多晶硅薄膜晶体管的驱动能力及器件性能,且不影响显示器件的开口率,采用的制造方法工艺简单,易于操作。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (10)
1.一种低温多晶硅薄膜晶体管,其特征在于,包括:基板(1)、设于所述基板(1)上的遮光层(2)、设于所述遮光层(2)上的衬垫层(3)、设于所述衬垫层(3)上的介质层(4)、设于所述介质层(4)上的有源层(5)、设于所述有源层(5)上的栅极绝缘层(6)、设于所述栅极绝缘层(6)上的栅极层(7);
其中,所述遮光层(2)包括设于所述基板(1)上的平坦部(21)、及设于所述平坦部(21)上的凸起部(22);
所述有源层(5)的投影至少覆盖所述凸起部(22)的上表面局部区域及所述凸起部(22)的一个侧壁(224)。
2.如权利要求1所述的低温多晶硅薄膜晶体管,其特征在于,所述遮光层(2)的材料为钼。
3.如权利要求2所述的低温多晶硅薄膜晶体管,其特征在于,所述遮光层(2)位于凸起部(22)处的厚度为800至2500埃,所述凸起部(22)的高度为300至800埃,所述凸起部(22)的两侧侧壁(224)与所述衬垫层(3)之间的角度为35°至70°。
4.如权利要求1所述的低温多晶硅薄膜晶体管,其特征在于,所述衬垫层(3)的材料为氮化硅,厚度为400至500埃;所述介质层(4)的材料为二氧化硅,厚度为1000至2000埃。
5.如权利要求1所述的低温多晶硅薄膜晶体管,其特征在于,所述有源层(5)的厚度为400至500埃。
6.一种低温多晶硅薄膜晶体管的制造方法,其特征在于,包括如下步骤:
步骤1、提供一基板(1),在所述基板(1)上通过物理气相沉积工艺沉积一遮光层(2),通过灰阶曝光和刻蚀形成所述遮光层(2)的的平坦部(21)与凸起部(22);
步骤2、采用等离子增强化学气相沉积工艺在所述遮光层(2)上依次沉积形成衬垫层(3)、及介质层(4);
步骤3、在介质层(2)上与所述遮光层(2)的凸起部(22)相对应的区域沉积一非晶硅层,所述非晶硅层的投影覆盖整个凸起部(22),然后将所述非晶硅层转化为多晶硅层;
步骤4、刻蚀所述多晶硅层形成一有源层(5),所述有源层(5)至少覆盖在所述凸起部(22)上表面的局部区域及所述凸起部(22)的一个侧壁(224)上;
步骤5、在所述有源层(5)的上方依次沉积并刻蚀形成栅极绝缘层(6)及栅极层(7)。
7.如权利要求6所述的低温多晶硅薄膜晶体管的制造方法,其特征在于,所述步骤1中所述遮光层(2)的材料为钼。
8.如权利要求6所述的低温多晶硅薄膜晶体管的制造方法,其特征在于,所述步骤1中所述遮光层(2)位于凸起部(22)处的厚度为800至2500埃,所述凸起部(22)的高度为300至800埃,所述凸起部(22)的两侧侧壁(224)与所述衬垫层(3)之间的角度为35°至70°。
9.如权利要求6所述的低温多晶硅薄膜晶体管的制造方法,其特征在于,所述步骤2中所述衬垫层(3)的材料为氮化硅,厚度为400至500埃;所述介质层(4)的材料为二氧化硅,厚度为1000至2000埃。
10.如权利要求6所述的低温多晶硅薄膜晶体管的制造方法,其特征在于,所述步骤4中所述有源层(5)的厚度为400至500埃。
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WO2023077661A1 (zh) * | 2021-11-05 | 2023-05-11 | 京东方科技集团股份有限公司 | 显示基板和显示装置 |
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US9899530B2 (en) | 2018-02-20 |
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