CN104460590B - Semiconductor production line multi-product workpiece combining method - Google Patents

Abstract

Disclosed is a semiconductor production line multi-product workpiece combining method. The method comprises the steps that feature attributes of Lot to be machined in the processing equipment buffer area on a semiconductor production line are obtained; according to the collected workpiece feature attributes, on the basis of the semiconductor processing workpiece sorting compound rule, workpieces to be machined are sorted, and workpiece groups to be combined are formed; then, the ES/RW2 and MDBH combined scheduling algorithm is utilized for sorting the workpiece groups to be combined, and the workpiece processing sequence with the minimum tardiness as the optimization target is determined; finally, the workpiece groups to be combined are fed into processing equipment according to the sorting result to be machined, each Lot weighing factor of different order forms in the current round is calculated, and the technical support effect is provided for the combining decision for the next round. By optimizing the Lot processing flow of the same technology Lot of different order forms in the semiconductor production manufacturing process and combining the Lot processing time of the same technological menu, the production efficiency of the whole system will be improved, and the semiconductor production average processing period and order form tardiness rate are reduced.

Description

A kind of semiconductor production line multi-product workpiece merging method

Technical field

This is related to a kind of semiconductor production line multi-product work the invention belongs to semi-conductor production scheduling and control technology field Part merging method.

Background technology

Semiconductor manufacturing industry is a high-tech industry to economic development with Major Strategic value, has extensive, Highly uncertain, complex manufacturing, constrain the features such as complexity, multiple target, in the quick change of the market demand and globalization warp In the case of Ji intensified competition, semiconductor manufacture industry running maximizes productivity effect and efficiency and becomes urgently to be resolved hurrily important asks Topic.Especially for the chip of large scale integrated circuit and special applications type integrated circuit type, because its order volume is big, product The features such as species is many, even more need to carry out optimizing scheduling in process of production.

At present, there is the research being directed to semi-conductor production scheduling and control aspect in a large number both at home and abroad.Previous most researchs are all Eye is in judgement and the prediction aspect of bottleneck device, and the scheduling problem of batch processing machines, and to the research being merged based on workpiece Fewer.Wherein, Liao considers the probability of Lot merging when studying scheduling problem；Gupta and Sivakumar utilizes upper The trip workpiece time of advent and the information at date of delivery, propose a kind of batch rule of utilization prior information, and notice that Lot merges Can be considered that multiple Lot batchings become the Similar Problems of batch；JY Bang etc. proposes a kind of plant produced line 30%-40%'s Lot be discontented with card in the case of workpiece merging method, and propose some identical jobs merging rule.Said method or lack The System Discussion that workpiece is merged, or less to the research in the case of different order multiple products.

Content of the invention

It is an object of the invention to disclosing a kind of semiconductor production line multi-product workpiece merging method, it is preferred that emphasis is by right Different orders, the merging of the workpiece of same process menu, improve the working (machining) efficiency of the production line of quasiconductor, reduce quasiconductor life Produce the average process-cycle and drag phase rate with order.For semiconductor production quantity on order big, product category is many features such as, propose a kind of The thought of dynamic optimization product weighter factor, by calculating each order corresponding product processing progress after each wheel workpiece merges Determine order each Lot weighter factor, merging decision-making for next round provides technical support, optimizes each order using closed loop control thought Processing progress.

For reaching above-mentioned purpose, the present invention employs the following technical solutions.

A kind of semiconductor production line multi-product workpiece merging method, the method includes the steps of：

Step 1：It is in relief area Lot to be processed information on collection semiconductor production line, obtain quasiconductor Lot's to be processed Characteristic attribute (Lot wafer count to be combined, elasticity at date of delivery, workpiece residue process time, Lot weighter factor)；

Step 2：It is combined ordering rule using the lot information to be processed of collection in step 1 and semiconductor machining workpiece, to slow Rush area's workpiece to be processed to be ranked up, form workpiece race to be combined；

Step 2.1, the Lot according to the workpiece sequencing rule discontented card to be processed to relief area is ranked up；Wherein sort Rule has：

Rule 1, descending adapts to rule first, and the Lot of discontented card is arranged according to wafer number in Lot is descending Sequence, is merged by the target piling 25 wafer to the Lot sequence after sequence, till can not continuing.

Rule 2, ascending order adapts to rule first, and the Lot of discontented card is arranged according to wafer number in Lot is ascending Sequence, is merged by the target piling 25 wafer to the Lot sequence after sequence, till can not continuing.

Rule 3, adapts to ES/RW2 (estimated slack time per remaining work2) rule first, right The Lot of discontented card is ranked up according to the ES/RW2 value of Lot, and wherein ES/RW2 value is the synthesis portraying a certain Lot urgency level Index, ES/RW2 value is less, more urgent；Lot sequence after sequence is merged by the target piling 25 wafer, until not Till continuing.

Rule 4, adapts to MDBH (modified dynamic batching heuristic) rule, first to discontented card Lot be ranked up according to the MDBH value of Lot, when wherein MDBH value features the average relaxation of workpiece to be processed during machine idle Between, when a machine idle, one group of lot selecting the average relaxation time minimum merges.Lot sequence after sequence is pressed The target piling 25 wafer merges, till can not continuing.

Rule 5, the knapsack problem based on the waiting time solves rule.By solving following 0-1 knapsack problem, which to select A little Lot merge.

Wherein, n is to wait for the quantity of Lot in queue.W_kIt is k-th Lot waiting time, a_kIt is the size (wafer of Lot k Number).B is a capacity (25) completely blocking Lot, x_kFor Boolean quantity, 0 represents selection, and 1 expression does not select.Using dynamic programming Method solves this knapsack problem.

Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing.

Rule 6, the knapsack problem based on ES/RW2 value solves rule, and this knapsack problem solves target and is changed into：

I.e. so that more urgent workpiece more first merges processing.As target, solve knapsack problem output one to be combined The sequence of Lot.Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing.

The step 2.2 full card Lot to be processed to relief area, it is moved to step 2.3 together with the lot group merging.

The lot workpiece group to merging for step 2.3., calculates the average relaxation time of each workpiece group, during by average relaxation Between be multiplied by dynamic optimization weighter factor, by lot workpiece group press its be worth descending arrangement.

Step 2.4. utilizes the Lot of majorization of iterative method step 2.3 output

After the completion of merging decision-making each time, by lot importance decision rule, select in remaining Lot to be combined One Lot, is labeled as virtual Lot.

It is more than lot importance decision rule,Represent the significance level of lot j respectively.Wherein X (J) is Lotj affiliated like products family, and the Lot in same machines；Y (j) is Lotj affiliated like products family, and Lot on all machines；Z (j) is the Lot of every other product family in Lotj same machines.Select each groupValue Maximum lot is virtual lot.

Step 2.5. determines the time of the virtual Lot of step 2.4

Reset the time of virtual lot, and once merge before these Lot are added to again as Lot to be combined (a front amalgamation result Lot virtual with these is regarded as one to be combined group, presses merging mesh before again in decision-making Mark does once merging decision-making).Repeat said process not improve until merging target.

Step 3：Determine step 2 output workpiece race processing sequence

Step 3.1 on serial computer, Lot workpiece race to merging, determine Lot priority using ES/RW2 rule, excellent First level is such as made decision：

For Lot i, d_iIt it is date of delivery, t is current time, i.e. the scheduling decision moment；l_iIt is that in Lot i process time is The serial number of few Lot；w_iIt is remaining labor content；h_iIt is Lot i and l_iDifference.

For a certain Lot workpiece race to be combined, its ES RW2 value less, processing priority is higher.

Step 3.2, for batch processor, determines, using MDBH rule, the processing sequence having merged Lot workpiece race.

Select minimum being processed slack time in identical product race.If merged in relief area lot number be more than or Equal to batch processor maximum working ability, then merged the processing of lot batching.Otherwise, selection scheme：1. by waiting list Lot batching is processed；2. wait the lot that will reach batching processing again.Both prioritizing selection middle weighting waiting time little scheme.

Step 4 dynamical feedback calculation procedure 3 exports different orders each Lot weight factor

Step 4.1 calculates completion ratio T of each product family of currently all order_l(j)

Step 4.2 takes and averagely completes ratio when front-wheel

Step 4.3 calculates weight factor P (j+1) of each Lot of next round order

Wherein α as different orders between weight factor, be added to Lot weight factor calculate in.

Compared with existing semiconductor applications Work piece processing method, the present invention has following obvious advantage,

The present invention passes through to extract workpiece to be processed characteristic attribute, and process menu identical in multiple difference orders is discontented with card Lot merges processing.After merging decision-making, virtual Lot is selected to be iterated optimizing by Lot importance decision rule, Improve workpiece combined efficiency.For the features such as semiconductor production product category is many, quantity on order big, date of delivery, the time was wide, propose A kind of thought of dynamic optimization difference order workpiece weighter factor, calculates each order corresponding product after each wheel workpiece merges Completion ratio and average completion ratio, merging decision-making for next round provides technical support effect.The present invention passes through to optimize quasiconductor Different order same process Lot work flows and merge same process menu Lot process time during the manufacturing, it will carry High whole system production efficiency, reduces the semiconductor production average process-cycle and drags phase rate with order, be partly to lead to towards multi-product The improvement of body production field Work piece processing method.

Brief description

Fig. 1 is method flow diagram involved in the present invention；

Fig. 2 is that majorization of iterative method involved in the present invention merges Lot algorithm flow chart；

Fig. 3 is utilized bin packing algorithm flow chart by workpiece involved in the present invention merging；

Fig. 4 is dynamic optimization difference order Lot weight factor schematic diagram involved in the present invention.

The average workpiece that Fig. 5 obtains for the embodiment of the present invention drags phase rate contrast and experiment.

The average process-cycle contrast and experiment that Fig. 6 obtains for the embodiment of the present invention.

The dynamic optimization difference order Lot weight factor contrast and experiment that Fig. 7 obtains for the embodiment of the present invention.

Specific embodiment

Embodiments of the present invention are described further by technical scheme for a better understanding of the present invention below.

It is embodied as taking semi-conductor production scheduling master pattern HP24 as a example.This model is made up of 24 machining centers, altogether There are 72 equipment, equipment component detail parameters are as shown in table 1.

Equipment component parameter in table 1 master pattern HP24

Plant Simulation emulation platform is emulated using HP24 master pattern, wherein sends work rule to adopt FIFO (First In First Out), dosing spot adopts CONWIP, and simulation time is set to 1445 hours, and pre- simulation time sets For 365 hours.Fig. 1-4 show workpiece and merges algorithm main flow chart, comprises the steps：

Step 1：It is in relief area Lot to be processed information on collection semiconductor production line, obtain quasiconductor Lot's to be processed Characteristic attribute (Lot wafer count to be combined, elasticity at date of delivery, workpiece residue process time, Lot weighter factor)；

Used parameter given below definition：

The workpiece average process-cycle：Comprise workpiece average processing time and waiting time；

Utilization rate of equipment and installations：Set point is [0,1].

24 equipment each relief area queue lengths：Relief area workpiece capacity is set to infinity；

Workpiece species：Definition has 100 kinds of workpiece；

Processing priority：It is set as only relevant with workpiece type；

Date of delivery tightness：It is set as only related to workpiece type；

The process time of workpiece operation to be processed：Workpiece also need in production equipment process time；

Workpiece total remaining process time：The process time of workpiece operation to be processed and waiting time sum；

Equipment fault time, maintenance of equipment time：Occurred with fixed interval；

Parts waiting time：For workpiece in every equipment relief area waiting time sum；

The respective completion number of workpiece：With reach recycle bin Drain be complete processing；

The total elapsed time of workpiece and average processing time：The total elapsed time of workpiece is respectively divided by respective completion number It is the average processing time of workpiece；

Workpiece drags phase rate：When order date of delivery, the chief engineer's number of packages that do not complete/order requirements number of packages altogether；

Step 2：It is combined ordering rule using the lot information to be processed of collection in step 1 and semiconductor machining workpiece, to slow Rush area's workpiece to be processed to be ranked up, form workpiece race to be combined；

Step 2.1, the Lot according to the workpiece sequencing rule discontented card to be processed to relief area is ranked up；Wherein sort Rule has：

Rule 1, descending adapts to rule first, and the Lot of discontented card is arranged according to wafer number in Lot is descending Sequence, is merged by the target piling 25 wafer to the Lot sequence after sequence, till can not continuing.

Descending adapts to Sample Rules first：

Lot wafer count 3 14 57 15 23 642 in the Lot to be combined of a certain relief area

According to after descending 23 15 14 765432

Merging group (23 2) (15 7 3) (14 6 5) (4)

Rule 2, ascending order adapts to rule first, and the Lot of discontented card is arranged according to wafer number in Lot is ascending Sequence, is merged by the target piling 25 wafer to the Lot sequence after sequence, till can not continuing.

Ascending order adapts to Sample Rules first：

Lot wafer count 3 14 57 15 23 642 in the Lot to be combined of a certain relief area

According to after ascending order arrangement 234567 14 15 23

Merging group (2 345 6) (7 14) (15) (23)

Rule 3, adapts to ES/RW2 (estimated slack time per remaining work2) rule first, right The Lot of discontented card is ranked up according to the ES/RW2 value of Lot, and wherein ES/RW2 value is the synthesis portraying a certain Lot urgency level Index, ES/RW2 value is less, more urgent；Lot sequence after sequence is merged by the target piling 25 wafer, until not Till continuing.

Sample Rules：

It is ES/RW2 property value in square frame

Lot wafer count 3 [0.9] 14 [0.3] 5 [0.6] 7 [0.7] 15 [0.8] 23 in the Lot to be combined of a certain relief area [0.4]6[0.2]4[0.7]2[0.3]

According to after ascending order arrangement 6 [0.2] 2 [0.3] 14 [0.3] 23 [0.4] 5 [0.6] 4 [0.7] 7 [0.7] 15 [0.8] 3 [0.9]

Merging group (6 [0.2] 2 [0.3] 14 [0.3]) (23 [0.4]) (5 [0.6] 4 [0.7] 7 [0.7]) (15 [0.8] 3 [0.9])

Rule 4, adapts to MDBH (modified dynamic batching heuristic) rule, first to discontented card Lot be ranked up according to the MDBH value of Lot, when wherein MDBH value features the average relaxation of workpiece to be processed during machine idle Between, when a machine idle, one group of lot selecting the average relaxation time minimum merges.Lot sequence after sequence is pressed The target piling 25 wafer merges, till can not continuing.

Rule 5, the knapsack problem based on the waiting time solves rule.Its basic thought is, the sequence to the Lot of discontented card Be equivalent to one knapsack problem of solution, by merging those waiting time the longest Lot, to reduce total process time.Pass through Solve to make waiting time maximum 0-1 knapsack problem with the next one, to select which Lot merges.

Wherein, n is to wait for the quantity of Lot in queue.W_kIt is k-th Lot waiting time, a_kIt is the size (wafer of Lot k Number).B is the capacity (25) of a Lot, x_kFor Boolean quantity, 0 selection, 1 does not select.Can be solved this using dynamic programming Knapsack problem.

Sample Rules：

Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing.

Lot wafer count in a certain Lot to be combined:3,14,5,7,15,23,6,4,2

Lot corresponding waiting time to be combined：437,1412,691,1735,1985,1234,1735,962,450

Merging group obtained by solution knapsack problem：(3,14,5,2)(7,15)(6,4)(23)

Rule 6, the knapsack problem based on ES/RW2 solves rule, and this knapsack problem solves target and is changed into：

I.e. so that more urgent workpiece more first merges is processed.As target, solve knapsack problem output one and treat Merge the sequence of Lot.Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing.

The step 2.2 full card Lot to be processed to relief area, it is moved to step 2.3 together with the lot group merging.

The lot workpiece group to merging for step 2.3., calculates the average relaxation time of each workpiece group, during by average relaxation Between be multiplied by dynamic optimization weighter factor, by lot workpiece group press its be worth descending arrangement.

Step 2.4. utilizes the Lot of majorization of iterative method step 2.3 output

After the completion of merging decision-making each time, by lot importance decision rule, select in remaining Lot to be combined One Lot, is labeled as virtual Lot.

It is more than lot importance decision rule,Represent the significance level of lot j respectively.Wherein X (J) is Lotj affiliated like products family, and the Lot in same machines；Y (j) is Lotj affiliated like products family, and Lot on all machines；Z (j) is the Lot of every other product family in Lotj same machines.Select each groupValue Maximum lot is virtual lot.

Step 2.5. determines the time of the virtual Lot of step 2.4

Reset the time of virtual lot, and once merge before these Lot are added to again as Lot to be combined (a front amalgamation result Lot virtual with these is regarded as one to be combined group, presses merging mesh before again in decision-making Mark does once merging decision-making).Repeat said process not improve until merging target.

Lot wafer count 3 14 57 15 23 642 in a certain Lot to be combined

Merging group (23 2) (15 7 3) (14 6 5) (4)

It is 8 that wafer count in virtual Lot is taken out in definition

Again merge according to descending

Then new ordered set is 23 15 14 8765432

New merging group is changed into merging group (23 2) (15 8 7) (14 6 5) (4 3)

Step 3：Determine step 2 output workpiece race processing sequence

Step 3.1 on serial computer, Lot workpiece race to merging, determine Lot priority using ES/RW2 rule, excellent First level is such as made decision：

For Lot i, d_iIt it is date of delivery, t is current time, i.e. the scheduling decision moment；l_iIt is that in Lot i process time is The serial number of few Lot；w_iIt is remaining labor content；h_iIt is Lot i and l_iDifference.

For a certain Lot workpiece race to be combined, its ES RW2 value less, processing priority is higher.

Step 3.2, for batch processor, determines, using MDBH rule, the processing sequence having merged Lot workpiece race.

Select minimum being processed slack time in identical product race.If merged in relief area lot number be more than or Equal to batch processor maximum working ability, then merged the processing of lot batching.Otherwise, selection scheme：1. by waiting list Lot batching is processed；2. wait the lot that will reach batching processing again.Both prioritizing selection middle weighting waiting time little scheme.

Step 4 dynamical feedback calculation procedure 3 exports different orders each Lot weight factor

Step 4.1 calculates the completion ratio of each product family of currently all order

The α value defining order 1,2,3,4 is respectively 0.98 0.99 0.98 0.99

T₁(1)=0.74 T₂(1)=0.65 T₃(1)=0.69 T₄(1)=0.72

Step 4.2 takes and averagely completes ratio when front-wheel

Step 4.3 calculates the weight factor of each Lot of next round order

P (j+1)=P_l(j)+α×(T(j)-T_l(j))

T₁(2)=0.74+0.98 × (0.7-0.74)=0.7008

T₂(2)=0.65+0.99 × (0.7-0.65)=0.6995

T₃(2)=0.69+0.98 × (0.7-0.69)=0.6998

T₄(2)=0.72+0.99 × (0.7-0.72)=0.7002

Wherein α as different orders between weight factor, be added to Lot weight factor calculate in.

Simulation result as shown in Figure 5 and Figure 6, by extract workpiece to be processed characteristic attribute, by multiple difference orders in work Skill menu identical is discontented with card Lot and is merged processing, and the average process-cycle of workpiece is compared actual production and reduces by 12.9%, work The mean tardiness rate of part is compared actual production and is reduced 23.5%.On here basis, by dynamic optimization difference order workpiece Weighter factor, improves the effectiveness merging decision-making, drags phase rate and average process-cycle to reduce 6.5% and 8.7% respectively again.By Shown in Fig. 7, by calculating dynamical feedback each order difference Lot weight factor, not only reduce the average processing of semiconductor production Cycle, and each order completion time variance is also obviously reduced.Illustrate that the present invention passes through to optimize in semiconductor production manufacture process Different order same process Lot work flows and merge same process menu Lot process time, it is possible to increase whole system produces Efficiency, reduces the semiconductor production average process-cycle and drags phase rate with order, current semiconductor production line is produced important value.

Claims (4)

1. a kind of semiconductor production line multi-product workpiece merging method it is characterised in that：The method includes the steps of,

Step 1：It is in relief area Lot to be processed information on collection semiconductor production line, obtain the feature of quasiconductor Lot to be processed Attribute；

Step 2：It is combined ordering rule using the lot information to be processed of collection in step 1 and semiconductor machining workpiece, to relief area Workpiece to be processed is ranked up, and forms workpiece race to be combined；

Step 2.1, the Lot according to the workpiece sequencing rule discontented card to be processed to relief area is ranked up；Wherein ordering rule Have：

Rule 1, descending adapts to rule first, and the Lot of discontented card is ranked up according to wafer number in Lot is descending, right Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing；

Rule 2, ascending order adapts to rule first, and the Lot of discontented card is ranked up according to wafer number in Lot is ascending, right Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing；

Rule 3, adapts to ES/RW2 rule first, the Lot of discontented card is ranked up according to the ES/RW2 value of Lot, wherein ES/ RW2 value is the aggregative indicator portraying a certain Lot urgency level, and ES/RW2 value is less, more urgent；Lot sequence after sequence is pressed The target piling 25 wafer merges, till can not continuing；

Rule 4, adapts to MDBH rule first, the Lot of discontented card is ranked up according to the MDBH value of Lot, wherein MDBH value is carved Draw the average relaxation time of workpiece to be processed during machine idle, when a machine idle, select average relaxation time minimum One group of lot merges；Lot sequence after sequence is merged by the target piling 25 wafer, until continuing Till；

Rule 5, the knapsack problem based on the waiting time solves rule；By solving following 0-1 knapsack problem, which to select Lot merges；

$\begin{array}{cc}Max& \underset{k=1}{\overset{n}{\Σ}}{W}_k{X}_k\end{array}$

It is limited to

Wherein, n is to wait for the quantity of Lot in queue；W_kIt is k-th Lot waiting time, a_kBe the size of Lot k be wafer count；b It is a capacity such as 25 completely blocking Lot, x_kFor Boolean quantity, 0 represents selection, and 1 expression does not select；Solved using dynamic programming This knapsack problem；

Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing；

Rule 6, the knapsack problem based on ES/RW2 value solves rule, and this knapsack problem solves target and is changed into：

$\begin{array}{cc}Max& {\mathrm{\Σ}}_{i=1}^n\frac{1}{u_k}{X}_k\end{array}$

I.e. so that more urgent workpiece more first merges processing；As target, solve knapsack problem and export a Lot's to be combined Sequence；Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing；

The step 2.2 full card Lot to be processed to relief area, it is moved to step 2.3 together with the lot group merging；

The lot workpiece group to merging for step 2.3., calculates the average relaxation time of each workpiece group, the average relaxation time is taken advantage of With dynamic optimization weighter factor, lot workpiece group is pressed it and is worth descending arrangement；

Step 2.4. utilizes the Lot of majorization of iterative method step 2.3 output

After the completion of merging decision-making each time, by lot importance decision rule, in remaining Lot to be combined, select one Lot, is labeled as virtual Lot；

${\mathrm{\θ}}_j^1=\underset{i\∈X\left(j\right)}{\Σ}{T}_i/\left|X\left(j\right)\right|$

${\mathrm{\θ}}_j^2=\underset{i\∈Y\left(j\right)}{\Σ}{T}_i/\left|Y\left(j\right)\right|$

${\mathrm{\θ}}_j^3=\underset{i\∈Z\left(j\right)}{\Σ}{T}_i/\left|Z\left(j\right)\right|$

It is more than lot importance decision rule,Represent the significance level of lot j respectively；Wherein X (j) is belonging to Lotj Like products family, and the Lot in same machines；Y (j) is Lotj affiliated like products family, and in all machines On Lot；Z (j) is the Lot of every other product family in Lotj same machines；Select each groupThe maximum lot of value For virtual lot；

Step 2.5. determines the time of the virtual Lot of step 2.4

Reset the time of virtual lot, and once merge decision-making before these Lot are added to again as Lot to be combined In；Repeat said process not improve until merging target；

Step 3：Determine step 2 output workpiece race processing sequence

Step 3.1 on serial computer, Lot workpiece race to merging, determine Lot priority, priority using ES/RW2 rule As made decision：

$\max \left[\right\{d_i-w_{l_i}-t+\mathrm{\α}\·h_i/P_i(n_i+1)\}/w_i,\mathrm{\δ}\·p_i]$

For Lot i, d_iIt it is date of delivery, t is current time, i.e. the scheduling decision moment；l_iBe in Lot i process time minimum The serial number of Lot；w_iIt is remaining labor content；h_iIt is Lot i and l_iDifference；

For a certain Lot workpiece race to be combined, its ES RW2 value less, processing priority is higher；

Step 3.2, for batch processor, determines, using MDBH rule, the processing sequence having merged Lot workpiece race；

Select minimum being processed slack time in identical product race；If having merged lot number in relief area to be more than or equal to Batch processor maximum working ability, then merged the processing of lot batching；Otherwise, selection scheme：1. by the lot in waiting list Batching is processed；2. wait the lot that will reach batching processing again；Both prioritizing selection middle weighting waiting time little scheme；

Step 4 dynamical feedback calculation procedure 3 exports different orders each Lot weight factor

Step 4.1 calculates completion ratio T of each product family of currently all order_l(j)

Step 4.2 takes and averagely completes ratio when front-wheel

$\hat{T}=(1/n){\mathrm{\Σ}}_{l=1}^n{T}_l\left(j\right)$

Step 4.3 calculates weight factor P (j+1) of each Lot of next round order

$P(j+1)=P_l\left(j\right)+\mathrm{\α}\×\left(\hat{T}\right(j)-T_l(j\left)\right)$

Wherein α as different orders between weight factor, be added to Lot weight factor calculate in.

2. a kind of semiconductor production line multi-product workpiece merging method according to claim 1 it is characterised in that：Described obtain Take quasiconductor Lot to be processed characteristic attribute be Lot wafer count to be combined, elasticity at date of delivery, workpiece residue process time, Lot weighter factor.

3. a kind of semiconductor production line multi-product workpiece merging method according to claim 1 it is characterised in that：Described heavy Put the time of virtual lot, and once merge before these Lot are added to again as Lot to be combined will in decision-making A front amalgamation result Lot virtual with these is regarded as one to be combined group, does once by merging target before again Merge decision-making.

4. a kind of semiconductor production line multi-product workpiece merging method according to claim 1 it is characterised in that：In order to more Understand well technical scheme, below embodiments of the present invention are described further；

It is embodied as taking semi-conductor production scheduling master pattern HP24 as a example；This model is made up of 24 machining centers, has 72 Platform equipment, equipment component detail parameters are as shown in table 1；

Equipment component parameter in table 1 master pattern HP24

Plant Simulation emulation platform is emulated using HP24 master pattern, wherein sends work rule to adopt FIFO, dosing spot adopts CONWIP, and simulation time is set to 1445 hours, and pre- simulation time is set to 365 hours；

Specifically include following steps：

Step 1：It is in relief area Lot to be processed information on collection semiconductor production line, obtain the feature of quasiconductor Lot to be processed Attribute, Lot wafer count to be combined, elasticity at date of delivery, workpiece residue process time, Lot weighter factor；

Used parameter given below definition：

The workpiece average process-cycle：Comprise workpiece average processing time and waiting time；

Utilization rate of equipment and installations：Set point is [0,1]；

24 equipment each relief area queue lengths：Relief area workpiece capacity is set to infinity；

Workpiece species：Definition has 100 kinds of workpiece；

Processing priority：It is set as only relevant with workpiece type；

Date of delivery tightness：It is set as only related to workpiece type；

The process time of workpiece operation to be processed：Workpiece also need in production equipment process time；

Workpiece total remaining process time：The process time of workpiece operation to be processed and waiting time sum；

Equipment fault time, maintenance of equipment time：Occurred with fixed interval；

Parts waiting time：For workpiece in every equipment relief area waiting time sum；

The respective completion number of workpiece：With reach recycle bin Drain be complete processing；

The total elapsed time of workpiece and average processing time：The total elapsed time of workpiece is respectively divided by respective completion number and is The average processing time of workpiece；

Workpiece drags phase rate：When order date of delivery, the chief engineer's number of packages that do not complete/order requirements number of packages altogether；

Step 2：It is combined ordering rule using the lot information to be processed of collection in step 1 and semiconductor machining workpiece, to relief area Workpiece to be processed is ranked up, and forms workpiece race to be combined；

Step 2.1, the Lot according to the workpiece sequencing rule discontented card to be processed to relief area is ranked up；Wherein ordering rule Have：

Rule 1, descending adapts to rule first, and the Lot of discontented card is ranked up according to wafer number in Lot is descending, right Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing；

Descending adapts to Sample Rules first：

Lot wafer count 3 14 57 15 23 642 in the Lot to be combined of a certain relief area

According to after descending 23 15 14 765432

Merging group (23 2) (15 7 3) (14 6 5) (4)

Rule 2, ascending order adapts to rule first, and the Lot of discontented card is ranked up according to wafer number in Lot is ascending, right Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing；

Ascending order adapts to Sample Rules first：

Lot wafer count 3 14 57 15 23 642 in the Lot to be combined of a certain relief area

According to after ascending order arrangement 234567 14 15 23

Merging group (2 345 6) (7 14) (15) (23)

Rule 3, adapts to ES/RW2 rule first, the Lot of discontented card is ranked up according to the ES/RW2 value of Lot, wherein ES/ RW2 value is the aggregative indicator portraying a certain Lot urgency level, and ES/RW2 value is less, more urgent；Lot sequence after sequence is pressed The target piling 25 wafer merges, till can not continuing；

Sample Rules：

It is ES/RW2 property value in square frame

Lot wafer count 3 [0.9] 14 [0.3] 5 [0.6] 7 [0.7] 15 [0.8] 23 in the Lot to be combined of a certain relief area [0.4] 6[0.2] 4[0.7] 2[0.3]

According to after ascending order arrangement 6 [0.2] 2 [0.3] 14 [0.3] 23 [0.4] 5 [0.6] 4 [0.7] 7 [0.7] 15 [0.8] 3[0.9]

Merging group (6 [0.2] 2 [0.3] 14 [0.3]) (23 [0.4]) (5 [0.6] 4 [0.7] 7 [0.7]) (15 [0.8] 3 [0.9])

Rule 4, adapts to MDBH rule first, the Lot of discontented card is ranked up according to the MDBH value of Lot, wherein MDBH value is carved Draw the average relaxation time of workpiece to be processed during machine idle, when a machine idle, select average relaxation time minimum One group of lot merges；Lot sequence after sequence is merged by the target piling 25 wafer, until continuing Till；

Rule 5, the knapsack problem based on the waiting time solves rule；Its basic thought is that the sequence to the Lot of discontented card is suitable In solving a knapsack problem, by merging those waiting time the longest Lot, to reduce total process time；By solving Waiting time maximum 0-1 knapsack problem is made with the next one, to select which Lot merges；

$\begin{array}{cc}Max& \underset{k=1}{\overset{n}{\Σ}}{W}_k{X}_k\end{array}$

It is limited to

Wherein, n is to wait for the quantity of Lot in queue；W_kIt is k-th Lot waiting time, a_kIt is the size of Lot k；B is one The capacity of Lot, x_kFor Boolean quantity, 0 selection, 1 does not select；This knapsack problem can be solved using dynamic programming；

Sample Rules：

Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing；

Lot wafer count in a certain Lot to be combined:3,14,5,7,15,23,6,4,2

Lot corresponding waiting time to be combined：437,1412,691,1735,1985,1234,1735,962,450

Merging group obtained by solution knapsack problem：(3,14,5,2) (7,15) (6,4) (23)

Rule 6, the knapsack problem based on ES/RW2 solves rule, and this knapsack problem solves target and is changed into：

$\begin{array}{cc}Max& {\mathrm{\Σ}}_{i=1}^n\frac{1}{u_k}{X}_k\end{array}$

I.e. so that more urgent workpiece more first merges is processed；As target, solve knapsack problem output one to be combined The sequence of Lot；Lot sequence after sequence is merged by the target piling 25 wafer, till can not continuing；

The step 2.2 full card Lot to be processed to relief area, it is moved to step 2.3 together with the lot group merging；

The lot workpiece group to merging for step 2.3., calculates the average relaxation time of each workpiece group, the average relaxation time is taken advantage of With dynamic optimization weighter factor, lot workpiece group is pressed it and is worth descending arrangement；

Step 2.4. utilizes the Lot of majorization of iterative method step 2.3 output

After the completion of merging decision-making each time, by lot importance decision rule, in remaining Lot to be combined, select one Lot, is labeled as virtual Lot；

${\mathrm{\θ}}_j^1=\underset{i\∈X\left(j\right)}{\Σ}{T}_i/\left|X\left(j\right)\right|$

${\mathrm{\θ}}_j^2=\underset{i\∈Y\left(j\right)}{\Σ}{T}_i/\left|Y\left(j\right)\right|$

${\mathrm{\θ}}_j^3=\underset{i\∈Z\left(j\right)}{\Σ}{T}_i/\left|Z\left(j\right)\right|$

It is more than lot importance decision rule,Represent the significance level of lot j respectively；Wherein X (j) is belonging to Lotj Like products family, and the Lot in same machines；Y (j) is Lotj affiliated like products family, and in all machines On Lot；Z (j) is the Lot of every other product family in Lotj same machines；Select each groupThe maximum lot of value For virtual lot；

Step 2.5. determines the time of the virtual Lot of step 2.4

Reset the time of virtual lot, and once merge decision-making before these Lot are added to again as Lot to be combined In；Repeat said process not improve until merging target；

Lot wafer count 3 14 57 15 23 642 in a certain Lot to be combined

Merging group (23 2) (15 7 3) (14 6 5) (4)

It is 8 that wafer count in virtual Lot is taken out in definition

Again merge according to descending

Then new ordered set is 23 15 14 8765432

New merging group is changed into merging group (23 2) (15 8 7) (14 6 5) (4 3)

Step 3：Determine step 2 output workpiece race processing sequence

Step 3.1 on serial computer, Lot workpiece race to merging, determine Lot priority, priority using ES/RW2 rule As made decision：

For Lot i, d_iIt it is date of delivery, t is current time, i.e. the scheduling decision moment；l_iBe in Lot i process time minimum The serial number of Lot；w_iIt is remaining labor content；h_iIt is Lot i and l_iDifference；

For a certain Lot workpiece race to be combined, its ES RW2 value less, processing priority is higher；

Step 3.2, for batch processor, determines, using MDBH rule, the processing sequence having merged Lot workpiece race；

Select minimum being processed slack time in identical product race；If having merged lot number in relief area to be more than or equal to Batch processor maximum working ability, then merged the processing of lot batching；Otherwise, selection scheme：1) by the lot in waiting list Batching is processed；2) wait the lot that will reach batching processing again；Both prioritizing selection middle weighting waiting time little scheme；

Step 4 dynamical feedback calculation procedure 3 exports different orders each Lot weight factor

Step 4.1 calculates the completion ratio of each product family of currently all order

The α value defining order 1,2,3,4 is respectively 0.98 0.99 0.98 0.99

Step 4.2 takes and averagely completes ratio when front-wheel

$\hat{T}=(1/n){\mathrm{\Σ}}_{l=1}^n{T}_l\left(j\right)=\frac{0.74+0.65+0.69+0.72}{4}=0.70$

Step 4.3 calculates the weight factor of each Lot of next round order

P (j+1)=P_l(j)+α×(T(j)-T_l(j))

T₁(2)=0.74+0.98 × (0.7-0.74)=0.7008

T₂(2)=0.65+0.99 × (0.7-0.65)=0.6995

T₃(2)=0.69+0.98 × (0.7-0.69)=0.6998

T₄(2)=0.72+0.99 × (0.7-0.72)=0.7002

Wherein α as different orders between weight factor, be added to Lot weight factor calculate in.