CN104426490A - Amplifier circuit and signal amplifying method - Google Patents
Amplifier circuit and signal amplifying method Download PDFInfo
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- CN104426490A CN104426490A CN201310389341.8A CN201310389341A CN104426490A CN 104426490 A CN104426490 A CN 104426490A CN 201310389341 A CN201310389341 A CN 201310389341A CN 104426490 A CN104426490 A CN 104426490A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45136—One differential amplifier in IC-block form being shown
Abstract
The invention provides an amplifier circuit and a signal amplifying method. The amplifier circuit has a static working mode and a dynamic working state and comprises an amplifier, a mapping circuit, a constant-current circuit, an impedance circuit and an output buffer; the amplifier is used for generating an amplifying signal according to a positive input signal and a negative input signal; the mapping circuit is used for mapping the amplifying signal through a first polarized current and generating a mapping current in a first node; the constant-current circuit is connected in series between the first node and a second node and used for providing a constant current; the impedance circuit is connected in series between the first node and the second node; the output buffer is used for generating an output signal at an output end point according to the voltage difference between the first node and the second node and the amplifying signal. With the adoption of the amplifier circuit and the signal amplifying method, the amplifying range of the amplifier circuit is expanded.
Description
Technical field
The present invention has a kind of method about amplifier circuit and amplifying signal; Particularly about a kind of amplifier circuit utilizing Current Control enlargement range.
Background technology
Differential amplifier (differential amplifier) is used for amplifying and produces an output signal, this output signal is the function of difference between two differential or complementary input signals, thus relatively weak signal potential can be detected, and suppress the noise that differential input lines Lu Zhongchang has.In view of this, the design of existing integrated circuit differential amplifier has comprised one differentially provides a Single-end output signal as response to input transistors.But, along with the reduction of transistor size and power supply potential, and different design requirements, existing circuit design can not reach desirable operating characteristics.
In sum, a kind of amplifying circuit with better operating characteristics is needs.
Summary of the invention
The invention provides a kind of amplifier circuit, there is a static mode of operation and a dynamic operation mode.Amplifier circuit comprises an amplifier, a mapping circuit, a constant-current circuit and an impedance circuit.Amplifier have to receive a positive input signal a positive input terminal, in order to receive a negative input end of a negative input signal and the output in order to produce an amplifying signal according to positive input signal and negative input signal.Mapping circuit, in order to by one first bias current, maps amplifying signal, and on a first node, produce a mapping electric current thus.Constant-current circuit is serially connected with between first node and a Section Point, and in order to provide certain electric current, wherein Section Point is in order to receive one first voltage.Impedance circuit is serially connected with between first node and Section Point.Output stage, in order to according to the voltage difference between first node and Section Point and amplifying signal, produces an output signal at an exit point.
In one embodiment, determine electric current and approximate the mapping electric current of amplifier circuit when static mode of operation, make impedance circuit be equivalent to open circuit when static mode of operation.When amplifier circuit is in static mode of operation, voltage difference determined by the cross-pressure on constant-current circuit.In addition, when amplifier circuit is in dynamic operation mode, maps electric current and be greater than and determine electric current, make a variable current flow through impedance circuit, and voltage difference is determined by the cross-pressure on impedance circuit.
In one embodiment, output stage comprises one first p type field effect transistor, one first compensating circuit, one first n type field effect transistor and one second compensating circuit.First p type field effect transistor has the one source pole being coupled to Section Point, the drain electrode being coupled to exit point and is coupled to a grid of first node.Between the grid that first compensating circuit is coupled to the first p type field effect transistor and exit point.First n type field effect transistor have be coupled to a ground connection one source pole, be coupled to a drain electrode of exit point and be coupled to the grid of output of amplifier.Between the grid that second compensating circuit is coupled to the first n type field effect transistor and exit point.
In one embodiment, mapping circuit comprises one second n type field effect transistor, one the 3rd n type field effect transistor and one the 4th n type field effect transistor.Second n type field effect transistor have be coupled to a ground connection one source pole, in order to receive a drain electrode of the first bias current and to be coupled to the grid of output of amplifier.3rd n type field effect transistor has drain electrode and a grid of the one source pole being coupled to ground connection, the drain electrode being coupled to the second n type field effect transistor.4th n type field effect transistor have be coupled to ground connection one source pole, be coupled to a drain electrode of first node and be coupled to the grid of grid of the 3rd n type field effect transistor.
In one embodiment, amplifier circuit also comprises one second p type field effect transistor, second p type field effect transistor is in order to produce the first bias current according to one second bias current and the first voltage, and wherein the second p type field effect transistor has the one source pole being coupled to Section Point, a drain electrode of the drain electrode being coupled to the second n type field effect transistor and the grid in order to receive the second bias current.
In one embodiment, constant-current circuit is one the 3rd p type field effect transistor, 3rd p type field effect transistor determine electric current in order to produce according to one second bias current and the first voltage, wherein the 3rd p type field effect transistor have be coupled to Section Point one source pole, be coupled to one of first node and drain and a grid in order to receive the second bias current.
In one embodiment, impedance circuit comprises one the 4th p type field effect transistor, wherein the 4th p type field effect transistor have be coupled to Section Point one source pole, be coupled to a drain electrode of first node and be coupled to the grid of drain electrode of the 4th p type field effect transistor, wherein impedance circuit also can comprise one first resistance, and above-mentioned first resistance has one second end being coupled to the grid of the 4th p type field effect transistor and a first end of drain electrode and being coupled to first node.
The present invention separately provides a kind of method of amplifying signal, be applicable to the amplifier circuit comprising a constant-current circuit and an impedance circuit, and amplifier circuit has a static mode of operation and a dynamic operation mode.The method of amplifying signal comprises: from amplifier accepts one amplifying signal; By constant-current circuit, produce certain electric current; By one first bias current, amplifying signal is mapped, and on a first node, produce a mapping electric current thus, wherein constant-current circuit and impedance circuit are coupled between first node and a Section Point, constant-current circuit and impedance circuit are connected in parallel to each other, and Section Point is coupled to one first voltage; By mapping electric current, control flow check is through a variable current of impedance circuit, and to change the cross-pressure on impedance circuit, wherein variable current equals map electric current and determine difference between currents; And according to the voltage difference between first node and Section Point and amplifying signal, produce an output signal.
Amplifier circuit is the invention enables to have larger enlargement range.
Accompanying drawing explanation
Fig. 1 is the calcspar of a kind of embodiment of amplifier circuit of the present invention.
Fig. 2 is the calcspar of a kind of embodiment of the amplifier circuit shown in Fig. 1.
Fig. 3 is the flow chart of a kind of embodiment of the method for amplifying signal of the present invention.
Being simply described as follows of symbol in accompanying drawing:
100 amplifier circuits
102 mapping circuits
104 constant-current circuits
106 impedance circuits
108 output stages
1082,1084 compensating circuits
AMP1 amplifier
MP1 ~ MP4 p type field effect transistor
MN1 ~ MN4 n type field effect transistor
R1 ~ R3 resistance
C1, C2 electric capacity
N1, N2 node
N3 exit point
VDD first voltage
VP, VN input signal
VA amplifying signal
VO outputs signal
Ibias1, Ibias2 bias current
Ic determines electric current
Iz variable current
Iout output current
Imirror maps electric current
GND ground connection
S300 ~ S306 step.
Embodiment
Device and the using method of various embodiments of the invention will be discussed in detail below.But it should be noted that many feasible inventive concepts provided by the present invention may be implemented in various particular range.These specific embodiments are only for illustrating device of the present invention and using method, but non-for limiting scope of the present invention.
Fig. 1 is the calcspar of a kind of embodiment of amplifier circuit of the present invention.Amplifier circuit 100 as amplifier there is a static mode of operation and a dynamic operation mode, and according to inputted signal operation in static mode of operation or dynamic operation mode.Amplifier circuit 100 comprises an amplifier AMP1, mapping circuit 102, constant-current circuit 104, impedance circuit 106 and an output stage 108.
Amplifier AMP1 has a positive input terminal in order to receive a positive input signal VP, a negative input end in order to receive a negative input signal VN and an output in order to produce an amplifying signal VA according to positive input signal VP and negative input signal VN.It should be noted that amplifier AMP1 can be made up of a differential input level and an electric current electrostatic road, but the present invention is not limited thereto.
Mapping circuit 102, in order to receive amplifying signal VA and one first bias current Ibias1, to be mapped amplifying signal VA by the first bias current Ibias1, and produces a mapping electric current I mirror thus on a first node N1.In other words, mapping circuit 102 is in order to be mapped as the mapping electric current I mirror on first node N1 by amplifying signal VA.It should be noted that, the voltage difference of the voltage of amplifying signal VA and positive input signal VP and negative input signal VN is inversely proportional to, voltage on first node N1 is directly proportional to the voltage of amplifying signal VA, and the voltage that first node N1 shows radio stream Imirror and amplifying signal VA is inversely proportional to, but the present invention is not limited thereto.
Constant-current circuit 104 is serially connected with between a first node N1 and Section Point N2, and in order to provide certain electric current I c, wherein Section Point N2 is coupled to one first voltage VDD.
Impedance circuit 106 has a first end and is coupled to Section Point N2 and one second end is coupled to first node N1.In other words, impedance circuit 106 is serially connected with between first node N1 and Section Point N2.It should be noted that the impedance of impedance circuit 106 is less than the impedance of constant-current circuit 104.In a preferred embodiment of the present invention, if the current value of variable current Iz is 0.1 μ A, the resistance value of constant-current circuit 104 is 100M Ω, and the resistance value of impedance circuit 106 is between 10K Ω-50K Ω.
Output stage 108, in order to according to the voltage difference between first node N1 and Section Point N2 and amplifying signal VA, produces an output signal VO at an exit point N3.Specifically, output stage 108 comprises one first p type field effect transistor MP1, one first compensating circuit 1082,1 first n type field effect transistor MN1 and one second compensating circuit 1084.First p type field effect transistor MP1 has that one source pole is coupled to Section Point N2, a drain electrode is coupled to exit point and a grid is coupled to first node N1.Between the grid that first compensating circuit 1082 is coupled to the first p type field effect transistor MP1 and exit point N3, in order to the limit of amplifier circuit 100 and/or compensate zero point.First n type field effect transistor MN1 has that one source pole is coupled to a ground connection GND, a drain electrode is coupled to exit point N3 and a grid is coupled to the output of amplifier AMP1.Between the grid that second compensating circuit 1084 is coupled to the first n type field effect transistor MN1 and exit point N3, in order to the limit of amplifier circuit 100 and/or compensate zero point.It should be noted that the first p type field effect transistor MP1 and the first n type field effect transistor MN1, carry out conducting according to the voltage difference between first node N1 and Section Point N2 and amplifying signal VA respectively, to produce an output current Iout.Exit point N3 is in order to produce output signal VO according to output current Iout.
It should be noted that in one embodiment, determine electric current I c and approximate the mapping electric current I mirror of amplifier circuit 100 when static mode of operation, make impedance circuit 106 be equivalent to open circuit when static mode of operation.In other words, under desirable state, determine electric current I c and equal to map electric current I mirror.Therefore, when amplifier circuit 100 is in static mode of operation, the voltage difference between first node N1 and Section Point N2 determined by the cross-pressure on constant-current circuit 104.In one embodiment of this invention, the cross-pressure of constant-current circuit 104 is 0.1 volt, and the conducting voltage of the first p type field effect transistor MP1 is 0.7 volt, but the present invention is not limited thereto.In other embodiments, the cross-pressure of constant-current circuit 104 can be the magnitude of voltage that the arbitrary rational in 0.1 ~ 0.3 volt is formed.Therefore, when static mode of operation, the first p type field effect transistor MP1 operates in the front end of three polar regions (triode region), and the output current Iout that amplifier circuit 100 is produced is very little.In other words, amplifier circuit 100 has very little quiescent current (output current Iout).In a preferred embodiment of the present invention, the maximum of the quiescent current of output current Iout is 200 μ A.
When amplifier circuit 100 is in dynamic operation mode, the voltage difference of positive input signal VP and negative input signal VN, is greater than the voltage difference of positive input signal VP and negative input signal VN when static mode of operation.Therefore, mapping electric current I mirror during dynamic operation mode is greater than mapping electric current I mirror during static mode of operation.In other words, mapping electric current I mirror during dynamic operation mode is greater than and determines electric current I c.Therefore, impedance circuit 106 conducting, and a variable current Iz flows through impedance circuit 106, wherein maps electric current I mirror and equals variable current Iz and determine the summation of electric current I c.Due to, the impedance of impedance circuit 106 is greater than the impedance of constant-current circuit 104.Therefore, when amplifier circuit 100 is in dynamic duty, the cross-pressure on impedance circuit 106 is greater than the cross-pressure of constant-current circuit 104.In other words, the voltage difference between first node N1 and Section Point N2 determined by the cross-pressure on impedance circuit 106.Because impedance circuit 106 has larger resistance and cross-pressure, therefore when dynamic operation mode, output signal VO has the larger amplitude of oscillation (Swing).Wherein, the resistance of impedance circuit 106 can be determined according to circuit requirements by designer.
The calcspar of a kind of embodiment that Fig. 2 is the amplifier circuit shown in Fig. 1.In the present embodiment, amplifier circuit 100 also comprises one second p type field effect transistor MP2 in order to produce the first bias current Ibias1 according to one second bias current Ibias2 and the first voltage VDD.Second p type field effect transistor MP2 has one source pole is coupled to Section Point N2, a drain electrode is coupled to the second n type field effect transistor MN2 drain electrode and a grid in order to receive one second bias current Ibias2.
In the present embodiment, mapping circuit 102 comprises one second n type field effect transistor MN2, one the 3rd n type field effect transistor MN3 and the 4th n type field effect transistor MN4, but the present invention is not limited thereto.Second n type field effect transistor MN2 has the output that one source pole is coupled to a ground connection GND, a drain electrode is coupled to amplifier AMP1 in order to receive the first bias current Ibias1 and a grid.3rd n type field effect transistor MN3 has drain electrode and the grid that one source pole is coupled to ground connection GND, a drain electrode is coupled to the second n type field effect transistor MN2.4th n type field effect transistor MN4 has that one source pole is coupled to ground connection GND, a drain electrode is coupled to first node N1 and a grid is coupled to the grid of the 3rd n type field effect transistor MN3.
In the present embodiment, constant-current circuit 104 is one the 3rd p type field effect transistor MP3, but the present invention is not limited thereto.3rd p type field effect transistor MP3 determines electric current I c in order to produce according to one second bias current Ibias2 and the first voltage VDD, wherein the 3rd p type field effect transistor MP3 have that one source pole is coupled to Section Point N2, a drain electrode is coupled to first node N1 and, a grid is in order to receive one second bias current Ibias2.It should be noted that those of ordinary skill in the art determine electric current I c by the volume of the 3rd p type field effect transistor MP3, the second bias current Ibias2 and the first voltage VDD design,
Make to determine mapping electric current I mirror when electric current I c equals static mode of operation.
In the present embodiment, impedance circuit 106 comprises one the 4th p type field effect transistor MP4 and/or one first resistance R1, but the present invention is not limited thereto.4th p type field effect transistor MP4 has that one source pole is coupled to Section Point N2, a drain electrode is coupled to first node N1 and a grid is coupled to the drain electrode of the 4th p type field effect transistor MP4.First resistance R1 has a first end and is coupled to the grid of the 4th p type field effect transistor MP4 and drain electrode and one second end and is coupled to first node N1.
In the present embodiment, the first compensating circuit 1082 comprises one second resistance R2 and one first electric capacity C1, but the present invention is not limited thereto.Second resistance R2 has a first end and is coupled to the grid of the first p type field effect transistor MP1 and one second end is coupled to the first electric capacity C1.First electric capacity C1 has a first end and is coupled to second end of the second resistance R2 and one second end is coupled to exit point N3.
In the present embodiment, the second compensating circuit 1084 comprises one the 3rd resistance R3 and one second electric capacity C2, but the present invention is not limited thereto.3rd resistance R3 has a first end and is coupled to the grid of the first n type field effect transistor MN1 and one second end is coupled to the second electric capacity C2.Second electric capacity C2 has a first end and is coupled to second end of the 3rd resistance R3 and one second end is coupled to exit point N3.
Fig. 3 is the flow chart of a kind of embodiment of the method for amplifying signal of the present invention.The method of amplifying signal is applicable to the amplifier circuit 100 shown in Fig. 1 and Fig. 2.Flow process starts from step S300.
In step S300, mapping circuit 102 is in order to receive amplifying signal VA and one first bias current Ibias1, and constant-current circuit 104 is in order to produce certain electric current I c.It should be noted that amplifying signal VA is the signal produced according to differential input (such as, negative input signal VN and positive input signal VP) by amplifier AMP1.In addition, determine electric current I c and approximate the mapping electric current I mirror of amplifier circuit 100 when static mode of operation, and map electric current I mirror and be directly proportional to amplifying signal VA, but the present invention is not limited thereto.
For example, in one embodiment, constant-current circuit 104 is one the 3rd p type field effect transistor MP3, but the present invention is not limited thereto.3rd p type field effect transistor MP3 determines electric current I c in order to produce according to one second bias current Ibias2 and the first voltage VDD.Those of ordinary skill in the art, determine electric current I c by the volume of the 3rd p type field effect transistor MP3, the second bias current Ibias2 and the first voltage VDD design, make to determine mapping electric current I mirror when electric current I c equals static mode of operation.
Then, in step s 302, mapping circuit 102, by the first bias current Ibias1, maps amplifying signal VA, and on first node N1, produce a mapping electric current I mirror thus.
Then, in step s 304, amplifier circuit 100 is by mapping electric current I mirror, and control flow check is through the variable current Iz of impedance circuit 106, and to change the cross-pressure on impedance circuit 106, wherein variable current Iz equals to map electric current I mirror and the difference of determining electric current I c.In other words, map electric current I mirror to equal variable current Iz and determine the summation of electric current I c.Determined by amplifying signal VA owing to mapping electric current I mirror, and to determine electric current I c be fixing.Therefore, the mapping electric current I mirror that variable current Iz is produced by amplifying signal VA determined.
Then, in step S306, output stage 108, in order to according to the voltage difference between first node N1 and Section Point N2 and amplifying signal VA, produces an output signal VO at an exit point N3.Specifically, the first p type field effect transistor MP1 and the first n type field effect transistor MN1, carries out conducting according to the voltage difference between first node N1 and Section Point N2 and amplifying signal VA respectively, to produce an output current Iout.Exit point N3 is in order to produce output signal VO according to output current Iout.
The mapping electric current I mirror of amplifier circuit 100 when static mode of operation is approximated owing to determining electric current I c.Therefore, impedance circuit 106 is equivalent to open circuit when static mode of operation.In other words, when amplifier circuit 100 is in static mode of operation, the voltage difference between first node N1 and Section Point N2 determined by the cross-pressure on constant-current circuit 104.In one embodiment of this invention, the cross-pressure of constant-current circuit 104 is 0.1 volt, and the conducting voltage of the first p type field effect transistor MP1 is 0.7 volt, but the present invention is not limited thereto.In other embodiments, the cross-pressure of constant-current circuit 104 can be the magnitude of voltage that the arbitrary rational in 0.1 ~ 0.3 volt is formed.Therefore, when static mode of operation, the cross-pressure of the first p type field effect transistor MP1 grid and source electrode is between 0.1 ~ 0.3 volt, and the output current Iout that amplifier circuit 100 is produced is very little.In other words, amplifier circuit 100 has very little quiescent current (output current Iout).
When amplifier circuit 100 is in dynamic operation mode, mapping electric current I mirror during dynamic operation mode is greater than mapping electric current I mirror during static mode of operation.In other words, mapping electric current I mirror during dynamic operation mode is greater than and determines electric current I c.Therefore, impedance circuit 106 conducting, and a variable current Iz flows through impedance circuit 106.Due to, the impedance of impedance circuit 106 is greater than the impedance of constant-current circuit 104.Therefore, when amplifier circuit 100 is in dynamic duty, the cross-pressure on impedance circuit 106 is greater than the cross-pressure of constant-current circuit 104.In other words, the voltage difference between first node N1 and Section Point N2 is determined by the cross-pressure on impedance circuit 106.It should be noted that impedance circuit 106 has larger resistance and cross-pressure compared to constant-current circuit, therefore when dynamic operation mode, output signal VO has larger amplitude (Swing).
The foregoing is only present pre-ferred embodiments; so itself and be not used to limit scope of the present invention; anyone familiar with this technology; without departing from the spirit and scope of the present invention; can do on this basis and further improve and change, the scope that therefore protection scope of the present invention ought define with claims of the application is as the criterion.
Claims (16)
1. an amplifier circuit, have a static mode of operation and a dynamic operation mode, it is characterized in that, above-mentioned amplifier circuit comprises:
One amplifier, has to receive a positive input terminal of a positive input signal, in order to receive a negative input end of a negative input signal and the output in order to produce an amplifying signal according to above-mentioned positive input signal and above-mentioned negative input signal;
One mapping circuit, in order to by one first bias current, maps above-mentioned amplifying signal, and on a first node, produce a mapping electric current thus;
One constant-current circuit, is serially connected with between above-mentioned first node and a Section Point, and in order to provide certain electric current, wherein above-mentioned Section Point is in order to receive one first voltage; And
One impedance circuit, is serially connected with between above-mentioned first node and above-mentioned Section Point;
One output stage, in order to according to the voltage difference between above-mentioned first node and above-mentioned Section Point and above-mentioned amplifying signal, produces an output signal at an exit point.
2. amplifier circuit according to claim 1, is characterized in that, above-mentionedly determines electric current and equals the above-mentioned mapping electric current of above-mentioned amplifier circuit when above-mentioned static mode of operation, makes above-mentioned impedance circuit be equivalent to open circuit when static mode of operation.
3. amplifier circuit according to claim 2, is characterized in that, when above-mentioned amplifier circuit is in above-mentioned static mode of operation, above-mentioned voltage difference determined by the cross-pressure on above-mentioned constant-current circuit.
4. amplifier circuit according to claim 2, is characterized in that, when above-mentioned amplifier circuit is in above-mentioned dynamic operation mode, above-mentioned mapping electric current is greater than above-mentionedly determines electric current, makes a variable current flow through above-mentioned impedance circuit.
5. amplifier circuit according to claim 4, is characterized in that, when above-mentioned amplifier circuit is in above-mentioned dynamic operation mode, above-mentioned voltage difference determined by the cross-pressure on above-mentioned impedance circuit.
6. amplifier circuit according to claim 1, is characterized in that, above-mentioned output stage comprises:
One first p type field effect transistor, has the one source pole being coupled to above-mentioned Section Point, the drain electrode being coupled to above-mentioned exit point and is coupled to a grid of above-mentioned first node;
One first compensating circuit, between the grid being coupled to above-mentioned first p type field effect transistor and above-mentioned exit point;
One first n type field effect transistor, have be coupled to a ground connection one source pole, be coupled to a drain electrode of above-mentioned exit point and be coupled to the grid of output of above-mentioned amplifier; And
One second compensating circuit, between the grid being coupled to above-mentioned first n type field effect transistor and above-mentioned exit point.
7. amplifier circuit according to claim 1, is characterized in that, above-mentioned mapping circuit comprises:
One second n type field effect transistor, have be coupled to a ground connection one source pole, in order to receive a drain electrode of above-mentioned first bias current and to be coupled to the grid of output of above-mentioned amplifier;
One the 3rd n type field effect transistor, has drain electrode and a grid of the one source pole being coupled to above-mentioned ground connection, the drain electrode being coupled to above-mentioned second n type field effect transistor; And
One the 4th n type field effect transistor, have be coupled to above-mentioned ground connection one source pole, be coupled to a drain electrode of above-mentioned first node and be coupled to the grid of grid of above-mentioned 3rd n type field effect transistor.
8. amplifier circuit according to claim 7, it is characterized in that, also comprise one second p type field effect transistor, above-mentioned second p type field effect transistor is in order to produce above-mentioned first bias current according to one second bias current and above-mentioned first voltage, and wherein above-mentioned second p type field effect transistor has the one source pole being coupled to above-mentioned Section Point, a drain electrode of the drain electrode being coupled to above-mentioned second n type field effect transistor and the grid in order to receive above-mentioned second bias current.
9. amplifier circuit according to claim 1, it is characterized in that, above-mentioned constant-current circuit is one the 3rd p type field effect transistor, above-mentioned 3rd p type field effect transistor above-mentionedly determine electric current in order to produce according to one second bias current and above-mentioned first voltage, wherein above-mentioned 3rd p type field effect transistor have be coupled to above-mentioned Section Point one source pole, be coupled to one of above-mentioned first node and drain and a grid in order to receive above-mentioned second bias current.
10. amplifier circuit according to claim 1, it is characterized in that, above-mentioned impedance circuit comprises one the 4th p type field effect transistor, wherein above-mentioned 4th p type field effect transistor have be coupled to above-mentioned Section Point one source pole, be coupled to a drain electrode of above-mentioned first node and be coupled to the grid of drain electrode of above-mentioned 4th p type field effect transistor.
11. amplifier circuits according to claim 10, it is characterized in that, above-mentioned impedance circuit also comprises one first resistance, and above-mentioned first resistance has one second end being coupled to the above-mentioned grid of the 4th p type field effect transistor and a first end of drain electrode and being coupled to above-mentioned first node.
The method of 12. 1 kinds of amplifying signals, it is characterized in that, be applicable to the amplifier circuit comprising a constant-current circuit and an impedance circuit, and above-mentioned amplifier circuit has a static mode of operation and a dynamic operation mode, wherein the method for above-mentioned amplifying signal comprises:
From amplifier accepts one amplifying signal;
By above-mentioned constant-current circuit, produce certain electric current;
By one first bias current, above-mentioned amplifying signal is mapped, and on a first node, produce a mapping electric current thus, wherein above-mentioned constant-current circuit and above-mentioned impedance circuit are all coupled between above-mentioned first node and a Section Point, above-mentioned constant-current circuit and above-mentioned impedance circuit are connected in parallel to each other, and above-mentioned Section Point is coupled to one first voltage;
By above-mentioned mapping electric current, control flow check is through a variable current of above-mentioned impedance circuit, and to change the cross-pressure on above-mentioned impedance circuit, wherein above-mentioned variable current equals above-mentioned mapping electric current and above-mentionedly determines difference between currents; And
According to the voltage difference between above-mentioned first node and above-mentioned Section Point and above-mentioned amplifying signal, produce an output signal.
The method of 13. amplifying signals according to claim 12, is characterized in that, above-mentionedly determines electric current and equals the above-mentioned mapping electric current of above-mentioned amplifier circuit when above-mentioned static mode of operation, makes above-mentioned impedance circuit be equivalent to open circuit when static mode of operation.
The method of 14. amplifying signals according to claim 13, is characterized in that, when above-mentioned amplifier circuit is in above-mentioned static mode of operation, above-mentioned voltage difference determined by the cross-pressure on above-mentioned constant-current circuit.
The method of 15. amplifying signals according to claim 14, is characterized in that, when above-mentioned amplifier circuit is in above-mentioned dynamic operation mode, above-mentioned mapping electric current is greater than above-mentionedly determines electric current, makes above-mentioned variable current flow through above-mentioned impedance circuit.
The method of 16. amplifying signals according to claim 15, is characterized in that, when above-mentioned amplifier circuit is in dynamic duty, above-mentioned voltage difference determined by the cross-pressure on above-mentioned impedance circuit.
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| CN112532192A (en) * | 2019-09-19 | 2021-03-19 | 创意电子股份有限公司 | Amplifier device and offset cancellation method |
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| CN102566638A (en) * | 2010-12-08 | 2012-07-11 | 联发科技（新加坡）私人有限公司 | Regulator with high psrr |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112532192A (en) * | 2019-09-19 | 2021-03-19 | 创意电子股份有限公司 | Amplifier device and offset cancellation method |
| CN112532192B (en) * | 2019-09-19 | 2023-10-13 | 创意电子股份有限公司 | Amplifier apparatus and offset canceling method |
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