CN104407463A - Manufacturing method of pixel structure and manufacturing method of liquid crystal display panel - Google Patents
Manufacturing method of pixel structure and manufacturing method of liquid crystal display panel Download PDFInfo
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- CN104407463A CN104407463A CN201410733936.5A CN201410733936A CN104407463A CN 104407463 A CN104407463 A CN 104407463A CN 201410733936 A CN201410733936 A CN 201410733936A CN 104407463 A CN104407463 A CN 104407463A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 42
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 7
- 238000000034 method Methods 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 238000009413 insulation Methods 0.000 claims description 64
- 238000000059 patterning Methods 0.000 claims description 30
- 229910052751 metal Inorganic materials 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 16
- 239000010409 thin film Substances 0.000 claims description 9
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 3
- 229920005591 polysilicon Polymers 0.000 claims description 3
- HKBLLJHFVVWMTK-UHFFFAOYSA-N alumane;titanium Chemical compound [AlH3].[Ti].[Ti] HKBLLJHFVVWMTK-UHFFFAOYSA-N 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 230000005684 electric field Effects 0.000 description 3
- 238000005265 energy consumption Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000003487 electrochemical reaction Methods 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133357—Planarisation layers
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Thin Film Transistor (AREA)
Abstract
A method for manufacturing a pixel structure and a liquid crystal display panel includes forming a channel, a gate insulating layer, a first patterned conductive layer, a first insulating layer and a second patterned conductive layer on a substrate, the first patterned conductive layer including a gate, the second patterned conductive layer including a source and a drain, the source, the gate and the drain being electrically connected to the channel, forming a second insulating layer over the substrate to cover the drain, forming a patterned planarization layer on the second insulating layer, the patterned planarization layer having a first contact window, the first contact window exposing the second insulating layer, removing a portion of the second insulating layer in the first contact window to form a second contact window, the second contact window exposing the drain, and forming a pixel electrode on the patterned planarization layer, the pixel electrode being electrically connected to the drain through the second contact window.
Description
Technical field
The invention relates to a kind of manufacture method of display device, and particularly about a kind of manufacture method of dot structure and the manufacture method of display panels.
Background technology
Along with the development of display science and technology, liquid crystal indicator has more and more been popularized in the life of people.While lcd technology is extensively employed, people are also more and more higher for the requirement of the quality (being such as wide viewing angle, high-res, low energy consumption etc.) of lcd technology.In the lcd technology developed in the recent period, the boundary electric field with advantages such as wide viewing angle, high transmission rate, reaction are quick switches (Fringe FieldSwitching, FFS) technology also one of major technique becoming development.
But, while resolution promotes, also represent reducing of dot structure.Therefore each element the region that can configure also reduce thereupon.Thus, be easy to cause because of fabrication error unexpected in conductive material be exposed and be oxidized, finally make resistance value increase and reduce the display quality of display device.
Summary of the invention
For achieving the above object, the invention provides a kind of manufacture method of dot structure, comprise: form a passage, a gate insulation layer, one first patterned conductive layer, one first insulation course and one second patterned conductive layer on a substrate, wherein this first patterned conductive layer comprises a grid, this second patterned conductive layer comprises one source pole and a drain electrode, and this source electrode and this drain electrode are electrically connected this passage and form a thin film transistor (TFT) with this grid; Square one-tenth one second insulation course is to cover this drain electrode on the substrate; This second insulation course is formed a patterning flatness layer, and wherein this patterning flatness layer has one first contact hole, and this first contact hole exposes this second insulation course; Remove part and be positioned at this second insulation course of this first contact hole to form one second contact hole, wherein this second contact hole exposes this drain electrode; And a pixel electrode is formed on this patterning flatness layer, wherein this pixel electrode is electrically connected this drain electrode by this second contact hole.
The manufacture method of above-mentioned dot structure, wherein this pixel electrode has multiple electrode strip be electrically connected to each other, formation this patterning flatness layer after with remove part be positioned at this second insulation course of this first contact hole before, more comprise: on this patterning flatness layer, form a common electrode; And one the 3rd insulation course is formed above this patterning flatness layer, wherein the 3rd insulation course covers this common electrode and has one the 3rd contact hole, and the 3rd contact hole exposes this second contact hole.
The manufacture method of above-mentioned dot structure, wherein this second contact hole and the 3rd contact hole are for be formed simultaneously.
The manufacture method of above-mentioned dot structure, wherein to have a protuberance overlapping with this side surface of this drain electrode for the 3rd insulation course of one of this drain electrode contiguous side surface, and this first contact hole exposes this side surface of this drain electrode.
The manufacture method of above-mentioned dot structure, wherein the outer side edges of one of this passage side surface is the outer side edges of this side surface trimmed in this drain electrode at the most, and this side surface of this passage does not extend one of this first contact hole edge.
The manufacture method of above-mentioned dot structure, wherein the material of this passage is polysilicon, and this second patterned conductive layer is the complex metal layer of titanium-aluminium-titanium, and the material of this second insulation course is silicon nitride.
The manufacture method of above-mentioned dot structure, wherein the thickness of this second insulation course is 30 nanometer to 50 nanometers.
The manufacture method of above-mentioned dot structure, wherein this first patterned conductive layer more comprises scan line, and this sweep trace connects this grid, and this second patterned conductive layer more comprises a data line, and this data line connects this source electrode.
For achieving the above object, the present invention also provides a kind of manufacture method of display panels, comprising: form multiple dot structure with the manufacture method of above-mentioned dot structure; One subtend substrate is provided; And provide a liquid crystal layer between those dot structures and this subtend substrate.
The manufacture method of above-mentioned display panels, wherein respectively this pixel electrode has multiple electrode strip be electrically connected to each other, formation this patterning flatness layer after with remove part be positioned at this second insulation course of this first contact hole before, more comprise: on this patterning flatness layer, form a common electrode; And one the 3rd insulation course is formed above this patterning flatness layer, wherein the 3rd insulation course covers this common electrode and has one the 3rd contact hole, and the 3rd contact hole exposes this second contact hole, this second contact hole and the 3rd contact hole are for be formed simultaneously, it is overlapping with this side surface of this drain electrode that 3rd insulation course of one of this drain electrode contiguous side surface has a protuberance, and this first contact hole exposes this side surface of this drain electrode.
Based on above-mentioned, in the manufacture method of dot structure of the present invention and display panels, because first form the second insulation course to form pixel electrode again, it is hereby ensured that the second patterned conductive layer can not unpredictably be exposed.So, between the second patterned conductive layer and pixel electrode, there is good electric connection, and then obtain low energy consumption, display panels that display quality is good.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate appended accompanying drawing to be described in detail below.
Accompanying drawing explanation
Figure 1A to Fig. 1 E is the schematic top plan view of the manufacturing process of the dot structure of the first embodiment of the present invention;
Fig. 2 A to Fig. 2 E is the diagrammatic cross-section of the dot structure corresponding to Figure 1A to Fig. 1 E section line I1-I1 ' separately;
Fig. 3 is the sectional view of dot structure in another embodiment of the present invention;
Fig. 4 is the sectional view according to Fig. 1 E section line I2-I2 ';
Fig. 5 is the schematic diagram of multiple dot structures of the first embodiment of the present invention;
Fig. 6 is the schematic diagram of multiple dot structures of other embodiments of the present invention;
Fig. 7 A is the schematic diagram of the dot structure of the second embodiment of the present invention;
Fig. 7 B is according to the sectional view of Fig. 7 A section line I3-I3 ';
Fig. 8 is the sectional view of the display panels manufactured by the manufacture method of the display panels of one embodiment of the invention.
Wherein, Reference numeral:
I1-I1 ', I2-I2 ', I3-I3 ': profile line 100,400: dot structure
102: cushion 110: substrate
120: passage 120S, 166S: side surface
130: gate insulation layer 140: the first patterned conductive layer
142: grid 150: the first insulation course
152,154: through hole 160: source electrode
161: the first metal layer 162: the second metal level
163: the three metal level 164: the second patterned conductive layers
166: drain electrode 166T: upper surface
170: the second insulation course 172: the second contact holes
180,480: patterning flatness layer 182,482: the first contact hole
182S: edge 200: thin film transistor (TFT)
210,410: pixel electrode 212: electrode strip
220: common electrode 222: opening
230: the three insulation course 232: the three contact holes
234A, 234B: protuberance 324: wire
340: sweep trace 360: data line
500: display panels 510: subtend substrate
520: liquid crystal layer
Embodiment
Figure 1A to Fig. 1 E is the schematic top plan view of the manufacturing process of the dot structure of the first embodiment of the present invention.Fig. 2 A to Fig. 2 E is the diagrammatic cross-section of the dot structure corresponding to Figure 1A to Fig. 1 E section line I1-I1 ' separately.It should be noted that, in order to each component of clear expression dot structure in Fig. 2 A to Fig. 2 E, the material layer of part only illustrates its position of opening to represent.Please refer to Figure 1A and Fig. 2 A, in the manufacture method of the dot structure of the present embodiment, is first on substrate 110, form passage 120, gate insulation layer 130, first patterned conductive layer 140, first insulation course 150 and the second patterned conductive layer 164.Second patterned conductive layer 164 illustrate system by the first metal layer 161, second metal level 162 and the 3rd metal level 163 sequentially stacking and formed, the material citing of the first metal layer 161 and the 3rd metal level 163 is titanium, the material citing of the second metal level 162 is aluminium, and the second metal level 162 is between the first metal layer 161 and the 3rd metal level 163 and be in contact with it.
First patterned conductive layer 140 comprises grid 142, and the second patterned conductive layer 164 comprises source electrode 160 and drain electrode 166, and source electrode 160 is electrically connected passage 120 with drain electrode 166 and forms thin film transistor (TFT) 200 with grid.In the present embodiment, drain electrode 166 is electrically connected via the through hole 152 that the first insulation course 150 is formed and passage 120, source electrode 160 is electrically connected via the through hole 154 that the first insulation course 150 is formed and passage 120, and wherein gate insulation layer 130 also forms through hole at the correspondence position of above-mentioned through hole passage 120 166 to be electrically connected with draining with source electrode 160 separately.In the present embodiment, the material of passage 120 is such as polysilicon, but also can be other semiconductor materials.In the present embodiment, before forming passage 120, substrate 110 more can optionally form cushion 102, and thin film transistor (TFT) 200 is positioned on cushion 102.Cushion 102 can avoid the ion diffuse in substrate 110 to change its electrical specification to passage 120, to guarantee the fiduciary level of thin film transistor (TFT) 200.Separately it should be noted that, the present embodiment is for the thin film transistor (TFT) 200 of top grid (topgate) kenel of passage 120 between substrate 110 and grid 142, but the present invention also can apply the thin film transistor (TFT) of bottom-gate (bottom gate) kenel or other kenels.
Please refer to Figure 1B and Fig. 2 B, above substrate 110, then form one second insulation course 170 to cover drain electrode 166.In the present embodiment, the second insulation course 170 is formed in all sidedly above substrate 110 and covers above-mentioned thin film transistor (TFT) 200, second patterned conductive layer 164 and the first insulation course 150, but the present invention is not limited thereto.In the present embodiment, the material of the second insulation course 170 is such as silicon nitride, and the thickness of the second insulation course 170 is such as 30 nanometer to 100 nanometers, is preferably 30 nanometer to 50 nanometers, but the present invention is not limited thereto.
Please refer to Fig. 1 C and Fig. 2 C, the second insulation course 170 forms patterning flatness layer 180, and patterning flatness layer 180 has the first contact hole 182, first contact hole 182 exposes the second insulation course 170.Promote and process degree to take into account resolution, the size of first contact hole 182 of the present embodiment likely cannot reduce too much and expose the side surface 166S of drain electrode 166, but the present invention is not limited to this.Certainly, the size of the first contact hole 182 is also likely designed to only to expose in the ideal case the upper surface 166T of drain electrode 166 and does not expose the side surface 166S of drain electrode 166, but finally exposes the side surface 166S of drain electrode 166 because of fabrication error.
Please refer to Fig. 1 D and Fig. 2 D, then remove part and be positioned at the second insulation course 170 of the first contact hole 182 to form the second contact hole 172, wherein the second contact hole 172 exposes drain electrode 166, particularly only exposes the upper surface 166T of drain electrode 166 and does not expose the side surface 166S of drain electrode 166.In the present embodiment, remove the second insulation course 170 that part is positioned at the first contact hole 182 with before forming the second contact hole 172, more optionally on patterning flatness layer 180, form the 3rd insulation course 230 comprehensively, and the 3rd contact hole 232 is formed while formation second contact hole 172, it exposes the second contact hole 172.In other words, the second contact hole 172 can utilize with the 3rd contact hole 232 and be formed with lithography technique, can not increase process costs.The material citing system of the 3rd insulation course 230 is different from the material of patterning flatness layer 180.The material of the 3rd insulation course 230 is such as silicon nitride, and the material of patterning flatness layer 180 is such as organic material.
Please refer to Fig. 1 E and Fig. 2 E, then on patterning flatness layer 180, form pixel electrode 210, wherein pixel electrode 210 is inserted the second contact hole 172 and is electrically connected drain electrode 166.Fig. 3 is the sectional view of dot structure in another embodiment of the present invention.In Fig. 2 E, the 3rd insulation course 230 of the side surface 166S of this drain electrode 166 contiguous has the protuberance 234A overlapping with this side surface 166S, and specifically, protuberance 234A has arcuation upper surface.
Please refer to Fig. 3, different from Fig. 2 E, in the present embodiment, it is overlapping with side surface 166S that the 3rd insulation course 230 of the side surface 166S of adjacent drains 166 has protuberance 234B, and protuberance 234B has smooth upper surface.On the other hand, in the present embodiment, the outer side edges of the side surface 120S of passage 120 is the outer side edges of the side surface 166S trimmed in drain electrode 166 at the most, and the side surface 120S of passage 120 does not extend the edge 182S of the first contact hole 182.In the present embodiment, the edge 182S of the first contact hole 182 refers to the first contact hole 182 outermost and has the edge extent of maximum perimeter.
From the above, by the second insulation course 170 to the covering of drain electrode 166, pixel electrode 210 can be avoided unpredictably to touch the side surface 166S of drain electrode 166.Specifically, because the second metal level 162 has preferably electric conductivity, but also easy produce when contacting pixel electrode 210 be such as oxidation electrochemical reaction and improve both contact impedance, therefore the second insulation course 170 can avoid the second metal level 162 be exposed in the edge of drain electrode 166 and directly contact pixel electrode 210, the resistance value between pixel electrode 210 and drain electrode 166 is caused to increase.That is, the second insulation course 170 is formed and the second contact hole 172 can make to form good electric connection between drain electrode 166 and pixel electrode 210.
Next referring again to Fig. 1 E, in the present embodiment, the first patterned conductive layer 140 more comprises sweep trace 340, and sweep trace 340 is electrically connected grid 142, and in the present embodiment, grid 142 citing is the some of sweep trace 340.Second patterned conductive layer 164 more comprises data line 360, and data line 360 is electrically connected source electrode 160, and in the present embodiment, source electrode 160 citing is the some of data line 360.
Fig. 4 is the sectional view drawn according to Fig. 1 E section line I2-I2 '.Please also refer to Fig. 1 E and Fig. 4, in the present embodiment, after forming patterning flatness layer 180 and before forming the 3rd insulation course 230, patterning flatness layer 180 forms common electrode 220.Specifically, the method system forming common electrode 220 first forms common electrode material layer (not illustrating) on patterning flatness layer 180 comprehensively, next just patterning common electrode material layer is to form the common electrode 220 with multiple opening 222, and these openings 222 expose drain electrode 166 separately.The material citing of common electrode 220 and pixel electrode 210 is the transparent conductive materials such as tin indium oxide, but is not limited to this, and also viewable design demand adopts the material containing metal.Specifically, first contact hole 182, second contact hole 172 and the 3rd contact hole 232 are positioned at the scope of opening 222 all completely, by the setting of opening 222, pixel electrode 210 can't touch common electrode 220 when being electrically connected drain electrode 166, that is pixel electrode 210 is isolated from each other with common electrode 220 and does not contact, therefore pixel electrode 210 and common electrode 220 can have different potentials respectively and produce electric field between.In the present embodiment, pixel electrode 210 has multiple electrode strip 212 be electrically connected to each other, and so as to producing the higher electric field change of density with common electrode 220, but the present invention is not limited to this.
The manufacture method of the dot structure of the present embodiment can produce marginal field suitching type (Fringe FieldSwitching, the dot structure of display panels FFS), and the small dot structure 100 needed for high-res can be produced by the design of the second insulation course 170 and the second contact hole 172, possess again good electric connection simultaneously.
Fig. 5 is the schematic diagram of multiple dot structures of the first embodiment of the present invention.Fig. 6 is the schematic diagram of multiple dot structures of other embodiments of the present invention.Please refer to Fig. 5, specifically, in the first embodiment of the present invention, common electrode 220 is comprehensively formed in above substrate 110, and common electrode 220 has multiple opening 222.Please refer to Fig. 6, in this embodiment, the common electrode 220 corresponding to each dot structure 100, except having multiple opening 222, more exposes the some of data line 360 and/or sweep trace 340.
Fig. 7 A is the schematic diagram of the dot structure of the second embodiment of the present invention.Fig. 7 B is according to the sectional view of Fig. 7 A section line I3-I3 '.Please refer to Fig. 7 A and Fig. 7 B, dot structure 400 made by the second embodiment of the present invention is similar to the dot structure 100 made by the first embodiment of the invention described above, and only difference is that the side surface 166S of drain electrode 166 does not come out by the position of the first contact hole 482 that patterning flatness layer 480 is formed completely.In other embodiments, each pixel electrode 410 also can have one to multiple electrode strip.From describing of the above-mentioned dot structure 100 about the first embodiment and the second embodiment and dot structure 400, the dot structure that embodiments of the invention provide is because have the setting of the second insulation course 170, drain electrode 166 only can expose by the second contact hole 172, and no matter whether the position of the first contact hole 182 offset drain electrode 166 and pixel electrode 210,410 can be allowed to have good electric connection.
Fig. 8 is the sectional view of the display panels manufactured by the manufacture method of the display panels of one embodiment of the invention.Please refer to Fig. 8, in the present embodiment, be to provide with the multiple dot structures made by the manufacture method of the various embodiments described above, for convenience of description, below for the dot structure 100 of Fig. 2 E.In the present embodiment, the manufacture method of display panels 500 also comprises provides a liquid crystal layer 520 between dot structure 100 and subtend substrate 510.In the present embodiment, owing to forming the second insulation course 170 and the second contact hole 172, the dot structure 100 formed can guarantee that pixel electrode 210 and drain electrode 166 have good electric connection, and the display panels 500 therefore produced can provide good display frame.
In sum, in the dot structure of embodiments of the invention and the manufacture method of display panels, the second patterned conductive layer that first contact hole exposes can avoid the second patterned conductive layer over-exposure via the covering of the second insulation course, and then makes the second patterned conductive layer and pixel electrode have good electric connection.Therefore, low energy consumption can be produced and the good display panels of display quality.
Although the present invention discloses as above with embodiment; so itself and be not used to limit the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when being as the criterion with claims.
Claims (10)
1. a manufacture method for dot structure, is characterized in that, comprising:
Form a passage, a gate insulation layer, one first patterned conductive layer, one first insulation course and one second patterned conductive layer on a substrate, wherein this first patterned conductive layer comprises a grid, this second patterned conductive layer comprises one source pole and a drain electrode, and this source electrode and this drain electrode are electrically connected this passage and form a thin film transistor (TFT) with this grid;
Square one-tenth one second insulation course is to cover this drain electrode on the substrate;
This second insulation course is formed a patterning flatness layer, and wherein this patterning flatness layer has one first contact hole, and this first contact hole exposes this second insulation course;
Remove part and be positioned at this second insulation course of this first contact hole to form one second contact hole, wherein this second contact hole exposes this drain electrode; And
This patterning flatness layer forms a pixel electrode, and wherein this pixel electrode is electrically connected this drain electrode by this second contact hole.
2. the manufacture method of dot structure as claimed in claim 1, it is characterized in that, wherein this pixel electrode has multiple electrode strip be electrically connected to each other, formation this patterning flatness layer after with remove part be positioned at this second insulation course of this first contact hole before, more comprise:
This patterning flatness layer forms a common electrode; And
Above this patterning flatness layer, form one the 3rd insulation course, wherein the 3rd insulation course covers this common electrode and has one the 3rd contact hole, and the 3rd contact hole exposes this second contact hole.
3. the manufacture method of dot structure as claimed in claim 2, it is characterized in that, wherein this second contact hole and the 3rd contact hole are for be formed simultaneously.
4. the manufacture method of dot structure as claimed in claim 3, is characterized in that, wherein to have a protuberance overlapping with this side surface of this drain electrode for the 3rd insulation course of one of this drain electrode contiguous side surface, and this first contact hole exposes this side surface of this drain electrode.
5. the manufacture method of dot structure as claimed in claim 4, it is characterized in that, wherein the outer side edges of one of this passage side surface is the outer side edges of this side surface trimmed in this drain electrode at the most, and this side surface of this passage does not extend one of this first contact hole edge.
6. the manufacture method of dot structure as claimed in claim 1, it is characterized in that, wherein the material of this passage is polysilicon, and this second patterned conductive layer is the complex metal layer of titanium-aluminium-titanium, and the material of this second insulation course is silicon nitride.
7. the manufacture method of dot structure as claimed in claim 1, it is characterized in that, wherein the thickness of this second insulation course is 30 nanometer to 50 nanometers.
8. the manufacture method of dot structure as claimed in claim 1, it is characterized in that, wherein this first patterned conductive layer more comprises scan line, and this sweep trace connects this grid, and this second patterned conductive layer more comprises a data line, and this data line connects this source electrode.
9. a manufacture method for display panels, is characterized in that, comprising:
Multiple dot structure is formed with the manufacture method of dot structure as claimed in claim 1;
One subtend substrate is provided; And
There is provided a liquid crystal layer between those dot structures and this subtend substrate.
10. the manufacture method of display panels as claimed in claim 9, it is characterized in that, wherein respectively this pixel electrode has multiple electrode strip be electrically connected to each other, formation this patterning flatness layer after with remove part be positioned at this second insulation course of this first contact hole before, more comprise:
This patterning flatness layer forms a common electrode; And
One the 3rd insulation course is formed above this patterning flatness layer, wherein the 3rd insulation course covers this common electrode and has one the 3rd contact hole, and the 3rd contact hole exposes this second contact hole, this second contact hole and the 3rd contact hole are for be formed simultaneously, it is overlapping with this side surface of this drain electrode that 3rd insulation course of one of this drain electrode contiguous side surface has a protuberance, and this first contact hole exposes this side surface of this drain electrode.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
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| TW103133734 | 2014-09-29 | ||
| TW103133734A TW201612606A (en) | 2014-09-29 | 2014-09-29 | Fabricating methods of pixel structure and liquid crystal display panel |
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| CN104407463A true CN104407463A (en) | 2015-03-11 |
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| CN111584522A (en) * | 2020-05-25 | 2020-08-25 | 成都中电熊猫显示科技有限公司 | Array substrate, manufacturing method thereof and display panel |
| CN113889576A (en) * | 2021-01-25 | 2022-01-04 | 友达光电股份有限公司 | Organic semiconductor substrate |
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| TWI694292B (en) * | 2019-03-04 | 2020-05-21 | 友達光電股份有限公司 | Display panel |
| TWI778352B (en) * | 2020-04-15 | 2022-09-21 | 友達光電股份有限公司 | Pixel structure |
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| TW201612606A (en) | 2016-04-01 |
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