CN104370270B - A kind of accurate positioning is for the method for monox nanometer island array - Google Patents

A kind of accurate positioning is for the method for monox nanometer island array Download PDF

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CN104370270B
CN104370270B CN201410667606.0A CN201410667606A CN104370270B CN 104370270 B CN104370270 B CN 104370270B CN 201410667606 A CN201410667606 A CN 201410667606A CN 104370270 B CN104370270 B CN 104370270B
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corrosion
sio
window
time
carry out
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CN104370270A (en
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戴鹏飞
李铁
高安然
鲁娜
王跃林
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Shanghai Institute of Microsystem and Information Technology of CAS
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Shanghai Institute of Microsystem and Information Technology of CAS
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Abstract

The present invention relates to the method for a kind of accurate positioning for monox nanometer island array, it is characterized in that described method is to utilize sacrifice layer corrosion technology, use contact exposure photoetching and wet corrosion technique, by third photo etching technique with carry out three BOE etching process preparations. The present invention is on the basis of tradition " from top to bottom " method, in conjunction with unique design, directly do not write by means of electron beam or FIB, only accurately control ground sacrifice layer corrosion technology with the combination of contact exposure technology, realized the accurate location processing and manufacturing of monox nanometer island array. Method deft design, technique is simple, and cost of manufacture is low, is easy to manufacture in batches.

Description

A kind of accurate positioning is for the method for monox nanometer island array
Technical field
The present invention relates to a kind of method of preparing monox nanometer island array, the present invention relates to or rather onePlant the method for accurate positioning for monox nanometer island array, belong to technical field of semiconductors.
Background technology
Nanometer technology refers to research electronics, atom and other classes in nanoscale space (1nm~100nm)Type motion of matter rule, interaction and characteristic, and in this range scale, atom, molecule etc. are carried outHandle and processing, and in application, realize the science and technology of the multidisciplinary intersection of peculiar function and intelligence effect.In the time that a kind of structure of material enters nanoscale features scope, its certain or some characteristic can showWork changes, and shows the specific physical effect that many body materials do not have, and makes nanometer technology become researchFocus.
Nanofabrication technique is the important branch of nanometer technology, and the method for preparing at present nano material mainly canTo be divided into two classes. One is " from bottom to top " method (bottom-up), adopt chemical vapor deposition,The method such as physical vapor deposition, laser ablation, random on large-area substrate under catalyst auxiliaryGround or part directionally grow nano material. This processing mode takes full advantage of the spy of material selfPoint, can realize the isoparametric accurate control of structure, size to device in theory. But the method processingEfficiency is relatively low, repeatable poor, and operation inconvenience, is difficult to location, can not meet large-scale integratedThe requirement of manufacturing. Another kind is " from top to bottom " method (top-down), adopts and is similar to traditionThe process of integrated circuit make nano material. This method is the material layer preparingUpper, by modes such as photoetching, etching and depositions, produce needed figure. The advantage of this methodBe that manufacture craft accuracy is higher, the size of nano wire is convenient to control, and figure accurate positioning. But passThe processing technology of system is difficult to further improve because the inherent characteristic of light source makes the precision of its processing, at presentThe nano graph that adopts " from top to bottom " to make adopts electron beam or FIB exposure more, thusThe deficiency of bringing is cost of manufacture costliness, and production efficiency is low, is unfavorable for batch production. And the present invention intends profitWith accurate controlled sacrifice layer corrosion technology, design a kind of technique simple, cost of manufacture is low, is easy to criticizeThe nanoprocessing method that amount is manufactured,, by means of electron beam or FIB exposure, can not realize sizeThe processing and manufacturing of controlled monox nanometer island array.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of accurately positioningThe method of standby monox nanometer island array is also that the present invention proposes one and utilizes sacrifice layer corrosion technology accuratePositioningly prepare the method for monox nanometer island array. This method is in tradition " from top to bottom " methodOn basis, in conjunction with unique design,, by means of electron beam or FIB exposure, only do not use contactExposure technique, in conjunction with the sacrifice layer corrosion technology of accurately controlling, has been realized the accurate of monox nanometer island arrayLocation processing and manufacturing. This method deft design, technique is simple, and cost of manufacture is low, is easy to manufacture in batches,Manufacture and have laid a good foundation for the extensive accurately location of silicon nano material.
Described method is to utilize sacrifice layer corrosion technology, uses contact exposure photoetching and wet etching workSkill, by third photo etching technique with carry out the preparation of three BOE etching process.
Specifically, method of the present invention specifically comprises the steps: that list is thrown to sheet puts into oxidation furnaceIn, use thermal oxidation process growth one deck silica (SiO2) film; Carry out photoetching process, define micro-The array of the other figure of meter level; Carry out BOE (bufferedoxideetching) etching process, remove not byThe oxide layer film of photoresist protection, prepares the array of micron level silica figure; Again carry outPhotoetching process defines a corrosion slightly less than figure in the micron level silica graphics field of having preparedWindow; Again carry out BOE etching process, by the sacrifice layer corrosion of accurate control, prepare oxidationSilicon nanowires; Again carry out photoetching process, on the silica white nano-wire of having prepared, define corrosion window;Again carry out BOE etching process, by the sacrifice layer corrosion of accurate control, prepare monox nanometerIsland array. The method of preparing monox nanometer island array provided by the present invention is to utilize connecing of micron precisionTouch exposure photoetching technology, in conjunction with the sacrifice layer corrosion technology of accurately controlling, accurately positioningly preparation oxidationSilicon nano island array, specific design is accurate, technique is simple, cost of manufacture is low, and can manufacture in batches excellentPoint.
Realizing technical scheme of the present invention is:
1) provide single silicon chip of throwing;
2) SiO that grows on described silicon chip2Film;
3) carry out photoetching process for the first time, by described SiO2Film pattern, forms the first corrosion window;
4) carry out BOE etching process, remove the SiO exposing along the first corrosion window2Film, corrosion finishesRear removal photoresist;
5) carry out photoetching process for the second time, by remaining SiO2Film pattern, forms the second corrosion window;The second corrosion window is slightly less than the unexposed area in photoetching process for the first time;
6) carry out BOE etching process, remove the SiO exposing along the second corrosion window2Film, and continue intoRow sacrifice layer corrosion for the first time, forms SiO2Nano wire, corrosion finishes rear removal photoresist;
7) carry out photoetching process for the third time, by SiO2Nano wire is graphical, forms the 3rd corrosion window;
8) carry out BOE etching process, remove the SiO exposing along the 3rd corrosion window2, and proceedSecondary sacrifice layer corrosion, forms SiO2Nano island array, corrosion finishes rear removal photoresist.
Preferably, described step 2) SiO2Film thickness is 18-22nm.
Preferably, step 3 described in described step), 5), 7) in photoetching process be contact exposure lightCarve, described step 4), 6), 8) in BOE etching process be the wet corrosion technique under normal temperature.
Preferably, described step 4) in the BOE etching process time be 20s-40s.
Preferably, described step 5) on the second corrosion window lower limb apart from SiO2Film edge is 0.8 μm-1.2μm。
Preferably, described step 6) in the sacrifice layer corrosion time is 12-15min for the first time.
Preferably, described step 7) in the 3rd corrosion window be 1 × 6 corrosion window array, corrosion window battle arraySingle window size 2 μ m × 6 μ m in row, adjacent window apertures spacing 2 μ m.
Preferably, described step 8) in the sacrifice layer corrosion time is 10-12min for the second time.
The present invention tradition " from top to bottom " method basis on, in conjunction with unique design, not by means ofElectron beam or FIB exposure, only accurately control ground sacrifice layer corrosion with the combination of contact exposure technologyTechnology, the method for preparing monox nanometer island array provided by the present invention is to utilize the contact of micron precisionFormula exposure photoetching technology, in conjunction with the sacrifice layer corrosion technology of accurately controlling, accurately positioningly prepares silicaNano island array, specific design is accurate, technique is simple, cost of manufacture is low, and the advantage that can manufacture in batches.
Brief description of the drawings
Fig. 1 is shown as process flow diagram of the present invention.
Wherein, figure a shows it is to have grown to have 20nmSiO2Single silicon chip schematic diagram of throwing of film.
Figure b is shown as through photoetching for the first time with after the BOE corrosion of the first corrosion window, residue SiO2The schematic diagram of film.
Figure c is shown as the second corrosion window schematic diagram that photoetching for the second time forms.
Figure d is shown as for the first time and forms SiO after sacrifice layer corrosion2The structural representation of nano wire.
Figure e is shown as the 3rd corrosion window schematic diagram that photoetching for the third time forms.
Figure f is shown as for the second time and forms SiO after sacrifice layer corrosion2The structural representation of nano island array.
Fig. 2 is shown as SEM and the AFM token image of monox nanometer island array prepared by the present invention.
Wherein, a is shown as the SEM image of the monox nanometer island array of preparation, and b is shown as single oxygenThe SEM image on SiClx rectangle nanometer island.
C is shown as the AFM3D image on the single silica rectangle nanometer island of preparation.
Detailed description of the invention
By instantiation, embodiments of the present invention are described below, those skilled in the art can be illustrated by thisThe disclosed content of book is understood other advantages of the present invention and effect easily. The present invention can also be by anotherOuter different detailed description of the invention is implemented or is applied, and the every details in this description also can be based onDifferent viewpoints and application, carry out various modifications or change not deviating under spirit of the present invention.
Refer to shown in accompanying drawing. It should be noted that, the diagram providing in the present embodiment is only with the side of signalFormula illustrates basic conception of the present invention, satisfy only show with assembly relevant in the present invention in graphic but not according toComponent count, shape and size when actual enforcement are drawn, kenel, the number of each assembly when its actual enforcementAmount and ratio can be a kind of random change, and its assembly layout kenel also may be more complicated.
Embodiment
Embodiment 1: adopt following steps on silicon list throwing sheet:
A) silicon list is thrown to sheet and be placed in thermal oxidation furnace;
B) growth one deck SiO2Film, film thickness is 20nm;
C) carry out photoetching process, define the rectangular graph array of 40 μ m × 10 μ m;
D) carry out normal temperature BOE etching process, remove the oxide layer film of not protected by photoresist, etching time is30s, removes the photoresist on silicon chip after corrosion;
E) carry out photoetching process, in the micron level silica graphics field of having prepared, define one 30 μ m × 8 μ mCorrosion window, on window, lower limb is 1 μ m apart from silica pattern edge;
F) carry out normal temperature BOE etching process, by the sacrifice layer corrosion of accurate control, prepare silica and receiveRice noodles, etching time is 15min, removes the photoresist on silicon chip after corrosion;
G) carry out photoetching process, on the silica white nano-wire of having prepared, define 2 × 6 corrosion window arrays, singleIndividual window size is 2 μ m × 6 μ m, window pitch 2 μ m;
H) carry out BOE etching process, by the sacrifice layer corrosion of accurate control, prepare monox nanometer islandArray, etching time is 10min, removes the photoresist on silicon chip after corrosion.

Claims (8)

1. accurate positioning, for a method for monox nanometer island array, is characterized in that described methodBe to utilize sacrifice layer corrosion technology, use contact exposure photoetching and wet corrosion technique, by three timesPhotoetching process and carry out the preparation of three BOE etching process; Concrete steps are:
1) provide single silicon chip of throwing;
2) SiO that grows on described silicon chip2Film;
3) carry out photoetching process for the first time, by described SiO2Film pattern, forms the first corrosion window;
4) carry out BOE etching process, remove the SiO exposing along the first corrosion window2Film, corrosion knotAfter bundle, remove photoresist;
5) carry out photoetching process for the second time, by remaining SiO2Film pattern, forms the second corrosion window;The second corrosion window is slightly less than the unexposed area in photoetching process for the first time;
6) carry out BOE etching process, remove the SiO exposing along the second corrosion window2Film, and continueCarry out sacrifice layer corrosion for the first time, form SiO2Nano wire, corrosion finishes rear removal photoresist;
7) carry out photoetching process for the third time, by SiO2Nano wire is graphical, forms the 3rd corrosion window;
8) carry out BOE etching process, remove the SiO exposing along the 3rd corrosion window2, and proceedSacrifice layer corrosion for the second time, forms SiO2Nano island array, corrosion finishes rear removal photoresist;
Described step 3), 5), 7) in photoetching process be contact exposure photoetching, described step 4), 6),8) the BOE etching process in is the wet corrosion technique under normal temperature.
2. method according to claim 1, is characterized in that step 2) described SiO2Film is thickDegree is 18-22nm.
3. method according to claim 1, is characterized in that described step 4) middle BOE corrosion workThe time of skill is 20s-40s.
4. method according to claim 1, is characterized in that described step 5) in second corrosion windowThe upper lower limb of mouth is apart from SiO2Film edge is 0.8 μ m-1.2 μ m.
5. method according to claim 1, is characterized in that described step 6) in for the first time sacrificeLayer etching time is 12-15min.
6. method according to claim 1, is characterized in that described step 7) in the 3rd corrosion windowMouth is 1 × 6 corrosion window array.
7. in accordance with the method for claim 6, it is characterized in that single window chi in corrosion window arrayVery little is 2 μ m × 6 μ m, adjacent window apertures spacing 2 μ m.
8. method according to claim 1, is characterized in that, described step 8) in sacrificial for the second timeDomestic animal layer etching time is 10-12min.
CN201410667606.0A 2014-11-20 2014-11-20 A kind of accurate positioning is for the method for monox nanometer island array Active CN104370270B (en)

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CN101305280A (en) * 2005-06-10 2008-11-12 吉卢比有限公司 Diagnostic-nanosensor and its use in medicine
CN102142362A (en) * 2010-02-02 2011-08-03 中国科学院上海微***与信息技术研究所 Method for photoetching by using electrophoretic deposition pattern of metallic compound
CN102398889A (en) * 2011-09-30 2012-04-04 中国科学院上海微***与信息技术研究所 Method for preparing nanostructure on surface of (100) silicon-on-insulator (SOI) chip from top to bottom
CN102983212A (en) * 2012-11-06 2013-03-20 华南师范大学 Preparation method for crystalline silicon solar cell nanometer transparent buried gate electrode
CN103030096A (en) * 2011-10-09 2013-04-10 中国科学院高能物理研究所 Silicon material with nano-structure surface and manufacturing method thereof

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KR100307310B1 (en) * 1999-01-27 2001-10-29 송자 Manufacturing method for nano-size diamond whisker
WO2008072498A1 (en) * 2006-12-13 2008-06-19 National Institute Of Advanced Industrial Science And Technology Mold for optical element, having nanostructure, mold for nanostructure, method for manufacturing the mold, and optical element

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101305280A (en) * 2005-06-10 2008-11-12 吉卢比有限公司 Diagnostic-nanosensor and its use in medicine
CN101086966A (en) * 2006-06-07 2007-12-12 中国科学院微电子研究所 A making method for nano coulomb structure
CN102142362A (en) * 2010-02-02 2011-08-03 中国科学院上海微***与信息技术研究所 Method for photoetching by using electrophoretic deposition pattern of metallic compound
CN102398889A (en) * 2011-09-30 2012-04-04 中国科学院上海微***与信息技术研究所 Method for preparing nanostructure on surface of (100) silicon-on-insulator (SOI) chip from top to bottom
CN103030096A (en) * 2011-10-09 2013-04-10 中国科学院高能物理研究所 Silicon material with nano-structure surface and manufacturing method thereof
CN102983212A (en) * 2012-11-06 2013-03-20 华南师范大学 Preparation method for crystalline silicon solar cell nanometer transparent buried gate electrode

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