CN104360968A - Data discrimination and pre-processing physical card and operation method as well as electric energy data processing system - Google Patents
Data discrimination and pre-processing physical card and operation method as well as electric energy data processing system Download PDFInfo
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Abstract
The invention relates to a data discrimination and pre-processing physical card and an operation method as well as an electric energy data processing system. The data discrimination and pre-treatment physical card comprises a PCIE transmission module, a digital signal processor, a programmable logic processor, an internal memory module, a high-speed buffer memory and a communication interface module. According to the invention, through the adoption of the technical scheme, under a high-concurrency and high-real-time environment, the programmable logic processor can complete the efficient logical analysis computation, and the digital signal processor can complete the high-real-time data communication as well as the control and management of the operation process, so that the requirements for high real-time performance, high concurrency and high transmission efficiency of mass data of backward stage systems such as a monitoring system, a programmed control system and a management system can be met; besides, through the control function of the digital signal processor, the business computational logic is not needed to be cured inside a chip, and the operations such as the update of the business computational logic can be completed through bundled software, so that the flexibility and maintainability of the expansion are improved, and the upgrade cost is reduced.
Description
Technical field
The present invention relates to data detection technical field, particularly relate to a kind of data and screen and pre-service physical card and operation method, energy data disposal system.
Background technology
For electricity consumption enterprise, the work under bad environment of measurement instrument, the interference such as noise, high temperature, pressure wave, electromagnetic wave, mechanical vibration is frequent, and the reliability and stability of real time energy consumption data decline thereupon, and measuring point easily catastrophic failure occurs.Adopt measurement data alignment technique so more and more in monitoring system, the appreciable error of real time energy consumption data is rejected and reconstructed.
Be in the Chinese patent application of 201310747977.5 at number of patent application, disclose a kind of data to screen and pre-service physical card, be intended to solve existing measurement data alignment technique system data transfer efficiency poor, inadequate to support that is concurrent, big data quantity, fully do not excavate the potential of computer hardware, carry out existing system transforming the dirigibility lacking expansion, and the technical matters that cost is higher.
But, there is following following defect in the technical scheme disclosed in this patented claim:
(1) under concurrent at height, high (transfer rate is MB/ millisecond) environment in real time, logical process chip has needed efficient logical analytical calculation, the controlling functions such as high real-time data communication have also been needed simultaneously, because these two kinds of data types are completely different, cannot solve by improving the process of programmable core process chip, thus form obvious performance bottleneck, the rear level systems such as supervisory system, stored program controlled, management system cannot be met to the requirement of the high real-time of mass data, high concurrency, high-transmission efficiency.
(2) in this technical scheme, hardware systems is single-chip microcomputer system, the equal burning of service computation logic is also solidificated in chip, if there is the situation that service computation logic cannot functionally meet the demands, its service computation logic need be upgraded, and upgrade and usually should will return factory with attended operation, and undertaken processing by complicated professional software system by hardware professional person and just can complete.Extensibility, maintainability are poor, cause the cost of system upgrade higher.
Summary of the invention
Based on this, be necessary for above-mentioned technical matters, there is provided a kind of data to screen and pre-service physical card and operation method, energy data disposal system, to meet requirement to the high real-time of mass data, high concurrency, high-transmission efficiency better, and improve extensibility, maintainable poor.
A kind of data are screened and pre-service physical card, comprising: PCIE transport module, digital signal processor, programmable logic processor, memory modules, cache memory, communication interface modules;
Described memory modules is built-in with algorithm register, result register and historical data memory field; Described cache memory carries out buffer memory to the data write of memory modules and reading;
Described PCIE transport module is connected with host machine by Standard PC IE interface, utilizes supporting driver to read energy data from host machine;
Described digital signal processor, energy data is gathered from host machine for control PCIE transport module, and being write historical data memory field, the data write of scheduling memory modules and the process of reading, the data in result register forward by dispatching communication interface module;
Described programmable logic processor, from algorithm register, obtain data according to configuration information and screen the logic number with Preprocessing Algorithm, corresponding logical calculated instruction is run according to logic number, read the history energy data in historical data memory field, history energy data and current energy data are analyzed, produce level and smooth sequence, level and smooth sequence and actual sequence are compared, judge that energy data that is abnormal and sudden change occurs in current energy data obtains logical calculated result, by described logical calculated result and described history energy data write result register,
Described communication interface modules, for by the data retransmission in result register to rear level system.
Above-mentioned data are screened and pre-service physical card, under concurrent at height, high real time environment, programmable logic processor can complete efficient logical analytical calculation, digital signal processor can complete control, the management of high real-time data communication and operational process, can meet the rear level systems such as supervisory system, stored program controlled, management system to the requirement of the high real-time of mass data, high concurrency, high-transmission efficiency.Meanwhile, by DSP CONTROL function, service computation logic, without the need to being solidificated in chip, by operations such as software kit finishing service computational logic renewals, can improve the dirigibility of expansion, maintainability, reduce upgrade cost.
Data screen the operation method with pre-service physical card, comprise the steps:
Step S11, described PCIE transport module reads energy data from host machine, write memory module, and trigger hardware IO look-at-me;
Step S21, described digital signal processor response IO look-at-me, by the specified memory address of each register data write memory module;
Step S22, described digital signal processor according to the operating instruction in Instruction Register list, the memory address of storage allocation module.And trigger hardware look-at-me;
Step S23, described digital signal processor starts the response performing next round IO look-at-me;
Step S31, described programmable logic processor response hardware interrupt, obtains data according to configuration information and screens the logic number with Preprocessing Algorithm from algorithm register;
Step S32, described programmable logic processor screens the logical calculated instruction corresponding with Preprocessing Algorithm according to logic number service data;
Step S33, described programmable logic processor reads the history energy data in historical data memory field according to logical calculated parallel instructions;
Step S34, described programmable logic processor is analyzed according to logical calculated instruction associating history energy data and current energy data, produce level and smooth sequence, level and smooth sequence and actual sequence are compared, judge energy data that is abnormal and sudden change occurs;
Step S35, described programmable logic processor is by logical calculated result and original history energy data write result register, and trigger hardware IO look-at-me;
Step S36, described programmable logic processor starts the response performing next round hardware interrupt;
Step S24, described digital signal processor response Hardware I/O look-at-me, the data in result register forward by dispatching communication interface module;
Step S25, described digital signal processor starts the response performing next round Hardware I/O look-at-me;
Step S41, the logical calculated result in result register and original history energy data are carried out periphery and are forwarded by described communication interface modules.
Above-mentioned data screen the operation method with pre-service physical card, energy data to be screened and in pre-service, digital signal processor and programmable logic processor cooperatively interact, complete the controlling functions such as efficient logical analytical calculation and high real-time data communication respectively, thus can meet the rear level systems such as supervisory system, stored program controlled, management system to the requirement of the high real-time of mass data, high concurrency, high-transmission efficiency.
A kind of energy data disposal system, comprises as above-mentioned data are screened and pre-service physical card; Wherein, described data are screened and are connected on electrical energy data acquiring equipment with pre-service physical card, or connect on rear class system server.
Above-mentioned energy data disposal system, is screened and pre-service physical card by above-mentioned data, can ensure to possess data acquisition and screen function under existing network infrastructure, under the prerequisite of guarantee data transmission real-time, correctness, high efficiency.
Accompanying drawing explanation
Fig. 1 is that the data of an embodiment screen the structural representation with pre-service physical card;
Fig. 2 is that the data of another embodiment screen the structural representation with pre-service physical card;
Fig. 3,4 is the structural representation of the embodiment of energy data disposal system of the present invention.
Embodiment
The data that the present invention proposes are screened and pre-service physical card, be directed in current power enterprise, the work under bad environment of measurement instrument, the interference such as noise, high temperature, pressure wave, electromagnetic wave, mechanical vibration is frequent, the reliability and stability of real time energy consumption data decline thereupon, easily there is catastrophic failure in measuring point, finally causes the problem of the result such as service computation mistake, decision analysis mistake.Adopt measurement data alignment technique, screen out and energy data that is abnormal and sudden change occurs, thus can realize rejecting the appreciable error of real time energy consumption data and reconstructing.
Shown in figure 1, Fig. 1 is that the data of an embodiment screen the structural representation with pre-service physical card, comprising: PCIE transport module, digital signal processor, programmable logic processor, memory modules, cache memory, communication interface modules.
Described memory modules is built-in with algorithm register, result register and historical data memory field; Described cache memory carries out buffer memory to the data write of memory modules and reading; Memory modules can be selected correspondence memory bar to realize according to actual needs, such as, and model MT47H64M16HR-3 IT:H, capacity 1024MB.
Described PCIE transport module is connected with host machine by Standard PC IE interface, utilizes supporting driver to read energy data from host machine; Preferably, described PCIE transport module can also obtain power supply from host machine.
Described digital signal processor, energy data is gathered from host machine for control PCIE transport module, and being write historical data memory field, the data write of scheduling memory modules and the process of reading, the data in result register forward by dispatching communication interface module; Digital signal processor can select DSP (Digital Signal Processor) chip to realize according to actual needs, such as, and the dsp chip of model TMS320C5000 series.
Described programmable logic processor, from algorithm register, obtain data according to configuration information to screen and the logic number of Preprocessing Algorithm (the corresponding corresponding algorithm of each logic number), corresponding logical calculated instruction is run according to logic number, read the history energy data in historical data memory field, history energy data and current energy data are analyzed, produce level and smooth sequence, level and smooth sequence and actual sequence are compared, judge that energy data that is abnormal and sudden change occurs in current energy data obtains logical calculated result, by described logical calculated result and described history energy data write result register.
Described communication interface modules, for by the data retransmission in result register to rear level system; Further, communication interface modules can carry out data communication by optical fiber communication mode and rear level system, can adopt the fiber-optic SFP module supporting 2.5Gbps.
The data of above-described embodiment are screened and pre-service physical card, the PCIE expansion interface of employing standard carries out data acquisition, meet the requirement of most of equipment mainboard interface, logical calculated is completed by programmable logic processor, logical calculated algorithm all can be converted to the logical data forms such as high level, low level, logic gate and process, and processing procedure is real-time and efficient.Digital signal processor is reportedly input into row and controls and management, and dispatching communication interface module, PCIE transport module and cache memory complete data receiver and transmission jointly, improves real-time and the high efficiency of data transmission.
By technical scheme of the present invention, under concurrent at height, high (transfer rate is MB/ millisecond) environment in real time, programmable logic processor can complete efficient logical analytical calculation, digital signal processor can complete control, the management of high real-time data communication and operational process, can meet the rear level systems such as supervisory system, stored program controlled, management system to the requirement of the high real-time of mass data, high concurrency, high-transmission efficiency.Meanwhile, by DSP CONTROL function, service computation logic, without the need to being solidificated in chip, by operations such as software kit finishing service computational logic renewals, can improve the dirigibility of expansion, maintainability, reduce upgrade cost.
In order to more clear technical scheme of the present invention, set forth some preferred embodiments below.
In one embodiment, the service logic of the programmable logic processor process of input, configuration information are uploaded in memory modules by the configuration software that described digital signal processor is preset.
By the function of above-described embodiment, data of the present invention are screened can according to business demand flexible programming and configuration with pre-service physical card, service logic, configuration information can be uploaded flexibly in memory modules by the configuration software worn, data are screened after restarting with the host equipment of pre-service physical card, namely complete data examination revise with the operating system of pre-service physical card and upgrade, improve data and screen the maintainability with pre-service physical card.
In one embodiment, the compatible windows operating system of the driver that described PCIE transport module is supporting and (SuSE) Linux OS.
In above-described embodiment, by arranging windows operating system and the (SuSE) Linux OS of the built-in supporting driver compatible market main flow of PCIE transport module, facilitate the choice and operation of user.
In one embodiment, described data screen the api interface that the operating system run with pre-service physical card supports C language version, Java language version and .Net language version.
The data of above-described embodiment are screened and pre-service physical card, flexible API (the Application ProgrammingInterface of widely used C language version in software industry, Java language version and .Net language version is provided, application programming interface), improve scalability.
In one embodiment, described digital signal processor is also for monitoring PCIE transport module image data function, state and communication interface modules forwarding data function, state.
Further, as shown in Figure 2, Fig. 2 is the data examination of another embodiment and the structural representation of pre-service physical card.Data are screened and can also to be arranged the communication connection pilot lamp (being denoted as pilot lamp in figure) and alarm lamp that communication interface modules is connected with pre-service physical card, for showing the groundwork situation of data examination and pre-service physical card; Communication interface modules comprises two Optical Fiber Transmission interfaces (optical fiber interface 1, optical fiber interface 2), is connected with power plant's application apparatus of rear level system.
In one embodiment, described host machine is electrical energy data acquiring equipment or rear class system server.
Owing to no matter being that interfacing equipment or server apparatus all possess Standard PC IE slot, so, data of the present invention are screened only to be needed to be inserted into interfacing equipment or server apparatus with pre-service physical card, can, under guarantee existing system network structure, under the prerequisite ensureing data transmission real-time, correctness, high efficiency, it be made to possess data acquisition and screen function.
Preferably, data of the present invention are screened and pre-service physical card, and wherein programmable logic processor adopts FPGA (Field-Programmable Gate Array, field programmable gate array) chip; Corresponding FPGA can be selected according to actual needs, such as, model XC9KGRX45T-FG242,2,088Kb BlockRAM Blocks.
Be solidificated in chip because fpga chip runs processing logic by burning, therefore, can not be destroyed by computer virus or maloperation, thus guarantee that data are screened and pre-service physical card reliability of operation and security.
In addition, described programmable logic processor, the algorithm of mainstream data examination both at home and abroad at present can be used, also self-defining data can be used to screen check algorithm, as modified 53H data detection method, the important basic procedure of this algorithm is: by smoothing processing repeatedly, obtain level and smooth sequence, level and smooth sequence and actual sequence are compared, find that there is bigger difference, find accidental data simultaneously, it is compared with traditional 53H method, add feature quantity sequence inspection, characteristic quantity verifies as increases mean value inspection, standard deviation inspection etc., make the assay of 53H method more reliable, improve checkability and inspection reliability, actual operation is stronger.Newly-increased head and the tail 2 smoothing methods are supplementing traditional 53H method, achieve the Mutation Assay for each 4 of sequence head and the tail, and after having followed the tracks of sequence well or front variation tendency.Introduce the deviation ratio comparatively limit value of uncertainty as smooth value and original value, the randomness that the experience of avoiding is chosen, the triviality without basis and deterministic process, make inspection setting more have theoretical foundation, and the data that can well coordinate the performance of hardware to reach real-time high-efficiency are screened and pre-service.
Because data of the present invention are screened and pre-service physical card, support that mainstream data screens algorithm or self-defining algorithm at present both at home and abroad, these algorithms are stored in algorithm register, programmable logic processor is by corresponding logic number, run corresponding logical calculated instruction just to screen and pre-service data, application system development business researches and develops without the need to dropping into the man power and material with this professional domain again, cost-saving, system can be reached the standard grade at short notice deployment, meet the requirement of user, save cost.And dispose also without the need to changing existing network topological structure, without the need to increasing the equipment etc. such as server, save cost.
The data of comprehensive above-described embodiment are screened and pre-service physical card, solve that existing measurement data alignment technique system research and development complexity is high, data transmission efficiency is poor, to the inadequate problem of support that is concurrent, big data quantity, fully excavate the potential of computer hardware, simultaneously, existing system is transformed, improve the dirigibility of expansion, reduce expansion cost, the professional performance of hardware, the logistic discrimination algorithm of high speed and extensibility, maintainability are innovated.
Data of the present invention are screened and pre-service physical card, can apply fpga logic process chip, have high-speed data acquisition and the transmission dsp chip of controlling functions, the PCIE data-interface mode of standard, be suitable for the PCIE expansion interface of most computer motherboard.The function of data prediction is responsible for by the programmable logic processor of such as fpga logic process chip, the mass data collection of high real-time, high concurrency is responsible for dispatch deal with transmission by digital signal processor (as dsp chip), both cooperatively interact, act on, complete whole data operation process, improve real-time and the high efficiency of data transmission.
In addition, the operation such as software kit system finishing service computational logic renewal.Common service logic renewal rewards theory is such as uploaded, downloads, is checked state etc. by software kit system, user can be provided to use by human-computer interaction interface, and software kit achieves and specialty, complicated hardware operation have been carried out shielding and the encapsulation of friendly.Add the dirigibility of system extension, and greatly reduce the upgrade cost of system.
Set forth above-mentioned data below and screen the embodiment with the operation method of pre-service physical card, these data screen the operating scheme with pre-service physical card, specifically can comprise the steps:
Step S11, described PCIE transport module reads energy data from host machine, write memory module, and trigger hardware IO look-at-me;
Step S21, described digital signal processor response IO look-at-me, by the specified memory address of each register data write memory module;
Step S22, described digital signal processor according to the operating instruction in Instruction Register list (instruction that this list performs for the needs of record buffer memory), the memory address of storage allocation module.And trigger hardware look-at-me;
Step S23, described digital signal processor starts the response performing next round IO look-at-me;
Step S31, described programmable logic processor response hardware interrupt, obtains data according to configuration information and screens the logic number with Preprocessing Algorithm from algorithm register;
Step S32, described programmable logic processor screens the logical calculated instruction corresponding with Preprocessing Algorithm according to logic number service data;
Step S33, described programmable logic processor reads the history energy data in historical data memory field according to logical calculated parallel instructions;
Step S34, described programmable logic processor is analyzed according to logical calculated instruction associating history energy data and current energy data, produce level and smooth sequence, level and smooth sequence and actual sequence are compared, judge energy data that is abnormal and sudden change occurs;
Step S35, described programmable logic processor is by logical calculated result and original history energy data write result register, and trigger hardware IO look-at-me;
Step S36, described programmable logic processor starts the response performing next round hardware interrupt;
Step S24, described digital signal processor response Hardware I/O look-at-me, the data in result register forward by dispatching communication interface module;
Step S25, described digital signal processor starts the response performing next round Hardware I/O look-at-me;
Step S41, the logical calculated result in result register and original history energy data are carried out periphery and are forwarded by described communication interface modules, complete a complete operation flow process.
Data of the present invention screen the operation method with pre-service physical card, the function with pre-service physical card is screened based on data, energy data to be screened and in pre-service, digital signal processor and programmable logic processor cooperatively interact, complete the controlling functions such as efficient logical analytical calculation and high real-time data communication respectively, thus can meet the rear level systems such as supervisory system, stored program controlled, management system to the requirement of the high real-time of mass data, high concurrency, high-transmission efficiency.
Set forth the embodiment of energy data disposal system of the present invention below.
Energy data disposal system of the present invention, the data comprising any embodiment of the present invention are screened and pre-service physical card; Wherein, these data are screened and are connected on electrical energy data acquiring equipment with pre-service physical card, or connect on rear class system server.
Shown in figure 3,4, Fig. 3,4 is the structural representation of the embodiment of energy data disposal system of the present invention, rear level system, comprises supervisory system, stored program controlled, each measuring equipment of management system parallel acquisition, metering outfit, opertaing device or other system real time data.
Therefore, as shown in Figure 3, data are screened and can be inserted on electrical energy data acquiring equipment (being denoted as collecting device in figure) with pre-service physical card (being denoted as physical card in figure).In addition, as shown in Figure 4, data are screened and also can be inserted on the server apparatus of supervisory system, stored program controlled, management system with pre-service physical card.
Energy data disposal system of the present invention, is screened and pre-service physical card by data provided by the invention, can ensure to possess data acquisition and screen function under existing network infrastructure, under the prerequisite of guarantee data transmission real-time, correctness, high efficiency.
The above embodiment only have expressed several embodiment of the present invention, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the scope of the claims of the present invention.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.
Claims (10)
1. data are screened and a pre-service physical card, it is characterized in that, comprising: PCIE transport module, digital signal processor, programmable logic processor, memory modules, cache memory, communication interface modules;
Described memory modules is built-in with algorithm register, result register and historical data memory field; Described cache memory carries out buffer memory to the data write of memory modules and reading;
Described PCIE transport module is connected with host machine by Standard PC IE interface, utilizes supporting driver to read energy data from host machine;
Described digital signal processor, energy data is gathered from host machine for control PCIE transport module, and being write historical data memory field, the data write of scheduling memory modules and the process of reading, the data in result register forward by dispatching communication interface module;
Described programmable logic processor, from algorithm register, obtain data according to configuration information and screen the logic number with Preprocessing Algorithm, corresponding logical calculated instruction is run according to logic number, read the history energy data in historical data memory field, history energy data and current energy data are analyzed, produce level and smooth sequence, level and smooth sequence and actual sequence are compared, judge that energy data that is abnormal and sudden change occurs in current energy data obtains logical calculated result, by described logical calculated result and described history energy data write result register,
Described communication interface modules, for by the data retransmission in result register to rear level system.
2. data according to claim 1 are screened and pre-service physical card, and it is characterized in that, the service logic of the programmable logic processor process of input, configuration information are uploaded in memory modules by the configuration software that described digital signal processor is preset.
3. data according to claim 1 are screened and pre-service physical card, it is characterized in that, the compatible windows operating system of driver that described PCIE transport module is supporting and (SuSE) Linux OS.
4. data according to claim 1 are screened and pre-service physical card, it is characterized in that, described data screen the api interface that the operating system run with pre-service physical card supports C language version, Java language version and .Net language version.
5. data according to claim 1 are screened and pre-service physical card, and it is characterized in that, described digital signal processor is also for monitoring PCIE transport module image data function, state and communication interface modules forwarding data function, state.
6. data according to claim 1 are screened and pre-service physical card, and it is characterized in that, described communication interface modules carries out data communication by optical fiber communication mode and rear level system.
7. data according to claim 1 are screened and pre-service physical card, and it is characterized in that, described host machine is electrical energy data acquiring equipment or rear class system server.
8. data according to claim 1 are screened and pre-service physical card, and it is characterized in that, described programmable logic processor comprises fpga chip.
9. screen the operation method with pre-service physical card based on data described in any one of claim 1 to 7, it is characterized in that, comprise the steps:
Step S11, described PCIE transport module reads energy data from host machine, write memory module, and trigger hardware IO look-at-me;
Step S21, described digital signal processor response IO look-at-me, by the specified memory address of each register data write memory module;
Step S22, described digital signal processor according to the operating instruction in Instruction Register list, the memory address of storage allocation module.And trigger hardware look-at-me;
Step S23, described digital signal processor starts the response performing next round IO look-at-me;
Step S31, described programmable logic processor response hardware interrupt, obtains data according to configuration information and screens the logic number with Preprocessing Algorithm from algorithm register;
Step S32, described programmable logic processor screens the logical calculated instruction corresponding with Preprocessing Algorithm according to logic number service data;
Step S33, described programmable logic processor reads the history energy data in historical data memory field according to logical calculated parallel instructions;
Step S34, described programmable logic processor is analyzed according to logical calculated instruction associating history energy data and current energy data, produce level and smooth sequence, level and smooth sequence and actual sequence are compared, judge energy data that is abnormal and sudden change occurs;
Step S35, described programmable logic processor is by logical calculated result and original history energy data write result register, and trigger hardware IO look-at-me;
Step S36, described programmable logic processor starts the response performing next round hardware interrupt;
Step S24, described digital signal processor response Hardware I/O look-at-me, the data in result register forward by dispatching communication interface module;
Step S25, described digital signal processor starts the response performing next round Hardware I/O look-at-me;
Step S41, the logical calculated result in result register and original history energy data are carried out periphery and are forwarded by described communication interface modules.
10. an energy data disposal system, is characterized in that, comprises data as described in any one of claim 1 to 7 and screens and pre-service physical card; Wherein, described data are screened and are connected on electrical energy data acquiring equipment with pre-service physical card, or connect on rear class system server.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107565695A (en) * | 2017-10-11 | 2018-01-09 | 国网冀北电力有限公司电力科学研究院 | Power information acquisition system based on PCIE SSD environments |
CN111241031A (en) * | 2020-01-07 | 2020-06-05 | 北京三快在线科技有限公司 | Data computing system, method and device |
CN114936174A (en) * | 2022-06-09 | 2022-08-23 | 中国兵器工业计算机应用技术研究所 | Image processing and fusion computing method based on ground unmanned platform |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100299465A1 (en) * | 2009-05-19 | 2010-11-25 | International Business Machines Corporation | Scaling energy use in a virtualized environment |
CN102819006A (en) * | 2012-08-08 | 2012-12-12 | 中国人民解放军信息工程大学 | Broadband direction finding control method based on frequency domain correlation interferometer |
CN103093078A (en) * | 2012-12-18 | 2013-05-08 | 湖南大唐先一科技有限公司 | Data inspection method for improved 53H algorithm |
CN103744820A (en) * | 2013-12-31 | 2014-04-23 | 湖南大唐先一科技有限公司 | Data discriminating and pre-processing physic card |
-
2014
- 2014-09-24 CN CN201410493417.6A patent/CN104360968B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100299465A1 (en) * | 2009-05-19 | 2010-11-25 | International Business Machines Corporation | Scaling energy use in a virtualized environment |
CN102819006A (en) * | 2012-08-08 | 2012-12-12 | 中国人民解放军信息工程大学 | Broadband direction finding control method based on frequency domain correlation interferometer |
CN103093078A (en) * | 2012-12-18 | 2013-05-08 | 湖南大唐先一科技有限公司 | Data inspection method for improved 53H algorithm |
CN103744820A (en) * | 2013-12-31 | 2014-04-23 | 湖南大唐先一科技有限公司 | Data discriminating and pre-processing physic card |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107565695A (en) * | 2017-10-11 | 2018-01-09 | 国网冀北电力有限公司电力科学研究院 | Power information acquisition system based on PCIE SSD environments |
CN111241031A (en) * | 2020-01-07 | 2020-06-05 | 北京三快在线科技有限公司 | Data computing system, method and device |
CN114936174A (en) * | 2022-06-09 | 2022-08-23 | 中国兵器工业计算机应用技术研究所 | Image processing and fusion computing method based on ground unmanned platform |
CN114936174B (en) * | 2022-06-09 | 2024-01-30 | 中国兵器工业计算机应用技术研究所 | Image processing and fusion computing method based on ground unmanned platform |
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