CN104360610A - AVR single-chip microcomputer based control platform of multifunctional test system - Google Patents
AVR single-chip microcomputer based control platform of multifunctional test system Download PDFInfo
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- CN104360610A CN104360610A CN201410401880.3A CN201410401880A CN104360610A CN 104360610 A CN104360610 A CN 104360610A CN 201410401880 A CN201410401880 A CN 201410401880A CN 104360610 A CN104360610 A CN 104360610A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0428—Safety, monitoring
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/26—Pc applications
- G05B2219/2604—Test of external equipment
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/26—Pc applications
- G05B2219/2612—Data acquisition interface
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- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
The invention discloses an AVR single-chip microcomputer based control platform of a multifunctional test system. The platform comprises an AVR control chip, a TCP/IP (transmission control protocol/internet protocol) network communication circuit, a programmable logic gate device circuit, a control bus interface I/O (input/output) circuit, a sampling interface I/O circuit, a clock circuit, a chip simulator, a download interface, a power and reset circuit, an external extension RAM (random access memory) circuit, a SD (security digital) card data storage circuit, a backup power battery circuit and an external extension EEPROM (electrically erasable programmable read-only memory) circuit; the AVR control chip is connected with the latter circuits. The programmable logic gate device circuit is connected with an IP address defining dial circuit. The programmable logic gate device circuit is used for controlling an external control bus and defining an input/output direction and a time sequence of the control bus so that control of external devices is diversified. The AVR control chip is connected with an A/D (analog/digital) sampler through the sampling interface I/O circuit and through the A/D sampler, collects current and voltage of a device under test, in precise correspondence with time. The IP address defining dial circuit is used for defining an IP address of the single platform.
Description
Technical field
The present invention relates to a kind of parametric controller of the multifunctional test system based on AVR single chip, belong to technical field of single chip microcomputer.
Background technology
Discrete device is very extensive in electronic applications application, will carry out burn-in test before discrete device dispatches from the factory to it, fully ensure the yields of device, and the quality of discrete device directly affects the stability of an electronic system.
What present discrete device aging testing system majority adopted is that RS232 and host computer carry out communication, communication speed is slow, the test data of device can not feed back to host computer analysis timely, writing time is write by host computer mostly, so just cause the relatively large deviation of data and time, and once be connected with host computer and disconnect, middle test data will be out of stock, what the test before causing was done is idle work, can not get data analysis.And tested object is single, neither one is well compatible.Therefore wish to have a parametric controller can carry out communication quickly with host computer, be connected with host computer disconnect in oneself can preserve data, and independently control, greatly can promote stability and the convenience of testing apparatus, and the corresponding relation of the integrality of data and data and time also can there is further lifting.
Summary of the invention
In order to the tested object overcoming the existence of existing discrete device aging testing system is single, test data deviation large, test continuity is poor and the shortcoming of poor compatibility etc., the invention provides one and can carry out communication with host computer more rapidly, preserve testing process on parametric controller, independently can complete content measurement and data record, software upgrading can be carried out by network interface to parametric controller, can in 0 ~ 255 scope the parametric controller of the multifunctional test system based on AVR single chip of the IP address of self-defined single parametric controller.
The technical solution used in the present invention is:
Based on the parametric controller of the multifunctional test system of AVR single chip, it is characterized in that: the TCP/IP network communication circuit comprising AVR control chip and be connected with AVR control chip, programmable gate device circuitry, control bus interface I/O circuit, Sampling Interface I/O circuit, clock circuit, chip emulator and download interface, power supply and reset circuit, extend out RAM circuit, SD card data storing circuit, standby power supply battery circuit and extend out eeprom circuit; Wherein, described programmable gate device circuitry and IP address define dial-up circuit and are connected, described programmable gate device circuitry is for controlling external control bus, the I/O direction of definition control bus, sequential, realize the diversity that external devices is controlled, maintain the extendability of experiment porch;
Described AVR control chip is connected with A/D sampling thief by described Sampling Interface I/O circuit, and by electric current, the magnitude of voltage of A/D samplers sample institute test component, and accurately corresponding with the time, most pinpoint accuracy controls within 0.1 second;
Described IP address definition dial-up circuit is connected with AVR control chip by described programmable gate device circuitry, for defining the IP address of monolithic parametric controller;
Described TCP/IP network communication circuit and PC carry out communication, upload experimental data to PC, the binary program source code unloading that described AVR control chip obtains from PC is extending out in RAM circuit, read data in RAM in order and the FLASH district of burned AVR control chip, realize the function of by network interface, control chip being carried out to program burn writing;
Described SD card data storing circuit is connected with AVR control chip by SPI interface, when connecting for PC, parametric controller proceeds to independently data-recording status automatically, experimental data is stored in SD card automatically, and automatically can upload data out of stock on PC when connecting and recovering; Adding of SD card module, coordinate software function, parametric controller can be proceeded to when PC is connected to automatically and independently carry out data-recording status, preserve test data in SD card, connect when recovering and automatically upload recorded data;
Described extends out RAM circuit for after receiving the testing process information from PC, independent preserves testing process information, and can when complete PC controls the remaining testing process of complete independently;
Described standby power supply battery circuit is used for system after power is turned off, still can preserve procedure information, can also continue to perform experiment test according to procedure information before after being again energized; Described clock circuit is powered by standby power supply, and when ensure that AVR control chip can independently be walked, single-chip microcomputer reads temporal information by I/O port, and associates with collected electric current and voltage value;
Described extends out the calibration data of eeprom circuit for stocking system, after parametric controller collects the sampled data of outside A/D, can call the calibration data extended out in the chip of eeprom circuit and form final data measurement, and record.
Further, described AVR control chip adopts Atmegal128 singlechip chip, and described TCP/IP network communication circuit adopts W5100 chip, and described W5100 chip is connected with single-chip microcomputer parallel bus, realizes the network communication function of single-chip microcomputer and PC.
Further, described programmable gate device circuitry adopts FPGA (Field Programmable Gate Array) gate device EPM3128, carries out complicated exterior I/O logical order programming.
Further, described clock circuit adopts DS1390 clock chip.
Further, described IP address definition dial-up circuit adopts 8 8421 toggle switchs.Control chip selects the Atmega128 singlechip chip of atmel corp, selects the W5100 chip of integrated ICP/IP protocol, is connected with single-chip microcomputer parallel bus, achieves the function that single-chip microcomputer and PC carry out network communication.
PC of the present invention is for editing test condition and record relevant experimental data provides and checks, be responsible for preserving and performing by this platform after all experiment control parameter machines issue, after sending controling parameters, even if departed from the connection of PC, parametric controller still can carry out accurate experiment control.If the network having departed from PC in experimentation connects, parametric controller can among automatic unloading experimental data to the SD card on platform, and the amount of data stored is determined by SD card capacity.The IP address of parametric controller can be undertaken self-defined by toggle switch, and parametric controller carries 8 toggle switchs, and the IP address can carrying out 2^8 and 0-255 is self-defined.Owing to adopting ICP/IP protocol communication, a PC can not interfere with each other control to 256 parametric controller at most simultaneously simultaneously; This platform can be programmed to control chip AVR by ICP/IP protocol communication, and the supple-virtuosity for the platform later stage can be upgraded, and can programme to 256 parametric controller simultaneously.
Beneficial effect of the present invention is embodied in:
1, the test data can returned to outside collection is carried out deviation and is added up, and deviation data can utilize relevant correcting device to obtain, and reaches the object of more accurate data acquisition and feedback.
2, this parametric controller has TCP/TP communications protocol, SD card data hold function, and when independent clock is walked, power failure data is preserved and recovered, external control bus interface, A/D sampling thief communication interface, programmable gate device blocks.
3, by external control bus interface, the accurate control to controlled module can be realized.
4, by the electric current of A/D samplers sample institute test component, magnitude of voltage, and accurately corresponding with the time, most pinpoint accuracy controlled within 0.1 second.
5, parametric controller carries toggle switch, and may be used for the IP address definition defining monolithic parametric controller, flat leading to can carry out communication by ICP/IP protocol and PC, and uploads experimental data on PC.
6, SD card data hold function works in and loses network when connecting, if run in test process, PC crashes, the problem such as stuck, and experimental data is stored in SD card automatically, and automatically can upload data out of stock on PC when connection recovery.
7, platform additionally provides by ICP/IP protocol communication programming functions of control program; abandon tradition and troublesome fever writes programming program; and be provided with programming defencive function; if run into emergency case such as programming midway power-off etc., can automatically start programming program after powering on and with PC again carrying out shake communication.
Accompanying drawing explanation
Fig. 1 is present system theory diagram.
Fig. 2 is Atmega128 interface circuit of the present invention.
Fig. 3 is EPM3128 interface circuit of the present invention.
Fig. 4 is that the present invention extends out RAM interface circuit.
Fig. 5 is W5100 interface circuit of the present invention.
Fig. 6 is power supply of the present invention and reset circuit.
Embodiment
Referring to figs. 1 through Fig. 6, based on the parametric controller of the multifunctional test system of AVR single chip, the TCP/IP network communication circuit comprising AVR control chip and be connected with AVR control chip, programmable gate device circuitry, control bus interface I/O circuit, Sampling Interface I/O circuit, clock circuit, chip emulator and download interface, power supply and reset circuit, extend out RAM circuit, SD card data storing circuit, standby power supply battery circuit and extend out eeprom circuit;
Wherein, described programmable gate device circuitry and IP address define dial-up circuit and are connected, described programmable gate device circuitry is for controlling external control bus, the I/O direction of definition control bus, sequential, realize the diversity that external devices is controlled, maintain the extendability of experiment porch;
Described AVR control chip is connected with A/D sampling thief by described Sampling Interface I/O circuit, and by electric current, the magnitude of voltage of A/D samplers sample institute test component, and accurately corresponding with the time, most pinpoint accuracy controls within 0.1 second;
Described IP address definition dial-up circuit is connected with AVR control chip by described programmable gate device circuitry, for defining the IP address of monolithic parametric controller;
Described TCP/IP network communication circuit and PC carry out communication, upload experimental data to PC, the binary program source code unloading that described AVR control chip obtains from PC is extending out in RAM circuit, read data in RAM in order and the FLASH district of burned AVR control chip, realize the function of by network interface, control chip being carried out to program burn writing;
Described SD card data storing circuit is connected with AVR control chip by SPI interface, when connecting for PC, parametric controller proceeds to independently data-recording status automatically, experimental data is stored in SD card automatically, and automatically can upload data out of stock on PC when connecting and recovering; Adding of SD card module, coordinate software function, parametric controller can be proceeded to when PC is connected to automatically and independently carry out data-recording status, preserve test data in SD card, connect when recovering and automatically upload recorded data;
Described extends out RAM circuit for after receiving the testing process information from PC, independent preserves testing process information, and can when complete PC controls the remaining testing process of complete independently;
Described standby power supply battery circuit is used for system after power is turned off, still can preserve procedure information, can also continue to perform experiment test according to procedure information before after being again energized; Described clock circuit is powered by standby power supply, and when ensure that AVR control chip can independently be walked, single-chip microcomputer reads temporal information by I/O port, and associates with collected electric current and voltage value;
Described extends out the calibration data of eeprom circuit for stocking system, after parametric controller collects the sampled data of outside A/D, can call the calibration data extended out in the chip of eeprom circuit and form final data measurement, and record.
Further, described AVR control chip adopts Atmegal128 singlechip chip, and described TCP/IP network communication circuit adopts W5100 chip, and described W5100 chip is connected with single-chip microcomputer parallel bus, realizes the network communication function of single-chip microcomputer and PC.
Further, described programmable gate device circuitry adopts FPGA (Field Programmable Gate Array) gate device EPM3128, carries out complicated exterior I/O logical order programming.
Further, described clock circuit adopts DS1390 clock chip.
Further, described IP address definition dial-up circuit adopts 8 8421 toggle switchs.Control chip selects the Atmega128 singlechip chip of atmel corp, selects the W5100 chip of integrated ICP/IP protocol, is connected with single-chip microcomputer parallel bus, achieves the function that single-chip microcomputer and PC carry out network communication.
PC of the present invention is for editing test condition and record relevant experimental data provides and checks, be responsible for preserving and performing by this platform after all experiment control parameter machines issue, after sending controling parameters, even if departed from the connection of PC, parametric controller still can carry out accurate experiment control.If the network having departed from PC in experimentation connects, parametric controller can among automatic unloading experimental data to the SD card on platform, and the amount of data stored is determined by SD card capacity.The IP address of parametric controller can be undertaken self-defined by toggle switch, and parametric controller carries 8 toggle switchs, and the IP address can carrying out 2^8 and 0-255 is self-defined.Owing to adopting ICP/IP protocol communication, a PC can not interfere with each other control to 256 parametric controller at most simultaneously simultaneously; This platform can be programmed to control chip AVR by ICP/IP protocol communication, and the supple-virtuosity for the platform later stage can be upgraded, and can programme to 256 parametric controller simultaneously.
The present invention uses the RWW self-programming technology of Atmega128 chip, in coordinate W5100 chip to obtain 32K RAM that the binary program source code unloading from PC expands in outside, read data in RAM in order and burned chip FLASH district, achieve the function of by network interface, control chip being carried out to program burn writing.The storage area of delimitation program, and specific zone bit is set, the subregion achieving Bootloader program and APP stores, and two program areas do not interfere with each other, when network programming failure, platform still can proceed to Bootloader program area and re-execute.Be responsible for the software code partition of network programming, adopt paging programming, single receives from the N number of byte data of PC, wherein front N-1 byte is the binary code of program, last byte is schedule parameter, after receiving data, return data is to PC again for parametric controller, and two secondary data compare errorless PC afterwards and send programming instruction again, ensure that burned program correctness.
This parametric controller is powered by the unified power supply of one piece of voltage conversion chip output 3.3V voltage.As shown in Fig. 2,3,4,5, device connected mode adopts parallel bus to connect, and wherein A0-A15 is address bus, and D0-D7 is data bus, and the A0-A7 in address bus is latched by EPM3128 and draws.Be all come by SPI interface with the communication of SD card and external sampling A/D, select which module to select SD_CS, AD_EN to determine by outer plate, two pins can not be low simultaneously.Outside toggle switch access EPM3128, EPM3128 determine whether exporting dial-up information to data bus according to the address bus that MCU sends.Reserve battery and 3.3V power and access in power management chip simultaneously, and when 3.3V powers inefficacy, managing chip automatically switches to battery output and powers to SRM and DS1390, guarantees that data do not disappear when power down, normal when clock is walked.
Below the description to a step proper testing flow process:
PC carries out the communication with parametric controller by ICP/IP protocol, issue experiment flow relevant information to W5100 chip, W5100 chip produces transmission request of data to control chip Atmega128 after receiving data, control chip jumps into data receiver function after receiving transmission request of data, and accept related data, dump to and extend out in SRAM.After parametric controller calculates correlation parameter, to certain address write data, EPM3128 can go out corresponding signal according to address latch, and delivers to outside expansion I/O, controls outside controllable devices.Parametric controller starts the whole experiment flow of independent control, and record test data, be sent to PC by W5100.When Joint failure with PC time, parametric controller judges Joint failure by software program, automatically enables offline mode, data to be write in SD card preserve by SPI interface; Connect when replying normal, read data in SD card by SPI interface, and be uploaded to PC and preserve.In whole testing process, if PC remains the connection with parametric controller, can dependent instruction be sent, control and change the testing process of experiment.
Below the description for programming parametric controller flow process:
Parametric controller receives the programming instruction from PC---2. program proceeds to BOOTLOADER district and runs---3.PC machine sends programming data---4. process accepts data---5. the data that receive of unloading are to RAM---6. return the data of reception---7.PC machine verification return data accuracy---8. verification inerrancy then sends programming instruction, mistake then returns the 3rd step---and 9. parametric controller receives programming instruction, programming zone bit is set, start write-in program, return success or not---10. return the 3rd step, according to the 9th step return data, successful then send next page data, unsuccessful, retransmit current data, until programming completes.---11.PC machine sends and exits programming programmed instruction---12. programming programming zone bits, rebound APP district.
Flow process for platform start describes:
First detect programming zone bit after platform powers on, exit if programming zone bit instruction programming is abnormal, then program jumps to BOOTLOADER district automatically, if zone bit instruction programming completes.Then program continues to run in APP district.
Content described in this instructions embodiment is only enumerating the way of realization of inventive concept; protection scope of the present invention should not be regarded as being only limitted to the concrete form that embodiment is stated, protection scope of the present invention also and conceive the equivalent technologies means that can expect according to the present invention in those skilled in the art.
Claims (5)
1. based on the parametric controller of the multifunctional test system of AVR single chip, it is characterized in that: the TCP/IP network communication circuit comprising AVR control chip and be connected with AVR control chip, programmable gate device circuitry, control bus interface I/O circuit, Sampling Interface I/O circuit, clock circuit, chip emulator and download interface, power supply and reset circuit, extend out RAM circuit, SD card data storing circuit, standby power supply battery circuit and extend out eeprom circuit;
Wherein, described programmable gate device circuitry and IP address define dial-up circuit and are connected, described programmable gate device circuitry is for controlling external control bus, and the I/O direction of definition control bus, sequential, realize the diversity controlled external devices;
Described AVR control chip is connected with A/D sampling thief by described Sampling Interface I/O circuit, by electric current, the magnitude of voltage of A/D samplers sample institute test component, and accurately corresponding with the time;
Described IP address definition dial-up circuit is connected with AVR control chip by described programmable gate device circuitry, for defining the IP address of monolithic parametric controller;
Described TCP/IP network communication circuit and PC carry out communication, upload experimental data to PC, the binary program source code unloading that described AVR control chip obtains from PC is extending out in RAM circuit, read data in RAM in order and the FLASH district of burned AVR control chip, realize the function of by network interface, control chip being carried out to program burn writing;
Described SD card data storing circuit is connected with AVR control chip by SPI interface, when connecting for PC, parametric controller proceeds to independently data-recording status automatically, experimental data is stored in SD card automatically, and automatically can upload data out of stock on PC when connecting and recovering;
Described extends out RAM circuit for after receiving the testing process information from PC, independent preserves testing process information, and can when complete PC controls the remaining testing process of complete independently;
Described standby power supply battery circuit is used for system after power is turned off, still can preserve procedure information, can also continue to perform experiment test according to procedure information before after being again energized; Described clock circuit is powered by standby power supply, and when ensure that AVR control chip can independently be walked, single-chip microcomputer reads temporal information by I/O port, and associates with collected electric current and voltage value;
Described extends out the calibration data of eeprom circuit for stocking system, after parametric controller collects the sampled data of outside A/D, can call the calibration data extended out in the chip of eeprom circuit and form final data measurement, and record.
2. as claimed in claim 1 based on the parametric controller of the multifunctional test system of AVR single chip, it is characterized in that: described AVR control chip adopts Atmegal128 singlechip chip, described TCP/IP network communication circuit adopts W5100 chip, described W5100 chip is connected with single-chip microcomputer parallel bus, realizes the network communication function of single-chip microcomputer and PC.
3. as claimed in claim 2 based on the parametric controller of the multifunctional test system of AVR single chip, it is characterized in that: described programmable gate device circuitry adopts FPGA (Field Programmable Gate Array) gate device EPM3128, carry out complicated exterior I/O logical order programming.
4. as claimed in claim 3 based on the parametric controller of the multifunctional test system of AVR single chip, it is characterized in that: described clock circuit adopts DS1390 clock chip.
5. the parametric controller of a kind of multifunctional test system based on AVR single chip as claimed in claim 4, is characterized in that: described IP address definition dial-up circuit adopts 8 8421 toggle switchs.
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| CN201410401880.3A CN104360610A (en) | 2014-08-15 | 2014-08-15 | AVR single-chip microcomputer based control platform of multifunctional test system |
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| CN201410401880.3A CN104360610A (en) | 2014-08-15 | 2014-08-15 | AVR single-chip microcomputer based control platform of multifunctional test system |
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Cited By (1)
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