CN104347582A - Semiconductor device encapsulation structure for increasing longitudinal voltage endurance capability of device - Google Patents

Semiconductor device encapsulation structure for increasing longitudinal voltage endurance capability of device Download PDF

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Publication number
CN104347582A
CN104347582A CN201310326155.XA CN201310326155A CN104347582A CN 104347582 A CN104347582 A CN 104347582A CN 201310326155 A CN201310326155 A CN 201310326155A CN 104347582 A CN104347582 A CN 104347582A
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CN
China
Prior art keywords
semiconductor device
substrate
semiconductor
dbc
package
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Pending
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CN201310326155.XA
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Chinese (zh)
Inventor
谢刚
何志
陈琛
盛况
崔京京
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Suzhou Industrial Technology Research Institute of ZJU
Industrial Technology Research Institute of ZJU
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Industrial Technology Research Institute of ZJU
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Priority to CN201310326155.XA priority Critical patent/CN104347582A/en
Publication of CN104347582A publication Critical patent/CN104347582A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a semiconductor device encapsulation structure for increasing the longitudinal voltage endurance capability of a device. A semiconductor device of the semiconductor device encapsulation structure is a high-electron mobility device which is made by using a III-V semiconductor material, the semiconductor device is connected with an insulated DBC (Database Computer) base board through a semiconductor device substrate, an obtained DBC base board is then connected with an external encapsulation device, thus most of withstand voltage can be borne by the DBC base plate when high reversal biasing voltage is borne by the semiconductor device, and the longitudinal withstand voltage of the device can be enhanced; the comprehensive voltage endurance level of the semiconductor device can be increased to a large extent by optimizing the horizontal size and the horizontal structure.

Description

A kind of semiconductor device package improving the longitudinal voltage endurance capability of device
Technical field
The present invention relates to a kind of semiconductor device package improving device withstand voltage ability, semiconductor device package of the present invention is mainly used in discrete high tension apparatus.
Background technology
Gallium nitride (GaN) semiconductor device of iii-v nitride type device is the novel semiconductor material device developed rapidly in recent years.Device based on GaN semi-conducting material can carry large electric current and support high pressure, and such devices can also provide low-down conduction resistance and very short switching time simultaneously.
High-quality heterojunction structure can be formed between GaN and associated alloys thereof, therefore, in AlGaN/GaN heterojunction structure, impurity scattering reduces, thus the two-dimensional electron gas of high electron mobility can be obtained, in AlGaN/GaN heterojunction structure, there is piezoelectricity and spontaneous polarization effect, this makes its a two-dimensional electron gas number magnitude higher than traditional heterojunction structure.Thus the device GaN HEMTs be made up of AlGaN/GaN heterojunction structure can provide lower conduction resistance, reduces the loss of power device.GaN HEMTs is wide bandgap semiconductor materials material devices simultaneously, has high withstand voltage characteristic.
For the substrate of GaN HEMTs, consider the needs of industrialized development, the preparation of backing material requires succinct, and cost should not be very high.Substrate dimension is generally not less than 2 inches.Current GaN HEMT selects Si, SiC or sapphire as substrate usually.Single crystalline Si applies very wide semi-conducting material, and be easy to do greatly as Substrate Area, thermal conductivity is good, the most important thing is cheap, is applicable to commercially produce.Endeavouring to study growing GaN device on a si substrate so current.But based on the semiconductor device of silicon substrate, longitudinal breakdown problem can be there is when device drain terminal applies high pressure, thus make the voltage endurance capability of device be subject to the restriction longitudinally punctured.
Because AlGaN/GaN heterojunction utilizes piezoelectricity and spontaneous polarization effect to form high density two-dimensional electron gas, this structure is made to have very low conducting resistance.But realize certain power density and the power device meeting specific voltage conversion, puncture voltage is a very important parameter, current research person has devised a lot of Method and Technology improving power device puncture voltage in Si power device.But the special withstand voltage mechanism of AlGaN/GaN HEMTs device makes the silicon technology of design optimization high-breakdown-voltage can not directly transplanting.In order to address this problem, this patent proposes a kind of longitudinal voltage endurance capability improving device by encapsulation and carrys out the withstand voltage of optimised devices.
Summary of the invention
The present invention proposes a kind of semiconductor device package improving the longitudinal voltage endurance capability of device.
The present invention proposes a kind of encapsulating structure of device with high electron mobility of III-V semi-conducting material, its feature described comprises: the voltage endurance capability improving device.The semiconductor device package that the present invention proposes, wherein semiconductor device contains the structure of 2DEG, achieves the reduction of conducting resistance and conduction loss.
And this semiconductor package comprises following one or more features: the DBC substrate 1) insulated.2) semiconductor device described in is arranged on described DBC substrate.3) substrate obtained is connected to outer enclosure substrate by lead-in wire.
A kind of semiconductor device package improving device withstand voltage ability, wherein semiconductor device feature is: this semiconductor device includes the first layer III-V semiconductor material layer, second layer III-V semiconductor material layer and three ports, wherein, second layer III-V semiconductor material layer is stacked in the first layer III-V semiconductor material layer, and 2DEG channel shape is formed in the first layer III-V semiconductor material layer.First port is source electrode, and carry out ohmic contact with the first layer III-V semiconductor material layer, the second port is drain electrode, carries out ohmic contact with the first layer III-V semiconductor material layer.3rd port is gate electrode, carries out Schottky contacts with the second layer III-V semiconductor material layer.
The DBC substrate of an insulation has three-decker, and this DBC substrate is two-layer is up and down the material of copper coin or similar functions, central filler AlN semi-conducting material, or possesses the material of similar functions.Described DBC substrate upper end contacts with described semiconductor device, and lower end is connected with outer enclosure substrate.DBC substrate is between package leadframe and semiconductor device.
Accompanying drawing explanation
Fig. 1 is a kind of generalized section (wherein semiconductor material devices internal structure does not draw) improving the semiconductor device package of device withstand voltage ability.
Embodiment
Fig. 1 is a kind of generalized section improving the semiconductor device package of device withstand voltage ability of the present invention, describes in detail below in conjunction with Fig. 1.
Improving a semiconductor device package for device withstand voltage ability, comprise, outer enclosure substrate 100, is insulating barrier.External metallization electrode 101.102-104 is the DBC substrate of conduction, and wherein 102 and 104 is the material of copper coin or similar functions, and 103 is the material of AlN semi-conducting material or other similar functions.102 are connected with 101 by line.105 is semiconductor device, and 105 is semiconductor device substrate, contacts with 104.106-108 is three ports of semiconductor device.106 is the drain electrode port of semiconductor device, is connected with 102 by line.
Set forth the present invention by above-mentioned example, other example also can be adopted to realize the present invention, the present invention is not limited to above-mentioned instantiation, and therefore the present invention is limited by claims scope simultaneously.

Claims (6)

1. improve a semiconductor device package for the longitudinal voltage endurance capability of device, it is characterized in that:
Semiconductor device prepared by III-V group semi-conductor material;
The DBC substrate of insulation;
Described semiconductor device is arranged on described DBC substrate;
The substrate obtained is connected to outer enclosure substrate by lead-in wire.
2. semiconductor device package as claimed in claim 1, wherein, the described semiconductor device the superiors are the channel layers wherein forming 2DEG in the access area of device.
3. semiconductor device package as claimed in claim 1, described semiconductor device substrate is silicon semiconductor material.
4. semiconductor device package as claimed in claim 1, described DBC substrate is nonconducting.
5. semiconductor device package as claimed in claim 1, wherein, described DBC substrate can be arbitrary structures.
6. semiconductor device package as claimed in claim 1, wherein, described DBC substrate upper end contacts with described semiconductor device, and lower end is connected with outer enclosure substrate.DBC substrate is between package leadframe and semiconductor device.
CN201310326155.XA 2013-07-31 2013-07-31 Semiconductor device encapsulation structure for increasing longitudinal voltage endurance capability of device Pending CN104347582A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310326155.XA CN104347582A (en) 2013-07-31 2013-07-31 Semiconductor device encapsulation structure for increasing longitudinal voltage endurance capability of device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310326155.XA CN104347582A (en) 2013-07-31 2013-07-31 Semiconductor device encapsulation structure for increasing longitudinal voltage endurance capability of device

Publications (1)

Publication Number Publication Date
CN104347582A true CN104347582A (en) 2015-02-11

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310326155.XA Pending CN104347582A (en) 2013-07-31 2013-07-31 Semiconductor device encapsulation structure for increasing longitudinal voltage endurance capability of device

Country Status (1)

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CN (1) CN104347582A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110278706A1 (en) * 2010-05-11 2011-11-17 iQXPRZ Power Inc. Power Electronic Device Package
CN102339818A (en) * 2010-07-15 2012-02-01 台达电子工业股份有限公司 Power module
US20130147540A1 (en) * 2011-12-07 2013-06-13 Transphorm Inc. Semiconductor modules and methods of forming the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110278706A1 (en) * 2010-05-11 2011-11-17 iQXPRZ Power Inc. Power Electronic Device Package
CN102339818A (en) * 2010-07-15 2012-02-01 台达电子工业股份有限公司 Power module
US20130147540A1 (en) * 2011-12-07 2013-06-13 Transphorm Inc. Semiconductor modules and methods of forming the same

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