CN104298579B - A kind of logic chip and comprise the board card device of this logic chip - Google Patents
A kind of logic chip and comprise the board card device of this logic chip Download PDFInfo
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Abstract
The invention discloses a kind of logic chip and the board card device comprising this logic chip, described logic chip specifically includes serial ports control station module and mode control register；Wherein, described serial ports control station module, for receiving the reading writing information for reading and writing described mode control register from subscriber equipment, and it is written and read processing to described mode control register according to described reading writing information；And, it is thus achieved that the read-write result that described mode control register is corresponding, and read-write result corresponding for described mode control register is fed back to described subscriber equipment.In the embodiment of the present invention, by increasing serial ports control station module inside logic chip, to be written and read operating to mode control register by serial ports control station module, thus avoid existing between the function debugging of logic chip and the debugging of processor dependence, improve debugging efficiency.Aforesaid way can utilize the slack resources of FPGA, it is not necessary to additionally increases chip.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a logic reading chip and a board card device comprising the logic reading chip.
Background
The complex digital circuit Board card is provided with a logic chip which is used for being matched with a BMC (Board management controller) to realize the control of key signals of the Board card and realize auxiliary functions required by the operation of the Board card. The Logic chip is realized by a CPLD (Complex Programmable Logic Device) or an FPGA (Field Programmable Gate Array), and the functions of the Logic chip include: generating a system reset sequence, assigning reset and interrupt signals. The configuration or management of the processor or other functional chips and modules is realized. The functions of local interface conversion, multi-path selection and bus distribution are realized. The functions of PGOOD (Power Good) monitoring, abnormal reset recording, board card hardware watchdog, board card main/standby switching, hardware timer and the like are realized.
Among the above functions, functions that the logic chip can independently perform include reset timing, power-on configuration, and the like. For other functions, the logic chip needs to cooperate with the processor to be able to complete. In general, the interaction between the state information and the control information is realized between the logic chip and the processor through a group of state control registers, that is, the processor writes the control information into the state control registers, triggers the logic chip to generate related functions, and writes the state information into the state control registers for the processor to read.
In the prior art, function debugging of a logic chip needs to rely on read-write operations of a processor on a state control register, so that a simplified logic version needs to be generated first to enable the processor to complete starting, and a register read-write interface between the processor and the logic chip needs to be debugged. Furthermore, after the debugging of the read-write interface of the register is completed, the function debugging of the logic chip can be gradually completed.
Because the dependency relationship exists between the function debugging of the logic chip and the debugging of the processor, the debugging process needs to be carried out in sequence, and the efficiency is low. Because the logic chip has an important influence on the reset signal of the processor, the abnormal reset of the processor can be caused in the debugging process, and the debugging process is interrupted unexpectedly.
Disclosure of Invention
Embodiments of the present invention provide a logic chip and a board card device including the logic chip, so as to avoid a dependency relationship between a function debugging of the logic chip and a debugging of a processor, and improve a debugging efficiency.
The embodiment of the invention provides a logic chip which specifically comprises a serial port console module and a state control register; the serial port console module is used for receiving read-write information used for reading and writing the state control register from user equipment and performing read-write processing on the state control register according to the read-write information; and obtaining a read-write processing result corresponding to the state control register, and feeding back the read-write processing result corresponding to the state control register to the user equipment.
The logic chip also comprises a MUX, the MUX is connected with the serial port console module, and the MUX is connected with the state control register; the MUX is used for determining that a working mode is a debugging mode when receiving a judgment signal, and maintaining the connection between the MUX and the serial port console module, so that the serial port console module is connected with the state control register through the MUX, and the serial port console module performs read-write processing on the state control register.
The serial port console module is specifically configured to, after receiving read-write information in a character string format for reading and writing the state control register from the user equipment, translate the read-write information in the character string format into read-write information in a binary format by using an ASCII code resolution function, and perform read-write processing on the state control register according to the read-write information in the binary format; and after the read-write processing result in the binary format corresponding to the state control register is obtained, translating the read-write processing result in the binary format into the read-write processing result in the character string format corresponding to the state control register by using an ASCII (American standard code for information interchange) encoding and analyzing function, and feeding back the read-write processing result in the character string format corresponding to the state control register to the user equipment.
The serial port console module specifically comprises: the system comprises a serial port controller, a command receiving state machine, a console state machine, a command analyzing state machine, a command processing state machine and a printing service state machine;
the serial port controller is used for receiving read-write information from the user equipment for reading and writing the state control register and sending the read-write information to the command receiving state machine;
the command receiving state machine is used for storing the read-write information into a receiving cache, storing the read-write information into the command cache when the read-write information is effective information, and informing the console state machine of operating;
the console state machine is used for informing the command analysis state machine to analyze the read-write information after the operation command is obtained and informing the command processing state machine to process the read-write information;
the command analysis state machine is used for splitting the read-write information into commands, addresses and data information;
the command processing state machine is used for generating a register read-write interface time sequence and storing data information;
and the printing service state machine is used for monitoring the running state of the console state machine and providing printing information.
The console state machine is specifically used for entering an initialization state after reset and informing the printing service state machine of printing help information; entering a printing command prompt state and informing the printing service state machine of the printing command prompt; entering an idle state; in an idle state, when an effective command is detected, entering a command analysis state; when the command analysis is completed, entering a command execution state; under the command execution state, entering a command processing state according to the analyzed command code; in the command processing state, printing command prompt symbols, help information and error information, reading and writing a state control register and a printing register list, filling contents to be printed into a sending cache, and informing the printing service state machine of printing the contents in the sending cache; and entering a printing command prompt state and transitioning to an idle state.
The command receiving state machine is specifically used for entering a recording state after resetting and identifying a command input by a user according to a character string input by the user; in the recording state, when ASCII codes are detected, the user inputs the ASCII codes as combination keys to enter the combination state, otherwise, the input character strings are stored in a receiving cache and are subjected to backspace and deletion processing; when the carriage return code is detected, storing the received cache as a command input by a user into a command cache; in the combined state, when 0x4F is detected, it indicates that the user inputs a function key, and enters the function FUNC state; in the combined state, when 0x5B is detected, it indicates that the user input is a control key, and enters the control CTRL state; under the FUNC state, according to the function key value input and identified by the user, filling the command cache with the command code expected by the user so as to finish the binding of the function key and the user command; and under the CTRL state, identifying a control key value according to user input, and filling a command cache with a command code expected by a user to finish the binding of the control key and the user command.
The command parsing state machine is specifically configured to initialize to an idle state when the console state machine is currently in a non-command parsing state; when the console state machine is currently in a command analysis state, entering the analysis state, and storing the analyzed command as a command code ps _ cmd;
in the analysis state, analyzing and checking the command code, address and data in the user command; when an invalid command is found, setting ps _ cmd to an invalid identifier; generating valid ps _ cmd when a valid command is found; after the analysis and the validity check are completed, entering a state of completing the analysis and generating an identification signal of completing the command analysis; the exit state is entered.
The command processing state machine is specifically used for entering an idle state after reset; after the command analysis completion identifier is received, performing state jump according to the command code ps _ cmd; when ps _ cmd is a WRITE command, entering a WRITE state, generating a register WRITE time sequence and then returning to an idle state; when ps _ cmd is a READ command, entering a READ state, generating a register READ time sequence and then returning to an idle state; when ps _ cmd is a list command, completion of list printing is suspended using READ, print list.
The printing service state machine is used for entering an idle state after reset; entering an initialization state after receiving a print notification; when the serial port controller is available, entering a sending preparation state; entering a byte sending state; and in the ready state and the byte state, the transmission content is filled and transmitted, and the content in the transmission buffer is transmitted as a sentence in turn by the serial port controller each time printing is carried out until the counter displays that the content in the transmission buffer is emptied or a sentence end terminator is detected.
The embodiment of the invention also provides a board card device, which specifically comprises the logic chip and the processor; and the processor is connected with a Multiplexer (MUX) in the logic chip through a register read-write interface.
Compared with the prior art, the embodiment of the invention at least has the following advantages: in the embodiment of the invention, the serial port console module is added in the logic chip to perform read-write operation on the state control register through the serial port console module, so that the dependence between the function debugging of the logic chip and the debugging of the processor is avoided, and the debugging efficiency is improved. Furthermore, the above method can utilize idle resources of programmable logic, and a serial console module is embedded in the chip, so that after the logic chip is powered on, a simple console service can be provided for a debugger through a serial port, and the debugger can access the state control register in the logic chip through a simple serial port command without depending on a processor to complete debugging of the related functional module. Furthermore, the mode does not need to additionally increase a chip, so that the PCB (Printed Circuit Board) resource of the single Board can be saved, the debugging process does not depend on the development of processor software, the debugging process is more flexible and free, no correlation coupling exists between the logic chip and the processor, the problem positioning is convenient, the switching can be realized with the existing serial port of the single Board, the design is simple, and the realization is easy.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings of the embodiments of the present invention without creative efforts.
Fig. 1 is a schematic structural diagram of a system according to a first embodiment of the present invention;
fig. 2 is a flowchart of a read-write processing method based on a serial console module in an embodiment of the present invention;
fig. 3 is a functional schematic diagram of a serial console module according to an embodiment of the present invention;
FIG. 4 is a functional diagram of a console state machine according to an embodiment of the present invention;
FIG. 5 is a functional diagram of a command receiving state machine according to a first embodiment of the present invention;
FIG. 6 is a functional diagram of a command parsing state machine according to an embodiment of the present invention;
FIG. 7 is a functional diagram of a command processing state machine according to one embodiment of the present invention;
FIG. 8 is a functional diagram of a printing service state machine according to an embodiment of the present invention;
fig. 9A and 9B are schematic structural diagrams of a logic chip according to a second embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example one
Aiming at the problems in the prior art, an embodiment of the present invention provides a read-write processing method based on a serial console module, which is used for debugging a logic chip and is applied to a single board containing the logic chip. Further, the method is applied to a system comprising the user equipment and the board card device, and the board card device can be a part of circuits in a complex digital circuit board card.
Fig. 1 is a schematic view of an application scenario of the embodiment of the present invention, where the board card device includes a logic chip and a processor, and the logic chip includes a serial console module, a MUX (multiplexer), and a state control register (group). The serial port console module is connected with the user equipment through a serial port, and the user equipment provides a reset signal for the serial port console module. The MUX is connected with the serial port console module, the MUX is connected with the state control register, and the processor is connected with the MUX through the register read-write interface.
In the embodiment of the invention, when the MUX does not receive the decision Signal (SEL), the operation mode is determined to be the non-debugging mode, namely the normal operation mode. In this case, the MUX disconnects the MUX from the serial console module, and maintains the connection between the MUX and the processor, so that the processor is connected to the status control register through the MUX, and the processor performs read/write processing on the status control register. A register read-write interface exists between the processor and the logic chip, the processor accesses the state control register through the register read-write interface in a normal working state of the board card, and the processor performs read-write processing on the state control register, and the process of performing read-write processing on the state control register by the processor is not repeated herein.
In the embodiment of the invention, when the MUX receives a decision Signal (SEL), the operation mode is determined to be a debugging mode. Under the condition, the MUX disconnects the MUX from the processor, and the connection between the MUX and the serial console module is maintained, so that the serial console module is connected with the state control register through the MUX, and the state control register is read and written by the serial console module. Under the debugging mode, the internal part of the logic chip disconnects a communication interface between the processor and the state control register, and the communication interface of the serial port console module is connected to the state control register by using the MUX, at the moment, the serial port console module acts as an Agent (Agent) role, and a serial port is used for interacting with user equipment (namely a PC (personal computer) user), so that the user equipment accesses the state control register through the serial port console module, and the user equipment reads and writes the state control register through the serial port console module. The process of the serial console module performing read-write processing on the state control register is explained in detail in the subsequent steps.
The decision Signal (SEL) for interface gating by the MUX may be from a pin input outside the logic chip (e.g., a dial switch, a pull-up/down resistor, or other control chip GPIOs), or may use a register signal inside the logic chip, for example, to complete the gating switching of the register read/write interface through register configuration. Further, under the condition that serial port resources in the panel or the board are limited, the serial port of the logic chip may also be shared and switched with other serial port circuits (such as a processor serial port) of the single board, and the sharing and switching may be performed inside the logic chip or outside the logic chip.
As shown in fig. 2, the read-write processing method based on the serial console module specifically includes the following steps:
step 201, the serial console module receives read-write information (i.e. command) for reading and writing the status control register from the user equipment, and performs read-write processing on the status control register according to the read-write information.
The state control register may also be a state control register set inside the logic chip.
Step 202, the serial console module obtains the read-write processing result corresponding to the state control register (state control register set), and feeds back the read-write processing result corresponding to the state control register to the user equipment.
In the embodiment of the present invention, after receiving the read-write Information (i.e., the string command) in the string format for reading and writing the status control register from the user equipment, the serial console module may translate the read-write Information in the string format into read-write Information in the binary format by using an ASCII (American Standard Code for Information exchange) encoding and parsing function, and perform read-write processing on the status control register according to the read-write Information in the binary format. Further, after the serial console module obtains the read-write processing result in the binary format corresponding to the state control register, the serial console module translates the read-write processing result in the binary format corresponding to the state control register into the read-write processing result in the character string format corresponding to the state control register by using an ASCII encoding and parsing function, and feeds back the read-write processing result in the character string format corresponding to the state control register to the user equipment.
As shown in fig. 3, the functional diagram of the serial console module is shown, the serial console module includes a serial controller and an ASCII code parsing module, the serial controller is used for receiving and transmitting information, the ASCII code parsing module is used for providing a function of converting between a binary byte stream and a character string, for example, the ASCII code parsing module translates read-write information in a character string format into read-write information in a binary format, and the ASCII code parsing module translates read-write processing results in a binary format into read-write processing results in a character string format.
As shown in fig. 3, in the embodiment of the present invention, the serial console module specifically includes but is not limited to: the system comprises a serial port controller, a command receiving state machine, a console state machine, a command analyzing state machine, a command processing state machine and a printing service state machine. Based on the read-write information, the serial port controller receives the read-write information used for reading and writing the state control register from the user equipment and sends the read-write information to the command receiving state machine; the command receiving state machine stores the read-write information into a receiving cache, stores the read-write information into the command cache when the read-write information is effective information, and informs the console state machine to operate; after the console state machine obtains the operation command, the console state machine informs the command analysis state machine to analyze the read-write information and informs the command processing state machine to process the read-write information; the command analysis state machine divides the read-write information into commands, addresses and data information; the command processing state machine generates a register read-write interface time sequence and stores return data information; the printing service state machine monitors the running state of the console state machine and provides printing information.
Specifically, the data received by the serial port controller is stored in the RBUF (receive Buffer) by the Command receiving state machine, and after the basic validity judgment is performed, the valid data can be stored in the CBUF (Command Buffer) and the console state machine is notified to perform related operations. The console state machine enters an initial state after being reset after being powered on, then user command input is monitored, after an effective command is obtained, a self state signal is used for informing the command analysis state machine to analyze the user command, the command processing state machine is informed to process the user command, the command in a user character string form can be split into command, address and data information in the analysis process, and the processing process comprises the steps of generating a register read-write interface time sequence, storing returned data information and the like. The printing service state machine monitors the running state of the console state machine in real time, can provide screen printing required by a user under the corresponding state, and comprises printing welcome and help information and relevant data for returning the command processing state machine to the user. When printing, the print content is first put into a TBUF (Transmit Buffer) and the serial port controller is notified to Transmit the Buffer content.
In the above processing procedure of the embodiment of the present invention, the state jump flows of 5 state machines are respectively a jump flow of a console state machine, a jump flow of a command receiving state machine, a jump flow of a command analyzing state machine, a jump flow of a command processing state machine, and a jump flow of a printing service state machine. The following describes the state jump flow of the above 5 state machines in detail with reference to specific embodiments.
Fig. 4 is a functional diagram of a Console State Machine, which is named as c _ sm (Console State-Machine), and the State jump and processing flow thereof are shown in fig. 4.
The console state machine enters an initialization state after being reset, and informs the printing service state machine of printing help information; the console state machine enters a printing command prompt state and informs the printing service state machine of the printing command prompt; the console state machine enters an idle state. Specifically, the console state machine enters an initialization state after being reset, and prints related help information; after the console state machine finishes printing, the console state machine enters a printing command prompt state and prints a command prompt; after the console state machine finishes printing the command prompt each time, the console state machine automatically enters an idle state.
In an idle state, when a console state machine detects an effective command, the console state machine enters a command analysis state; when the command analysis is completed, the console state machine enters a command execution state; under the command execution state, the console state machine enters a command processing state according to the analyzed command codes; in the command processing state, the console state machine prints command prompt symbols, help information and error information, reads and writes a state control register and a printing register list, fills contents to be printed into a sending cache, and informs the printing service state machine of printing the contents in the sending cache. Specifically, in the idle state, when no valid command is input, the console state machine enters a print playback state to perform playback of input information, and after playback is completed, the console state machine returns to the idle state. Further, in an idle state, when a valid command is detected, the console state machine enters a command analysis state; when the command analysis is completed, the console state machine enters a command execution state; in the command execution state, the console state machine enters a corresponding command processing state according to the analyzed command code ps _ cmd, and performs operations such as command prompt, help information and error information printing, reading/writing of a board control logic register, printing of a register list and the like. Further, for the operation related to printing, the console state machine will sequentially fill the contents to be printed into the TBUF buffer, and send a print notification signal to the print service state machine.
The console state machine enters the print command prompt state and transitions to the idle state. Specifically, after the above operations are completed, the console state machine enters a print command prompt state and transitions to an idle state.
In the second case, as shown in fig. 5, the function diagram of the command receiving State Machine is shown, the name of the command receiving State Machine is i _ sm (Input State-Machine), and the State jump and processing flow of the command receiving State Machine is shown in fig. 5.
The command receiving state machine enters a recording state after being reset, and a command input by a user is identified according to a character string input by the user; in the recording state, when ASCII codes are detected, the user input is represented as a combination key, and the command receiving state machine enters the combination state, otherwise, the command receiving state machine stores the input character strings in a receiving cache and performs backspace and delete processing; when the carriage return code is detected, the command receiving state machine stores the receiving cache as a command input by the user into the command cache. Specifically, the command receiving state machine enters a recording state after being reset, and the command input by the user is identified according to the ASCII code character (string) input by the user; in the recording state, when detecting ESC code (ASCII code), it represents that the user input is a combination key, and enters the COMBO state, otherwise, the input character string is received to RBUF (Receive buffer), and the processing of backspace, delete, etc. is carried out. When a CR code (enter) is detected, the command receiving state machine puts RBUF into cbuf (command buffer) as a user-entered command.
In the combined state, when 0x4F is detected, indicating that the user input is a function key, the receiving state machine is commanded to enter the function FUNC state; in the combined state, when 0x5B is detected, indicating that the user input is a control key, the receiving state machine is commanded to enter the control CTRL state. Specifically, in COMBO state, the receiving state machine is commanded to enter the FUNC state when a 0x4F is detected, and to enter the CTRL state when a 0x5B is detected.
In the FUNC state, the command receiving state machine identifies a function key value according to the input of a user, fills a command code expected by the user into a command cache, and completes the binding of the function key and the user command; in the CTRL state, the command receiving state machine identifies a control key value according to user input, fills a command code expected by a user into the command cache, and completes the binding of the control key and the user command. Specifically, in the FUNC state, the command receiving state machine further identifies function key values (such as F1/F2/F3 …) according to the input, fills the CBUF with command codes desired by the user, and completes the binding of the function keys and the user commands; in the CTRL state, the command receiving state machine further identifies control key values (such as Home/End/Left/Right …) according to the input, fills the CBUF with command codes expected by the user, and completes the binding of the control keys and the user commands.
Fig. 6 shows a functional diagram of a command parsing State Machine, where the name of the command parsing State Machine is ps _ sm (park State-Machine), and a State jump and processing flow of the command parsing State Machine are shown in fig. 6.
When the console state machine is currently in a non-command analysis state, initializing the command analysis state machine to be in an idle state; when the console state machine is currently in a command analysis state, the command analysis state machine enters the analysis state, and the analyzed command is stored as a command code ps _ cmd. Specifically, when the console state machine c _ sm is in a non-PARSE (parsing) state, the command parsing state machine is initialized to an idle state; otherwise, the CBUF is converted from the binary byte into a character string and enters a parsing state, namely the command parsing state machine enters the parsing state, and the command parsed by the command parsing state machine is stored as a ps _ cmd signal.
In the analysis state, the command analysis state machine analyzes and checks the command code, address and data in the user command; when an invalid command is found, the command analysis state machine sets ps _ cmd to an invalid identifier; when a valid command is found, the command resolution state machine may generate a valid ps _ cmd. Specifically, in the parsing state, the command parsing state machine parses and checks the command code, address, and data in the user command. When an invalid command is found, the command analysis state machine sets ps _ cmd to be invalid identification, directly completes analysis and leaves; in the parsing state, when a valid command is found, the command parsing state machine may further add a parsing step according to the command format and generate a valid ps _ cmd signal and associated address, data, parameter signals, which may be defined by the user.
After the analysis and the validity check are completed, the command analysis state machine enters a state of completing the analysis and generates an identification signal of completing the command analysis; the command resolution state machine enters the exit state. Specifically, after the command analysis state machine completes analysis, the command analysis state machine sequentially enters a state of completing analysis and a state of leaving, and in the state of completing analysis and the state of leaving, the command analysis state machine is used for generating an identification signal for completing command analysis.
Fig. 7 shows a functional diagram of a command processing state machine, where the command processing state machine implements a desired logic function according to a user command, and is used to generate information of read/write timing of a state control register inside a logic chip, and a state jump and a processing flow of the command processing state machine are shown in fig. 7.
The command processing state machine enters an idle state after reset. Further, after the command parsing completion identifier is received, the command processing state machine performs state jump according to the command code ps _ cmd.
When ps _ cmd is a WRITE command, the command processing state machine enters a WRITE (WRITE) state, and returns to an idle state after a register WRITE time sequence is generated; when ps _ cmd is a READ command, the command processing state machine enters a READ (READ) state, generates a register READ time sequence and returns to an idle state; when ps _ cmd is a list command, the command processing state machine completes list printing using READ, print list, pause. Specifically, the command processing state machine can complete list printing of the state control registers inside all the logic chips by using three states, namely, a READ state, a print list state, a pause state and the like.
And a fifth case, as shown in fig. 8, which is a functional schematic diagram of the printing service State Machine, where the name of the printing service State Machine is p _ sm (Print State-Machine), and the printing operations performed by other functional modules (such as console State Machine, command processing State Machine, etc.) are all implemented by issuing a printing notification to the printing service State Machine and generating Print content, and the State jump and the processing flow are as shown in fig. 8.
The printing service state machine enters an idle state after being reset; after receiving the printing notification, the printing service state machine enters an initialization state; when the serial port controller is available, the printing service state machine enters a sending preparation state; the print service state machine enters the send byte state. Specifically, the printing service state machine enters an idle state after being reset, and after receiving a printing notification, the printing service state machine enters an initialization state and enters a sending preparation state after waiting until a sending controller in the serial port controller is available.
The printing service state machine realizes the filling and sending of the sending content under the state of sending preparation and sending bytes, and the content in the sending buffer is used as a sentence in each printing and is sent by the serial port controller in turn until the counter displays that the content in the sending buffer is emptied or a sentence end terminator is detected. Specifically, the print service state machine uses 2 states, such as a ready-to-send state and a byte-to-send state, and the print service state machine can implement loading and sending of the sent content, and each time printing is performed, the print service state machine needs to fill the contents in the TBUF as one sentence into the tx _ byte port of the serial port controller in sequence for sending until the counter indicates that the contents of the TBUF are emptied or detects the end of the sentence.
Based on the technical scheme, the embodiment of the invention at least has the following advantages: in the embodiment of the invention, the serial port console module is added in the logic chip to perform read-write operation on the state control register through the serial port console module, so that the dependence between the function debugging of the logic chip and the debugging of the processor is avoided, and the debugging efficiency is improved. Furthermore, the above method can utilize idle resources of programmable logic, and a serial console module is embedded in the chip, so that after the logic chip is powered on, a simple console service can be provided for a debugger through a serial port, and the debugger can access the state control register in the logic chip through a simple serial port command without depending on a processor to complete debugging of the related functional module. Furthermore, the mode does not need to additionally increase a chip, so that the PCB (Printed Circuit Board) resource of the single Board can be saved, the debugging process does not depend on the development of processor software, the debugging process is more flexible and free, no correlation coupling exists between the logic chip and the processor, the problem positioning is convenient, the switching can be realized with the existing serial port of the single Board, the design is simple, and the realization is easy. Furthermore, the serial console command can be expanded according to requirements, so that secondary development is facilitated.
Example two
Based on the same inventive concept as the above method, an embodiment of the present invention further provides a logic chip 1, as shown in fig. 9A, where the logic chip 1 specifically includes a serial console module 11, a multiplexer MUX12, and a state control register 13, the MUX12 is connected to the serial console module 11, and the MUX12 is connected to the state control register 13; wherein,
the serial port console module 11 is configured to receive read-write information from a user equipment, the read-write information being used for reading and writing the state control register 13, and perform read-write processing on the state control register 13 according to the read-write information; and obtaining a read-write processing result corresponding to the state control register 13, and feeding back the read-write processing result corresponding to the state control register 13 to the user equipment.
The MUX12 is configured to determine that a working mode is a debug mode when receiving the decision signal, and maintain the connection between the MUX12 and the serial console module 11, so that the serial console module 11 is connected to the state control register 13 through the MUX12, and the serial console module 11 performs read/write processing on the state control register 13.
The serial console module 11 is specifically configured to, after receiving read-write information in a character string format for reading and writing the state control register 13 from the user equipment, translate the read-write information in the character string format into read-write information in a binary format by using an ASCII code parsing function, and perform read-write processing on the state control register 13 according to the read-write information in the binary format; and after obtaining the read-write processing result in the binary format corresponding to the state control register 13, translating the read-write processing result in the binary format into the read-write processing result in the character string format corresponding to the state control register 13 by using an ASCII code analysis function, and feeding back the read-write processing result in the character string format corresponding to the state control register 13 to the user equipment.
As shown in fig. 9B, the serial console module 11 includes: a serial port controller 111, a command receiving state machine 112, a console state machine 113, a command parsing state machine 114, a command processing state machine 115, and a printing service state machine 116; the serial port controller 111 is configured to receive read-write information from the user equipment, where the read-write information is used to read and write the state control register 13, and send the read-write information to the command receiving state machine 112; the command receiving state machine 112 is configured to store the read-write information in a receiving cache, store the read-write information in a command cache when the read-write information is valid information, and notify the console state machine 113 to perform an operation; the console state machine 113 is configured to notify the command analysis state machine 114 to analyze the read-write information after the operation command is obtained, and notify the command processing state machine 115 to process the read-write information; the command parsing state machine 114 is configured to split the read-write information into a command, an address, and data information; the command processing state machine 115 is configured to generate a register read-write interface timing sequence and store return data information; the printing service state machine 116 is configured to monitor an operation state of the console state machine 113 and provide printing information.
The console state machine 113 is specifically configured to enter an initialization state after being reset, and notify the printing service state machine 116 to print the help information; enter the print command prompt state and notify the print service state machine 116 of the print command prompt; entering an idle state; in an idle state, when an effective command is detected, entering a command analysis state; when the command analysis is completed, entering a command execution state; under the command execution state, entering a command processing state according to the analyzed command code; in the command processing state, printing command prompt, help information and error information, reading and writing a state control register and a printing register list, filling contents to be printed into a sending cache, and informing the printing service state machine 116 of printing the contents in the sending cache; and entering a printing command prompt state and turning to an idle state.
The command receiving state machine 112 is specifically configured to enter a recording state after reset, and recognize a command input by a user according to a user input character string; in the recording state, when ASCII codes are detected, the user inputs the ASCII codes as combination keys to enter the combination state, otherwise, the input character strings are stored in a receiving cache and are subjected to backspace and deletion processing; when the carriage return code is detected, storing the received cache as a command input by a user into a command cache; in the combined state, when 0x4F is detected, it indicates that the user inputs a function key, and enters the function FUNC state; in the combined state, when 0x5B is detected, it indicates that the user input is a control key, and enters the control CTRL state; under the FUNC state, according to the function key value input and identified by the user, filling the command cache with the command code expected by the user so as to finish the binding of the function key and the user command; and under the CTRL state, identifying a control key value according to user input, and filling a command cache with a command code expected by a user to finish the binding of the control key and the user command.
The command parsing state machine 114 is specifically configured to initialize to an idle state when the console state machine 113 is currently in a non-command parsing state; when the console state machine 113 is currently in a command parsing state, entering the parsing state, and storing the parsed command as a command code ps _ cmd;
in the analysis state, analyzing and checking the command code, address and data in the user command; when an invalid command is found, setting ps _ cmd to an invalid identifier; generating valid ps _ cmd when a valid command is found; after the analysis and the validity check are completed, entering a state of completing the analysis and generating an identification signal of completing the command analysis; the exit state is entered.
The command processing state machine 115 is specifically configured to enter an idle state after reset; after the command analysis completion identifier is received, performing state jump according to the command code ps _ cmd; when ps _ cmd is a WRITE command, entering a WRITE state, generating a register WRITE time sequence and then returning to an idle state; when ps _ cmd is a READ command, entering a READ state, generating a register READ time sequence and then returning to an idle state; when ps _ cmd is a list command, completion of list printing is suspended using READ, print list.
The print service state machine 116 to enter an idle state after reset; entering an initialization state after receiving a print notification; when the serial port controller is available, entering a sending preparation state; entering a byte sending state; and in the ready state and the byte state, the transmission content is filled and transmitted, and the content in the transmission buffer is transmitted as a sentence in turn by the serial port controller each time printing is carried out until the counter displays that the content in the transmission buffer is emptied or a sentence end terminator is detected.
The modules of the device can be integrated into a whole or can be separately deployed. The modules can be combined into one module, and can also be further split into a plurality of sub-modules.
EXAMPLE III
Based on the same inventive concept as the method, the embodiment of the present invention further provides a board card device, where the board card device specifically includes the logic chip and the processor in the second embodiment; and the processor is connected with the MUX in the logic chip through a register read-write interface. Based on this, the MUX12 is configured to determine that the operating mode is the debug mode when the decision signal is received; disconnecting the MUX12 from the processor, and maintaining the connection between the MUX12 and the serial console module 11, so that the serial console module 11 is connected to the status control register 13 through the MUX12, and the serial console module 11 performs read/write processing on the status control register 13; and determining the working mode as a non-debugging mode when the judgment signal is not received; the MUX12 is disconnected from the serial console module 11, and the MUX12 is kept connected to the processor, so that the processor is connected to the status control register 13 through the MUX12, and the processor performs read/write processing on the status control register 13.
Through the above description of the embodiments, those skilled in the art will clearly understand that the present invention may be implemented by software plus a necessary general hardware platform, and certainly may also be implemented by hardware, but in many cases, the former is a better embodiment. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute the methods according to the embodiments of the present invention. Those skilled in the art will appreciate that the drawings are merely schematic representations of one preferred embodiment and that the blocks or flow diagrams in the drawings are not necessarily required to practice the present invention. Those skilled in the art will appreciate that the modules in the devices in the embodiments may be distributed in the devices in the embodiments according to the description of the embodiments, and may be correspondingly changed in one or more devices different from the embodiments. The modules of the above embodiments may be combined into one module, or further split into multiple sub-modules. The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments. The above disclosure is only for a few specific embodiments of the present invention, but the present invention is not limited thereto, and any variations that can be made by those skilled in the art are intended to fall within the scope of the present invention.
Claims (8)
1. A logic chip is characterized in that the logic chip specifically comprises a serial port console module and a state control register; the serial port console module is used for receiving read-write information from user equipment for reading and writing the state control register and performing read-write processing on the state control register according to the read-write information; and obtaining a read-write processing result corresponding to the state control register, and feeding back the read-write processing result corresponding to the state control register to the user equipment;
the logic chip also comprises a Multiplexer (MUX), the MUX is connected with the serial port console module, and the MUX is connected with the state control register; the MUX is used for determining that a working mode is a debugging mode when a judgment signal is received, and maintaining the connection between the MUX and the serial port console module so that the serial port console module is connected with the state control register through the MUX and the state control register is read and written by the serial port console module;
wherein, serial port console module specifically includes: the system comprises a serial port controller, a command receiving state machine, a console state machine, a command analyzing state machine, a command processing state machine and a printing service state machine;
the serial port controller is used for receiving read-write information from the user equipment for reading and writing the state control register and sending the read-write information to the command receiving state machine;
the command receiving state machine is used for storing the read-write information into a receiving cache, storing the read-write information into the command cache when the read-write information is effective information, and informing the console state machine of operating;
the console state machine is used for informing the command analysis state machine to analyze the read-write information after the operation command is obtained and informing the command processing state machine to process the read-write information;
the command analysis state machine is used for splitting the read-write information into commands, addresses and data information;
the command processing state machine is used for generating a register read-write interface time sequence and storing data information;
and the printing service state machine is used for monitoring the running state of the console state machine and providing printing information.
2. The logic chip of claim 1,
the serial port console module is specifically configured to, after receiving read-write information in a character string format for reading and writing the state control register from the user equipment, translate the read-write information in the character string format into read-write information in a binary format by using an ASCII code resolution function, and perform read-write processing on the state control register according to the read-write information in the binary format; and after the read-write processing result in the binary format corresponding to the state control register is obtained, translating the read-write processing result in the binary format into the read-write processing result in the character string format corresponding to the state control register by using an ASCII (American standard code for information interchange) encoding and analyzing function, and feeding back the read-write processing result in the character string format corresponding to the state control register to the user equipment.
3. The logic chip of claim 1,
the console state machine is specifically used for entering an initialization state after reset and informing the printing service state machine of printing help information; entering a printing command prompt state and informing the printing service state machine of the printing command prompt; entering an idle state; in an idle state, when an effective command is detected, entering a command analysis state; when the command analysis is completed, entering a command execution state; under the command execution state, entering a command processing state according to the analyzed command code; in the command processing state, printing command prompt symbols, help information and error information, reading and writing a state control register and a printing register list, filling contents to be printed into a sending cache, and informing the printing service state machine of printing the contents in the sending cache; and entering a printing command prompt state and transitioning to an idle state.
4. The logic chip of claim 1,
the command receiving state machine is specifically used for entering a recording state after resetting and identifying a command input by a user according to a character string input by the user; in the recording state, when ASCII codes are detected, the user inputs the ASCII codes as combination keys to enter the combination state, otherwise, the input character strings are stored in a receiving cache and are subjected to backspace and deletion processing; when the carriage return code is detected, storing the received cache as a command input by a user into a command cache; in the combined state, when 0x4F is detected, it indicates that the user inputs a function key, and enters the function FUNC state; in the combined state, when 0x5B is detected, it indicates that the user input is a control key, and enters the control CTRL state; under the FUNC state, according to the function key value input and identified by the user, filling the command cache with the command code expected by the user so as to finish the binding of the function key and the user command; and under the CTRL state, identifying a control key value according to user input, and filling a command cache with a command code expected by a user to finish the binding of the control key and the user command.
5. The logic chip of claim 1,
the command parsing state machine is specifically configured to initialize to an idle state when the console state machine is currently in a non-command parsing state; when the console state machine is currently in a command analysis state, entering the analysis state, and storing the analyzed command as a command code ps _ cmd;
in the analysis state, analyzing and checking the command code, address and data in the user command; when an invalid command is found, setting ps _ cmd to an invalid identifier; generating valid ps _ cmd when a valid command is found; after the analysis and the validity check are completed, entering a state of completing the analysis and generating an identification signal of completing the command analysis; the exit state is entered.
6. The logic chip of claim 1,
the command processing state machine is specifically used for entering an idle state after reset; after the command analysis completion identifier is received, performing state jump according to the command code ps _ cmd; when ps _ cmd is a WRITE command, entering a WRITE state, generating a register WRITE time sequence and then returning to an idle state; when ps _ cmd is a READ command, entering a READ state, generating a register READ time sequence and then returning to an idle state; when ps _ cmd is a list command, completion of list printing is suspended using READ, print list.
7. The logic chip of claim 1,
the printing service state machine is used for entering an idle state after reset; entering an initialization state after receiving a print notification; when the serial port controller is available, entering a sending preparation state; entering a byte sending state; and in the ready state and the byte state, the transmission content is filled and transmitted, and the content in the transmission buffer is transmitted as a sentence in turn by the serial port controller each time printing is carried out until the counter displays that the content in the transmission buffer is emptied or a sentence end terminator is detected.
8. A board device comprising a processor, characterized in that the board device comprises in particular a logic chip according to any of claims 1 to 7; and the processor is connected with a Multiplexer (MUX) in the logic chip through a register read-write interface.
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| KR102396448B1 (en) * | 2017-10-19 | 2022-05-11 | 삼성전자주식회사 | Nonvolatile memory device and operation method thereof |
| CN108038255A (en) * | 2017-10-31 | 2018-05-15 | 惠州市金百泽电路科技有限公司 | A kind of automatic method for making pcb board set jigsaw |
| CN109656772A (en) * | 2018-12-14 | 2019-04-19 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of on-line debugging method of no intelligent chip interface module |
| CN110597749B (en) * | 2019-08-23 | 2021-10-22 | 锐捷网络股份有限公司 | Serial port switching method and device |
| CN110532196B (en) * | 2019-08-30 | 2021-10-01 | 英业达科技有限公司 | Complex programmable logic device with multi-address response and operation method |
| CN111857576B (en) * | 2020-06-24 | 2023-01-06 | 苏州浪潮智能科技有限公司 | Storage system for Ethernet management |
| CN113900864B (en) * | 2021-11-18 | 2023-11-21 | 南昌华勤电子科技有限公司 | Data reading and writing device and method |
| CN114664365B (en) * | 2022-02-09 | 2023-09-08 | 浙江地芯引力科技有限公司 | Memory data reading circuit, chip and hardware testing method |
| CN115220978B (en) * | 2022-09-19 | 2023-02-03 | 瀚博半导体(上海)有限公司 | Chip starting method and device including online debugging mode, chip and equipment |
| CN117669475A (en) * | 2023-12-29 | 2024-03-08 | 北京红树蓝树技术有限公司 | VDF construction method, chip, application, product, device and medium |
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