CN104283574B - software radio receiver circuit - Google Patents
software radio receiver circuit Download PDFInfo
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- CN104283574B CN104283574B CN201310289188.1A CN201310289188A CN104283574B CN 104283574 B CN104283574 B CN 104283574B CN 201310289188 A CN201310289188 A CN 201310289188A CN 104283574 B CN104283574 B CN 104283574B
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Abstract
The invention provides a software radio receiver circuit. The software radio receiver circuit comprises a low-noise radio-frequency front end circuit, a high-linearity radio frequency front end circuit, a harmonic attenuation radio frequency front end circuit, a common analog intermediate-frequency circuit, a local oscillator signal generation circuit, a biasing circuit and a control circuit. One end of the low-noise radio-frequency front end circuit is connected with the first end of the common analog intermediate-frequency circuit after the low-noise radio-frequency front end circuit is connected with the high-linearity radio frequency front end circuit in parallel. One end of the harmonic attenuation radio frequency front end circuit is connected with the first end of the common analog intermediate-frequency circuit .The local oscillator signal generation circuit is connected with the low-noise radio-frequency front end circuit, the high-linearity radio frequency front end circuit and the harmonic attenuation radio frequency front end circuit. The biasing circuit is used for providing a reference bias voltage and a reference bias current for the software radio receiver circuit. The control circuit is used for controlling work modes of the software radio receiver circuit. The software radio receiver circuit can meet the requirements of various application environments.
Description
Technical field
The present invention relates to software wireless electrical domain, more particularly to a kind of software radio receiver electricity
Road.
Background technology
In information age today, people using the transmission of information and interaction as social life must
Want ingredient.Wherein, radio communication is a most active part in the communications field, each
Individual aspect is obtained for and is widely applied.In order to meet the different demands of consumer, international communication
Organize the different communication standards that released one after another.In the face of miscellaneous standard, consumer Geng Xi
Prestige only can just support different communication services by an electronic equipment.
Software radio (SDR) technology is the wireless communication system architecture for proposing in recent years, most
It is early to be developed by military communication technology, its basic thought be by software configuring hardware, it is real
One of existing flexible restructural characteristic, key technical problems therein are exactly receiver circuit.
The effect of software radio receiver is that the mode of operation of radio-frequency transmitter is passed through software
Form is configured, and meets distinct communication standards requirement that is existing and will appear from.These communications
Standard mainly includes cellular communications system (2G-2.5G-3G etc.), wireless lan communication system
(802.11a/b/g/n etc.), wireless personal local area network communication system (Bluetooth, Zigbee etc.),
Broadcast communication system (DAB, DVB, DMB etc.) and navigation communication system (GPS, Galileo,
GLONASS, the Big Dipper) etc..Obviously, each communication standard has each different centers
Frequency, channel width, noise objective, linearity index etc..Therefore software radio receiver
The configurability of Larger Dynamic scope is must simultaneously have, the performance of distinct communication standards is met again
Index request.
Additionally, software radio receiver not only has flexible restructural feature, which is in low work(
Consumption application also has very big potentiality.Traditional wireless communication receiver needs to meet in design
The most rigors of communication system, therefore the cost of power consumption will necessarily be paid.For example receive electromechanical
The indexs such as the linearity on road, filtering performance, noiseproof feature, bandwidth and gain are all present with power consumption
Trade-off relation.And software radio receiver can be according to its different applied environment, flexibly
Ground configures its performance indications, under the requirement for meeting practical communication index, reduces overall receiver
Average power consumption.
Due to the applied environment of distinct communication standards it is different, received by software radio receiver
Signal quality be also not quite similar.In order to meet the application requirement of distinct communication standards, software without
Line electricity receiver must also have flexible configurable feature, meet under different application environment for
The requirement of specific indexes, such as：Low noise feature, high linearity feature, with harmonics restraint
Feature and low-power consumption feature etc..
It is domestic at present to only have a few patents achievement to occur：It is upgradeable based on software radio
OFDM transceivers (Chinese patent CN1964339A) include RF front-end circuit and base band
Control system, but be only capable of supporting the communication standard of OFDM, although possess software radio
Restructural feature, but do not possess the ability of compatible distinct communication standards；Multiple carrier software radio
The method (Chinese patent CN1175609C) of transceiver and its raising intelligent antenna performance is proposed
The calibration steps of multi-standard Transceiver RF Front-End and baseband circuit and smart antenna, Neng Gouzhi
Several mobile communication standards of GSM, CDMA and WCDMA are held, other communication services are not supported
Type, lacks i/q signal, DC maladjustment, the calibration function of IIP2；Improve noise immunity of receiver
Device and receiver circuit (Chinese patent CN101072058A) propose a kind of raising and receive
The method of machine immunity to interference, is adjusted radio frequency part gain, but is only solved by the method for power detection
Determine the problem of noise immunity of receiver, be still not suitable for the application demand of software radio receiver.
The present Research for summarizing domestic software radio receiver can be found that, although at present
Some breakthroughs are achieved, but receiver circuit is still the bottleneck of soft radio applications.Mesh
Before occur in that the configurable receiver circuit of some multi-standards, but be merely capable of realization part and can match somebody with somebody
Put, support section communication standard, while lacking necessary calibration function.
The content of the invention
(1) technical problem to be solved
The technical problem to be solved in the present invention is：A kind of software radio receiver circuit is provided,
Disclosure satisfy that the needs of various applied environments.
(2) technical scheme
To solve above-mentioned technical problem, the invention provides a kind of software radio receiver circuit,
Including low noise RF front-end circuit, High Linear RF front-end circuit, harmonics restraint radio-frequency front-end
Circuit, public analog intermediate frequency circuit, local oscillation signal produce circuit, biasing circuit and control circuit；
After the low noise RF front-end circuit is in parallel with the High Linear RF front-end circuit one
End is connected with the first end of the public analog intermediate frequency circuit；
One end of the harmonics restraint RF front-end circuit and the of the public analog intermediate frequency circuit
One end is connected；
The local oscillation signal produce circuit respectively with the low noise RF front-end circuit, the height
Linear radio-frequency front-end circuit and the harmonics restraint RF front-end circuit are connected；
The biasing circuit is electric for providing reference offset to the software radio receiver circuit
Pressure and reference bias current；
The control circuit is used for the mode of operation for controlling the software radio receiver circuit.
Further, the low noise RF front-end circuit include the first low-noise amplifier 201,
First trsanscondutance amplifier 202, the first passive current mode mixer 203 and the first second nonlinear school
Quasi- circuit 204；
First low-noise amplifier 201 for by the low noise RF front-end circuit receive
Radio frequency voltage signal be amplified process；
First trsanscondutance amplifier 202 is connected with first low-noise amplifier 201,
With for the voltage signal that first low-noise amplifier 201 is exported is converted to current signal；
The first passive current mode mixer 203 is connected with first trsanscondutance amplifier 202
Connect, for the current radio frequency signal that trsanscondutance amplifier 202 is exported is down-converted to electric current of intermediate frequency letter
Number；
The first second nonlinear calibration circuit 204 and the described first passive current mode mixer
203 are connected, for improving the second nonlinear performance of the low noise RF front-end circuit.
Further, the High Linear RF front-end circuit include passive electrical die mould frequency mixer 101,
Second trsanscondutance amplifier 102 and the second second nonlinear calibration circuit 103；
The passive electrical die mould frequency mixer 101 for by the High Linear RF front-end circuit receive
Radio frequency voltage signal carry out down-converted；
Second trsanscondutance amplifier 102 is connected with the passive electrical die mould frequency mixer 101,
For the voltage intermediate frequency signal that passive electrical die mould frequency mixer 101 is exported is converted to intermediate frequency by described
Current signal；
The second second nonlinear calibration circuit 103 and the passive electrical die mould frequency mixer 101
It is connected, for improving the second nonlinear performance of the high-linearity radio-frequency front end circuit.
Further, the harmonics restraint RF front-end circuit includes the second low-noise amplifier
301st, the 3rd trsanscondutance amplifier 302,303 harmonic of the second passive current mode mixer suppress school
Quasi- circuit 304.
Second low-noise amplifier 301 is for the harmonics restraint RF front-end circuit is connect
The radio frequency voltage signal of receipts is amplified process；
3rd trsanscondutance amplifier 302 is connected with second low-noise amplifier 301,
For the voltage signal that second low-noise amplifier 301 is exported is converted to current signal；
The second passive current mode mixer 303 is connected with the 3rd trsanscondutance amplifier 302
Connect, in the current radio frequency signal that the 3rd trsanscondutance amplifier 302 is exported is down-converted to
Frequency current signal；
The harmonic suppression circuit 304 is connected with the 3rd trsanscondutance amplifier 302, is used for
Improve the harmonic inhibition capability of the harmonics restraint RF front-end circuit.
Further, the 3rd trsanscondutance amplifier 302 includes 3 parallel trsanscondutance amplifiers,
Wherein, the proportionate relationship of the gain of 3 parallel trsanscondutance amplifiers is：
Further, the described second passive current mode mixer 303 include 3 it is parallel passive
Current mode mixer, described 3 parallel passive current mode mixer local oscillation signal phase place difference
For 0 °, 45 °, 90 °.
Further, the public analog intermediate frequency circuit includes trans-impedance amplifier 401, an I/Q
Signal calibration circuit 402,3 rank low passes/multiple band logical configurable filter 403, receiver low pass/
Multiple band logical switching switch 405, programmable gain amplifier 501, the second i/q signal calibration circuit
502nd, analog-digital converter 503, automatic gain calibration circuit 505, power-sensing circuit 506, institute
State the bandwidth calibration circuit 404 of trans-impedance amplifier 401, the 3 rank low pass/multiple band logical can configure
The bandwidth calibration circuit 406 of wave filter 403, the direct current of the programmable gain amplifier 501 lose
Alignment loop 504 is adjusted, wherein, the trans-impedance amplifier 401, first i/q signal calibration
Circuit 402, the 3 rank low pass/multiple band logical configurable filter 403, programmable-gain is put
Big device 501, second i/q signal calibration circuit 502, the analog-digital converter 503 are connected
Together, the receiver low pass/multiple band logical switching switch 405 and the first i/q signal school
Quasi- circuit 402 is in parallel, one end and the power detection of the automatic gain calibration circuit 505
One end of circuit 506 is connected, and the other end of the power-sensing circuit 506 connects the 2nd I/Q
The common node of signal calibration circuit 502 and analog-digital converter 503, the automatic gain calibration
The other end of circuit 505 connects the programmable gain amplifier 501.
Further, the input of the trans-impedance amplifier 401 be the second trsanscondutance amplifier 102,
The public output of the first passive current mode mixer 203 and the second passive current mode mixer 303
End, the trans-impedance amplifier 401 have second order Butterworth low pass wave property, described across resistance
The transimpedance gain scalable of amplifier 401.
Further, the local oscillation signal produce circuit include integer/fractional frequency synthesizer 601,
First local oscillator generator 602, the second local oscillator generator 603 and the 3rd local oscillator generator 604；
One end of the first local oscillator generator 602 and the integer/fractional frequency synthesizer 601
One end be connected, the other end is connected with the passive electrical die mould frequency mixer 101, for will
50% dutycycle, the 4 phase differential quadrature signals of the integer/output of fractional frequency synthesizer 601 turn
It is changed to 4 phase differential quadrature signals of 25% dutycycle；
One end of the second local oscillator generator 603 and the integer/fractional frequency synthesizer 601
One end be connected, the other end is connected with the first passive current mode mixer 203, for will
50% dutycycle, the 4 phase differential quadrature signals of the integer/output of fractional frequency synthesizer 601 turn
It is changed to 4 phase differential quadrature signals of 25% dutycycle；
One end of the 3rd local oscillator generator 604 and the integer/fractional frequency synthesizer 601
One end be connected, the other end is connected with the described second passive current mode mixer 303, use
In 50% dutycycle, the 4 phase difference quadrature letter for exporting the integer/fractional frequency synthesizer 601
Number be converted to 8 phase signals of 25% dutycycle.
Further, the control circuit includes tetra- ports of CLK, SCS, SDI and SDO,
The control circuit is connected with peripheral control unit.
(3) beneficial effect
The software radio receiver circuit that the present invention is provided, controls low noise by control circuit
The work of RF front-end circuit, High Linear RF front-end circuit and harmonics restraint RF front-end circuit
Operation mode, so as to realize low noise applications, high linearity application, while taking into account low noise and height
Linearity application, harmonics restraint application, have the software radio receiver circuit flexible
Restructural feature, disclosure satisfy that the needs of various different application environment.
Description of the drawings
A kind of structure of software radio receiver circuit that Fig. 1 is provided for embodiment of the present invention
Figure；
The knot of another kind of software radio receiver circuit that Fig. 2 is provided for embodiment of the present invention
Composition；
Fig. 3 is that the software radio receiver circuit that embodiment of the present invention is provided should in low noise
With the schematic diagram worked under environment；
Fig. 4 is the software radio receiver circuit of embodiment of the present invention offer in high linearity
The schematic diagram worked under applied environment；
Fig. 5 is that the software radio receiver circuit that embodiment of the present invention is provided is taken into account at the same time
The schematic diagram worked under low noise and high linearity applied environment；
Fig. 6 is the software radio receiver circuit of embodiment of the present invention offer in harmonics restraint
The schematic diagram worked under applied environment.
Specific embodiment
Fig. 1 is a kind of structure of software radio receiver circuit that embodiment of the present invention is provided
Figure, penetrates including low noise RF front-end circuit 1, High Linear RF front-end circuit 2, harmonics restraint
Frequency front-end circuit 3, public analog intermediate frequency circuit 4, local oscillation signal produce circuit 5, biasing circuit and
Control circuit；
After the low noise RF front-end circuit 1 is in parallel with the High Linear RF front-end circuit 2
One end be connected with the first end of the public analog intermediate frequency circuit 4；
One end of the harmonics restraint RF front-end circuit 3 and the public analog intermediate frequency circuit 4
First end be connected；
The local oscillation signal produce circuit 5 respectively with the low noise RF front-end circuit 1, described
High Linear RF front-end circuit 2 and the harmonics restraint RF front-end circuit 3 are connected；
The biasing circuit is electric for providing reference offset to the software radio receiver circuit
Pressure and reference bias current；
The control circuit is used for the mode of operation for controlling the software radio receiver circuit.
The software radio receiver circuit that present embodiment is provided, is controlled by control circuit low
Noise RF front-end circuit, High Linear RF front-end circuit and harmonics restraint RF front-end circuit
Mode of operation, so as to realize low noise applications, high linearity application, while taking into account low noise
With high linearity application, harmonics restraint application, make the software radio receiver circuit that there is spirit
Restructural feature living, disclosure satisfy that the needs of various different application environment.
Referring to Fig. 2, Fig. 2 is another kind of software radio receiver that embodiment of the present invention is provided
The structure chart of circuit, wherein, the low noise RF front-end circuit includes the first low noise amplification
Device 201, the first trsanscondutance amplifier 202, the first passive current mode mixer 203 and the first second order
Gamma correction circuit 204；
First low-noise amplifier 201 for by the low noise RF front-end circuit receive
Radio frequency voltage signal be amplified process；
First trsanscondutance amplifier 202 is connected with first low-noise amplifier 201,
With for the voltage signal that first low-noise amplifier 201 is exported is converted to current signal；
The first passive current mode mixer 203 is connected with first trsanscondutance amplifier 202
Connect, for the current radio frequency signal that trsanscondutance amplifier 202 is exported is down-converted to electric current of intermediate frequency letter
Number；
The first second nonlinear calibration circuit 204 and the described first passive current mode mixer
203 are connected, for improving the second nonlinear performance of the low noise RF front-end circuit.
Preferably, referring to Fig. 2, the High Linear RF front-end circuit includes that passive electrical die mould is mixed
Device 101, the second trsanscondutance amplifier 102 and the second second nonlinear calibration circuit 103；
The passive electrical die mould frequency mixer 101 for by the High Linear RF front-end circuit receive
Radio frequency voltage signal carry out down-converted；
Second trsanscondutance amplifier 102 is connected with the passive electrical die mould frequency mixer 101,
For the voltage intermediate frequency signal that passive electrical die mould frequency mixer 101 is exported is converted to intermediate frequency by described
Current signal；
The second second nonlinear calibration circuit 103 and the passive electrical die mould frequency mixer 101
It is connected, for improving the second nonlinear performance of the high-linearity radio-frequency front end circuit.
Preferably, referring to Fig. 2, the harmonics restraint RF front-end circuit includes that the second low noise is put
Big device 301, the 3rd trsanscondutance amplifier 302, the suppression of 303 harmonic of the second passive current mode mixer
System calibration circuit 304.
Second low-noise amplifier 301 is for the harmonics restraint RF front-end circuit is connect
The radio frequency voltage signal of receipts is amplified process；
3rd trsanscondutance amplifier 302 is connected with second low-noise amplifier 301,
For the voltage signal that second low-noise amplifier 301 is exported is converted to current signal；
The second passive current mode mixer 303 is connected with the 3rd trsanscondutance amplifier 302
Connect, in the current radio frequency signal that the 3rd trsanscondutance amplifier 302 is exported is down-converted to
Frequency current signal；
The harmonic suppression circuit 304 is connected with the 3rd trsanscondutance amplifier 302, is used for
Improve the harmonic inhibition capability of the harmonics restraint RF front-end circuit.
Preferably, the 3rd trsanscondutance amplifier 302 includes 3 parallel trsanscondutance amplifiers,
Wherein, the proportionate relationship of the gain of 3 parallel trsanscondutance amplifiers is：
Preferably, the described second passive current mode mixer 303 includes 3 parallel passive electricals
Flow pattern frequency mixer, described 3 parallel passive current mode mixer local oscillation signal phase places are respectively
0°、45°、90°。
Preferably, the public analog intermediate frequency circuit includes trans-impedance amplifier 401, I/Q letters
Number calibration circuit 402,3 rank low passes/multiple band logical configurable filter 403, receiver low pass/multiple band
Logical switching switch 405, programmable gain amplifier 501, the second i/q signal calibration circuit 502,
Analog-digital converter 503, automatic gain calibration circuit 505, power-sensing circuit 506, it is described across
The bandwidth calibration circuit 404 of impedance amplifier 401, the 3 rank low pass/multiple band logical is configurable to be filtered
The bandwidth calibration circuit 406 of device 403, the DC maladjustment school of the programmable gain amplifier 501
Lead ring road 504, wherein, the trans-impedance amplifier 401, first i/q signal calibration circuit
402nd, the 3 rank low pass/multiple band logical configurable filter 403, programmable gain amplifier
501st, the second i/q signal calibration circuit 502, the analog-digital converter 503 are connected on one
Rise, the receiver low pass/multiple band logical switching switch 405 and first i/q signal calibrate electricity
Road 402 is in parallel, one end and the power-sensing circuit of the automatic gain calibration circuit 505
506 one end is connected, and the other end of the power-sensing circuit 506 connects the second i/q signal
The common node of calibration circuit 502 and analog-digital converter 503, the automatic gain calibration circuit
505 other end connects the programmable gain amplifier 501.Wherein, power-sensing circuit 506
The testing result of 503 input signal power of analog-digital converter is sent into into automatic gain calibration circuit
505, the calibration signal adjustment programmable gain amplifier of the output of automatic gain calibration circuit 505
501 gain shift.
Preferably, the input of the trans-impedance amplifier 401 be the second trsanscondutance amplifier 102, the
The public output of one passive current mode mixer 203 and the second passive current mode mixer 303,
The trans-impedance amplifier 401 has second order Butterworth low pass wave property, described to amplify across resistance
The transimpedance gain scalable of device 401.
Wherein, by configure 3 rank low passes/multiple band logical configurable filter 403 and receiver low pass/
Multiple band logical switching switch 405 realizes zero intermediate frequency and low intermediate frequency receiver respectively, when receiver is configured
For zero-IF operation pattern when, receiver low pass/multiple band logical switching switch 405 is closed, an I/Q
Signal calibration circuit 402 is turned off, and 3 rank low passes/multiple band logical configurable filter 403 is configured to low
Bandpass filter pattern；When receiver is configured to Low Medium Frequency mode of operation, receiver low pass/multiple band
Logical switching switch 405 cuts off, and the first i/q signal calibration circuit 402 is opened, 3 rank low passes/multiple band
Logical configurable filter 403 is configured to multiple band filter pattern.Embodiment of the present invention is provided
Software radio receiver circuit for zero intermediate frequency receive application model, possess reception
1GHz～5GHz, signal bandwidth cover the ability of 0.7MHz～20MHz radiofrequency signals；For low
Intermediate-frequency receiver application model, possesses reception 100MHz～1.5GHz, and signal bandwidth is covered
The ability of 5KHz～2MHz radiofrequency signals, can meet current most of arrowbands and broadband major flow
The accurate requirement of beacon.
Preferably, the local oscillation signal produce circuit include integer/fractional frequency synthesizer 601,
First local oscillator generator 602, the second local oscillator generator 603 and the 3rd local oscillator generator 604；
One end of the first local oscillator generator 602 and the integer/fractional frequency synthesizer 601
One end be connected, the other end is connected with the passive electrical die mould frequency mixer 101, for will
50% dutycycle, the 4 phase differential quadrature signals of the integer/output of fractional frequency synthesizer 601 turn
It is changed to 4 phase differential quadrature signals of 25% dutycycle；Phase alignment module improves output signal
Orthogonal performance；
One end of the second local oscillator generator 603 and the integer/fractional frequency synthesizer 601
One end be connected, the other end is connected with the first passive current mode mixer 203, for will
50% dutycycle, the 4 phase differential quadrature signals of the integer/output of fractional frequency synthesizer 601 turn
It is changed to 4 phase differential quadrature signals of 25% dutycycle；Phase alignment module improves output signal
Orthogonal performance；
One end of the 3rd local oscillator generator 604 and the integer/fractional frequency synthesizer 601
One end be connected, the other end is connected with the described second passive current mode mixer 303, use
In 50% dutycycle, the 4 phase difference quadrature letter for exporting the integer/fractional frequency synthesizer 601
Number be converted to 8 phase signals of 25% dutycycle；Differ as 45 °, phase alignment module improves output
The orthogonal performance of signal.
Preferably, the control circuit includes tetra- ports of CLK, SCS, SDI and SDO,
The control circuit is connected with peripheral control unit, can be communicated with peripheral control unit, control chip
The mode of operation of internal each modular circuit.
The software radio receiver circuit that present embodiment is provided can meet various without application
The needs of environment, including：Low noise applications, high linearity application, while take into account low noise and
High linearity application harmonic suppresses application.
Referring to Fig. 3, when operation of receiver is in low noise applications pattern, low noise radio-frequency front-end electricity
Road, public analog intermediate frequency circuit, local oscillation signal produce circuit, biasing circuit and control circuit work
Make.The radiofrequency signal of receiver inlet is amplified by the first low-noise amplifier 201, output
Voltage signal is sent into the first trsanscondutance amplifier 202 and is converted to current signal, is re-fed into first passive
Current mode mixer 203 carries out down coversion.As the receiver first order is put using the first low noise
Big device 201, its noiseproof feature are improved.In order to improve the second nonlinear performance of receiver,
First second nonlinear calibration circuit 204 is by adjusting the first passive current mode mixer 203
Grid voltage realizes calibration function, the trans-impedance amplifier 401 with second order Butterworth filtering characteristic
The current intermediate frequency signal that first passive current mode mixer 203 is exported is converted to into voltage signal,
And realize certain filter action.
Receiver low pass/multiple band logical switching switch 405 is closed, the first i/q signal calibration circuit 402
Shut-off, 3 rank low passes/multiple band logical configurable filter 403 are configured to low pass filter pattern, can
Programming gain amplifier 501 calibrates circuit through the second i/q signal after signal is further amplified again
Analog-digital converter 503 is sent into after 502.Second local oscillator generator 603 is by integer/fractional frequency synthesis
50% dutycycle, the 4 phase differential quadrature signals of the output of device 601 are converted to 4 phases of 25% dutycycle
The first passive current mode mixer 203 is sent into after differential quadrature signals, phase alignment module improves defeated
Go out the orthogonal performance of signal.
The bandwidth calibration circuit 404 of trans-impedance amplifier 401 and 3 rank low passes/multiple band logical can configure
The bandwidth calibration circuit 406 of wave filter 403 realizes automatically adjusting for bandwidth, DC maladjustment calibration
Loop 504 calibrates the output DC offset voltage of programmable gain amplifier 501, power detection
The testing result of 503 input signal power of analog-digital converter is sent into automatic gain school by circuit 506
Quasi- circuit 505, the calibration signal adjustment programmable-gain of the output of automatic gain calibration circuit 505 are put
The gain shift of big device 501, the second i/q signal calibrate circuit 502 by programmable gain amplifier
501 output signal sends into analog-digital converter 503 after being calibrated.
Referring to Fig. 4, when operation of receiver is in high linearity application model, High Linear radio-frequency front-end
Circuit, the first low-noise amplifier 201, public analog intermediate frequency circuit, local oscillation signal produce circuit,
Biasing circuit and control circuit work.Passive electrical die mould frequency mixer 101 is by receiver inlet
Radiofrequency signal carries out down-converted, and the signal of output is changed through the second trsanscondutance amplifier 102
For current signal, in order to realize that receiver inlet is matched, 201 work of the first low-noise amplifier
Make in low-power consumption mode, there is provided the input matching required for receiver.Passive electrical die mould frequency mixer
With the characteristic that impedance is moved, the impedance operator of intermediate frequency can be moved radio frequency domains, therefore nothing
The input impedance of 101 input of source voltage-type frequency mixer has the characteristic of radio-frequency filter, can be with
Filter with outer high reject signal.Low-noise amplifier is compared, passive electrical die mould frequency mixer has more
The high linearity, therefore the linearity performance of receiver lifted.
Second mutual conductance is amplified by the trans-impedance amplifier 401 with second order Butterworth filtering characteristic
The current intermediate frequency signal of the output of device 102 is converted to voltage signal, and realizes certain filter action.
Receiver low pass/multiple band logical switching switch 405 is closed, and the first i/q signal calibration circuit 402 is closed
Disconnected, 3 rank low passes/multiple band logical configurable filter 403 is configured to low pass filter pattern, can compile
Journey gain amplifier 501 calibrates circuit 502 through the 2nd I/Q after signal is further amplified again
Analog-digital converter 503 is sent into afterwards.
First local oscillator generator 602 50% is accounted for what integer/fractional frequency synthesizer 601 was exported
Send into after the empty 4 phase differential quadrature signals that 25% dutycycle is converted to than 4 phase differential quadrature signals
Passive electrical die mould frequency mixer 101, phase alignment module improve the orthogonal performance of output signal.
The bandwidth calibration circuit 404 of trans-impedance amplifier 401 and 3 rank low passes/multiple band logical can configure
The bandwidth calibration circuit 406 of wave filter 403 realizes automatically adjusting for bandwidth, DC maladjustment calibration
Loop 504 calibrates the output DC offset voltage of programmable gain amplifier 501, power detection
The testing result of 503 input signal power of analog-digital converter is sent into automatic gain school by circuit 506
Quasi- circuit 505, the calibration signal adjustment programmable-gain of the output of automatic gain calibration circuit 505 are put
The gain shift of big device 501, the second i/q signal calibrate circuit 502 by programmable gain amplifier
501 output signal sends into analog-digital converter 503 after being calibrated.
It is referring to Fig. 5, when operation of receiver is when low noise and high linearity application model is taken into account, low
Noise RF front-end circuit, passive electrical die mould frequency mixer 101, public analog intermediate frequency circuit, local oscillator
The work of signal generating circuit, biasing circuit and control circuit.The low noise compared shown in Fig. 3 should
With unique difference is that passive electrical die mould frequency mixer 101 is worked, due to passive simultaneously
The input of voltage-type frequency mixer has a characteristic of radio frequency band filter, therefore by the first low noise
Acoustic amplifier 201 is used in parallel with passive electrical die mould frequency mixer 101, improves receiver input
End filters the energy with outer high reject signal, and the linearity of receiver is improved.As signal leads to
The first order in road is still the first low-noise amplifier 201, and the noiseproof feature of receiver is also changed
It is kind.
Referring to Fig. 6, when operation of receiver is in harmonics restraint application model, before harmonics restraint radio frequency
Terminal circuit, public analog intermediate frequency circuit, local oscillation signal produce circuit, biasing circuit and control electricity
Road works.The radiofrequency signal of receiver inlet is amplified by the second low-noise amplifier 301, defeated
The voltage signal for going out is sent into the 3rd trsanscondutance amplifier 302 and is converted to current signal, is re-fed into second
Passive current mode mixer 303 carries out down coversion.Receiver employs harmonics restraint structure, the
The ratio of gains of three parallel subelements of three trsanscondutance amplifiers 302 is 1:√2:1, the second passive electric current
The local oscillation signal phase place of three parallel subelements of type frequency mixer 303 be 0 °, 45 °,
90 °, therefore receiver is inhibited for 3 ranks and 5 order harmonic signals, simultaneously because
Differential configuration is employed, even-order harmonics signal is similarly inhibited.
Trans-impedance amplifier 401 with second order Butterworth filtering characteristic is by the second passive current mode
The current intermediate frequency signal of the output of frequency mixer 303 is converted to voltage signal, and realizes certain filtering
Effect.Receiver low pass/multiple band logical switching switch 405 disconnects, the first i/q signal calibration circuit
402 open, and 3 rank low passes/multiple band logical configurable filter 403 is configured to multiple band filter pattern,
Programmable gain amplifier 501 is electric through the calibration of the second i/q signal again after signal is further amplified
Analog-digital converter 503 is sent into behind road 502.
50% duty that integer/fractional frequency synthesizer 601 is exported by the 3rd local oscillator generator 604
8 phase signals that 25% dutycycle is converted to than 4 phase differential quadrature signals send into the second passive electric current
Type frequency mixer 303, differs as 45 °, the phase deviation of phase alignment modular calibration output signal.
The bandwidth calibration circuit 404 of trans-impedance amplifier 401 and 3 rank low passes/multiple band logical can configure
The bandwidth calibration circuit 406 of wave filter 403 realizes automatically adjusting for bandwidth, DC maladjustment calibration
Loop 504 calibrates the output DC offset voltage of programmable gain amplifier 501, power detection
The testing result of 503 input signal power of analog-digital converter is sent into automatic gain school by circuit 506
Quasi- circuit 505, the calibration signal adjustment programmable-gain of the output of automatic gain calibration circuit 505 are put
The gain shift of big device 501, the second i/q signal calibrate circuit 502 by programmable gain amplifier
501 output signal sends into analog-digital converter 503 after being calibrated.
The software radio receiver circuit that present embodiment is provided, when operation of receiver is in low noise
During sound application model, low noise RF front-end circuit, public analog intermediate frequency circuit, local oscillation signal
Produce the work of circuit, biasing circuit and control circuit；When operation of receiver is in high linearity application
During pattern, High Linear RF front-end circuit, the first low-noise amplifier 201, public analog intermediate frequency
Circuit, local oscillation signal produce the work of circuit, biasing circuit and control circuit；Work as operation of receiver
When low noise and high linearity application model is taken into account, low noise RF front-end circuit, passive electrical
Die mould frequency mixer 101, public analog intermediate frequency circuit, local oscillation signal produce circuit, biasing circuit and
Control circuit works；When operation of receiver is in harmonics restraint application model, harmonics restraint radio frequency
Front-end circuit, public analog intermediate frequency circuit, local oscillation signal produce circuit and biasing and control circuit
Work.So as to realize low noise applications, high linearity application, while taking into account low noise and high line
Property degree application, harmonics restraint application, make the software radio receiver circuit have flexibly may be used
Reconstruct feature, disclosure satisfy that the needs of various different application environment, it is adaptable to most of major flows
Beacon is accurate.
Claims (9)
1. a kind of software radio receiver circuit, it is characterised in that before low noise radio frequency
Terminal circuit, High Linear RF front-end circuit, harmonics restraint RF front-end circuit, in public simulation
Frequency circuit, local oscillation signal produce circuit, biasing circuit and control circuit；
After the low noise RF front-end circuit is in parallel with the High Linear RF front-end circuit one
End is connected with the first end of the public analog intermediate frequency circuit；
One end of the harmonics restraint RF front-end circuit and the of the public analog intermediate frequency circuit
One end is connected；
The local oscillation signal produce circuit respectively with the low noise RF front-end circuit, the height
Linear radio-frequency front-end circuit and the harmonics restraint RF front-end circuit are connected；
The biasing circuit is electric for providing reference offset to the software radio receiver circuit
Pressure and reference bias current；
The control circuit is used for the mode of operation for controlling the software radio receiver circuit；
Wherein, the low noise RF front-end circuit include the first low-noise amplifier (201),
First trsanscondutance amplifier (202), the first passive current mode mixer (203) and the first second order are non-
Linear gauging circuit (204)；
First low-noise amplifier (201) is for the low noise RF front-end circuit is connect
The radio frequency voltage signal of receipts is amplified process；
First trsanscondutance amplifier (202) and the first low-noise amplifier (201) phase
Connection, for the voltage signal that first low-noise amplifier (201) exports is converted to electricity
Stream signal；
The first passive current mode mixer (203) and first trsanscondutance amplifier (202)
It is connected, for the current radio frequency signal that trsanscondutance amplifier (202) is exported is down-converted to intermediate frequency
Current signal；
First second nonlinear calibration circuit (204) and the described first passive current mode mixing
Device (203) is connected, for improving the second nonlinear of the low noise RF front-end circuit
Energy.
2. software radio receiver circuit according to claim 1, it is characterised in that
The High Linear RF front-end circuit includes that passive electrical die mould frequency mixer (101), the second mutual conductance are put
Big device (102) and the second second nonlinear calibration circuit (103)；
The passive electrical die mould frequency mixer (101) is for the High Linear RF front-end circuit is connect
The radio frequency voltage signal of receipts carries out down-converted；
Second trsanscondutance amplifier (102) and passive electrical die mould frequency mixer (101) phase
Connection, for the voltage intermediate frequency signal conversion for exporting the passive electrical die mould frequency mixer (101)
For current intermediate frequency signal；
Second second nonlinear calibration circuit (103) and the passive electrical die mould frequency mixer
(101) it is connected, for improving the second nonlinear performance of the High Linear RF front-end circuit.
3. software radio receiver circuit according to claim 2, it is characterised in that
The harmonics restraint RF front-end circuit includes the second low-noise amplifier (301), the 3rd mutual conductance
Amplifier (302), the second passive current mode mixer (303) harmonic suppress calibration circuit
(304)；
Second low-noise amplifier (301) is for by the harmonics restraint RF front-end circuit
The radio frequency voltage signal of reception is amplified process；
3rd trsanscondutance amplifier (302) and the second low-noise amplifier (301) phase
Connection, for the voltage signal that second low-noise amplifier (301) exports is converted to electricity
Stream signal；
The second passive current mode mixer (303) and the 3rd trsanscondutance amplifier (302)
It is connected, for becoming under the current radio frequency signal that exports the 3rd trsanscondutance amplifier (302)
Frequency is current intermediate frequency signal；
The harmonic suppression circuit (304) is connected with the 3rd trsanscondutance amplifier (302),
For improving the harmonic inhibition capability of the harmonics restraint RF front-end circuit.
4. software radio receiver circuit according to claim 3, it is characterised in that
3rd trsanscondutance amplifier (302) including 3 parallel trsanscondutance amplifiers, wherein, it is described
The proportionate relationship of the gain of 3 parallel trsanscondutance amplifiers is：
5. software radio receiver circuit according to claim 3, it is characterised in that
The second passive current mode mixer (303) including 3 parallel passive current mode mixers,
Described 3 parallel passive current mode mixer local oscillation signal phase places be respectively 0 °, 45 °,
90°。
6. software radio receiver circuit according to claim 3, it is characterised in that
The public analog intermediate frequency circuit includes trans-impedance amplifier (401), the first i/q signal calibration circuit
(402), 3 rank low passes/multiple band logical configurable filter (403), receiver low pass/multiple band logical is cut
Change switch (405), programmable gain amplifier (501), the second i/q signal calibration circuit (502),
Analog-digital converter (503), automatic gain calibration circuit (505), power-sensing circuit (506),
The bandwidth calibration circuit (404) of the trans-impedance amplifier (401), the 3 rank low pass/multiple band logical
The bandwidth calibration circuit (406) of configurable filter (403), the programmable gain amplifier
(501) DC maladjustment alignment loop (504), wherein, the trans-impedance amplifier (401),
First i/q signal calibration circuit (402), the 3 rank low pass/multiple band logical can configure filtering
Device (403), the programmable gain amplifier (501), second i/q signal calibration circuit
(502), the analog-digital converter (503) is cascaded, the receiver low pass/multiple band logical
Switching switch (405) is in parallel with first i/q signal calibration circuit (402), described automatic
One end of gain calibration circuit (505) is connected with one end of the power-sensing circuit (506)
Connect, the other end of the power-sensing circuit (506) connects the second i/q signal calibration circuit (502)
With the common node of analog-digital converter (503), the automatic gain calibration circuit (505)
The other end connects the programmable gain amplifier (501).
7. software radio receiver circuit according to claim 6, it is characterised in that
The input of the trans-impedance amplifier (401) is the second trsanscondutance amplifier (102), first passive
Current mode mixer (203) and the public output of the second passive current mode mixer (303),
The trans-impedance amplifier (401) is with second order Butterworth low pass wave property, described to put across resistance
The transimpedance gain scalable of big device (401).
8. software radio receiver circuit according to claim 3, it is characterised in that
The local oscillation signal produces circuit includes that integer/fractional frequency synthesizer (601), the first local oscillator are produced
Raw device (602), the second local oscillator generator (603) and the 3rd local oscillator generator (604)；
One end of the first local oscillator generator (602) and the integer/fractional frequency synthesizer
(601) one end is connected, and the other end is connected with the passive electrical die mould frequency mixer (101)
Connect, for 50% dutycycle 4 that the integer/fractional frequency synthesizer (601) is exported is differed
Point orthogonal signalling are converted to 4 phase differential quadrature signals of 25% dutycycle；
One end of the second local oscillator generator (603) and the integer/fractional frequency synthesizer
(601) one end is connected, and the other end is connected with the first passive current mode mixer (203)
Connect, for 50% dutycycle 4 that the integer/fractional frequency synthesizer (601) is exported is differed
Point orthogonal signalling are converted to 4 phase differential quadrature signals of 25% dutycycle；
One end of the 3rd local oscillator generator (604) and the integer/fractional frequency synthesizer
(601) one end is connected, the other end and the described second passive current mode mixer (303)
It is connected, for 50% dutycycle 4 for exporting the integer/fractional frequency synthesizer (601)
Phase differential quadrature signals are converted to 8 phase signals of 25% dutycycle.
9. software radio receiver circuit according to claim 1, it is characterised in that
The control circuit includes tetra- ports of CLK, SCS, SDI and SDO, the control circuit
It is connected with peripheral control unit.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310289188.1A CN104283574B (en) | 2013-07-10 | 2013-07-10 | software radio receiver circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310289188.1A CN104283574B (en) | 2013-07-10 | 2013-07-10 | software radio receiver circuit |
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| CN104283574B true CN104283574B (en) | 2017-04-12 |
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Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018170667A1 (en) * | 2017-03-20 | 2018-09-27 | 焦彦华 | Unified standard orthogonal wavelet multiplexing radio system |
| CN106888028A (en) * | 2017-04-12 | 2017-06-23 | 复旦大学 | A kind of high sensitivity receiver front-ends circuit with impedance mapping function |
| CN109633579B (en) * | 2018-12-11 | 2020-11-03 | 上海无线电设备研究所 | Method and circuit for generating calibration signal of fixed intermediate frequency receiving channel |
| CN110460346B (en) * | 2019-08-01 | 2024-04-02 | 智汇芯联(厦门)微电子有限公司 | Software radio receiver |
| CN111130577B (en) * | 2019-11-20 | 2021-07-27 | 深圳市纽瑞芯科技有限公司 | Anti-interference receiver circuit for radio frequency transceiver chip |
| CN111245457B (en) * | 2020-04-26 | 2020-09-11 | 杭州城芯科技有限公司 | Receiver direct current processing method compatible with wide and narrow band signals |
| CN112511179B (en) * | 2020-11-02 | 2022-03-22 | 扬州船用电子仪器研究所(中国船舶重工集团公司第七二三研究所) | Reconfigurable radio frequency front-end receiving circuit |
| CN114268340A (en) * | 2022-01-26 | 2022-04-01 | 北京奕斯伟计算技术有限公司 | Transmitter, transceiver and signal transmission method thereof |
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