Background technology
Low-voltage differential signal (i.e. LVDS) is a kind of technology be usually used in data transmission system; its voltage peak is usually between 250mV to 450mV; transmission rate is from tens Mbps to a few Gbps; it adopts extremely low voltage swing high speed differential transmission data; connection that is point-to-point or point to multi--point can be realized; there is low power consumption, low error rate, low crosstalk, Low emissivity, low noise, be easy to the advantage such as integrated; therefore low-voltage differential signal is widely used in various system, such as LVDS often can be used in image data transmission aspect.
Low-voltage differential signal drive circuit conventional in prior art adopts the differential signal drive circuit of current-mode usually, and it controls electric current by diverter switch and flows into load resistance from different directions, thus generates Low Voltage Differential Signal level at load resistance two ends.But the accuracy of the Low Voltage Differential Signal that this Low Voltage Differential Signal drive circuit produces is not high.Shown in Figure 1, shown in Fig. 1 is the low-voltage differential signal drive circuit of current-mode conventional in prior art.It comprises four enhancement mode NMOS tube (MN1, MN2, MN3, MN4) all as controllable switch, Ia and Ib is current source; The load resistance of external reception end when RL is IC application.When NMOS tube gate voltage (DP/DN) is for high level (this voltage is general identical with supply voltage VCC), NMOS tube conducting.So when data DP is high level, DN is low level, MN4, MN2 conducting in NMOS tube, MN3, MN1 disconnect, and electric current flow to the VA end points of RL by MN4 from power supply VCC, after flowing through resistance, flow to ground by MN2; Current constant is Ia=Ib=I0, then obtained the voltage difference VA-VB=I0*RL at RL two ends by Ohm's law; When data DP is low level, DN is high level, and in NMOS tube, MN4, MN2 disconnect, MN3, MN1 conducting, electric current from the VB end points of power supply VCC by MN3 to RL, after flowing through resistance, by MN1 to; Current constant is Ia=Ib=I0, then obtained the voltage difference VA-VB=-I0*RL at RL two ends by Ohm's law.
When the voltage difference of VA-VB is positive I0*RL, receiving terminal judges that the data received are high level, and when the voltage difference of VA-VB is negative I0*RL, receiving terminal judges that the data received are low level, thus completes the transmission of data and receive identification.This main circuit will utilize data level flow out and flow to realize electric current to the conducting controlling the NMOS tube of various combination from two different directions.Due to general in the data transmission, size can be had to specify to the peak-to-peak value and VA-VB generating low-voltage differential signal, also there is requirement to the common mode electrical level of low-voltage differential signal simultaneously, the LVDS circuit of the current-mode shown in Fig. 1 can meet peak-to-peak value requirement by the electric current I 0 (Ia=Ib=I0) that setting is corresponding, its common mode electrical level VCM voltage computational process is as follows: when VP is high level, VB=I0* (R2+Rb), the conducting resistance of note: MN2 is R2, the resistance of current source Ib is Rb, then VCM=I0* (R2+Rb)+I0*RL/2 1.; When VP is low level, the conducting resistance of VB=VCC-I0* (R3+Ra) note: MN3 is R4, and the resistance of current sources la is Ra, then VCM=VCC-I0* (R3+Ra)-I0*RL/2 2.; Formula 1.+formula 2. 2VCM=VCC+I0 (R2+Rb)-I0 (R3+Ra), because I0, VCC are definite value, simultaneously we can make R2+Rb=R3+Ra by optimum configurations, the common mode electrical level VCM=VCC/2 of such LVDS, and it is also definite value; But because by technogenic influence, R2, R3 and Ra during fabrication, Rb easily occur that deviation makes R2+Rb and R3+Ra not be absolute equal, there is certain error in it, therefore its common mode electrical level not easily accurately sets; When simultaneously the level of DP ceaselessly changes (from high to low or from low to high), due to feedthrough effect, it can make output voltage VA and VB easily occur shake, when this transmits under comparatively remote and larger interference at a high speed, easily occurs receiving terminal identification error.So the Low Voltage Differential Signal that Low Voltage Differential Signal drive circuit of the prior art produces has certain error, and its accuracy is not high.
Be understandable that, the statement of this part only provides background information related to the present invention, may form or not form so-called prior art.
Summary of the invention
Technical problem to be solved by this invention is, for the not high defect of the Low Voltage Differential Signal accuracy of prior art mesolow differential signal drive circuit generation, to provide a kind of Low Voltage Differential Signal drive circuit that can reduce error, improve the accuracy of the Low Voltage Differential Signal exported.
The technical solution adopted for the present invention to solve the technical problems is to provide a kind of low-voltage differential signal drive circuit, and it comprises: for generating the voltage generation circuit of high-low voltage and the high-low voltage that described voltage generation circuit produces being converted to the level switching circuit of polar voltages;
Voltage generation circuit comprises: the second Correctional tube that when the first Correctional tube that when the first amplifier, the second amplifier, resistance R1, R2, R3, negative feedback work, the first amplifier output controls and negative feedback, the second amplifier output controls; The inverting input of the first amplifier and the second amplifier connects reference voltage output end VR1 and VR2 respectively, and the in-phase input end of the first amplifier is electrically connected the in-phase input end of the second amplifier by resistance R2; First termination power of the first Correctional tube, the first output VP of its second end extraction voltage generative circuit, and electric connection resistance R1 between its second end and in-phase input end of the first amplifier, the control end of the first Correctional tube connects the output of the first amplifier; The first end ground connection of the second Correctional tube, the second output VN of its second end extraction voltage generative circuit, and electric connection resistance R3 between its second end and in-phase input end of the second amplifier, the control end of the second Correctional tube connects the output of the second amplifier.
In above-mentioned low-voltage differential signal drive circuit, level switching circuit comprises: inverter, the first switching tube MN2, second switch pipe MN3, the 3rd switching tube MN4 and the 4th switching tube MN5; The input termination data signal output DP of inverter; The first end of the first termination second switch pipe of the first switching tube, the second end of the first switching tube meets the second end of the 3rd switching tube and described first output VP simultaneously; Second end of second switch pipe meets the second end of the 4th switching tube and described second output VN simultaneously; The first end of the 3rd switching tube connects the first end of the 4th switching tube simultaneously; The control end of second switch pipe and the 3rd switching tube all connects the output of inverter, and the control end of the first switching tube and the 4th switching tube all connects the input of inverter.
In above-mentioned low-voltage differential signal drive circuit, described first Correctional tube is P type field effect transistor, and described second Correctional tube is N-type field effect transistor.
In above-mentioned low-voltage differential signal drive circuit, the source electrode of described first Correctional tube connects power supply, first output VP of its drain electrode extraction voltage generative circuit, and electric connection resistance R1 between its drain electrode and in-phase input end of the first amplifier, the control end of the first Correctional tube connects the output of the first amplifier; The source ground of the second Correctional tube, the second output VN of its drain electrode extraction voltage generative circuit, and electric connection resistance R3 between its drain electrode and in-phase input end of the second amplifier, the control end of the second Correctional tube connects the output of the second amplifier.
In above-mentioned low-voltage differential signal drive circuit, the source electrode of described first Correctional tube connects power supply, first output VP of its drain electrode extraction voltage generative circuit, and electric connection resistance R1 between its drain electrode and in-phase input end of the first amplifier, the control end of the first Correctional tube connects the output of the first amplifier; The source ground of the second Correctional tube, the second output VN of its drain electrode extraction voltage generative circuit, and electric connection resistance R3 between its drain electrode and in-phase input end of the second amplifier, the control end of the second Correctional tube connects the output of the second amplifier.
In above-mentioned low-voltage differential signal drive circuit, the source electrode of the first switching tube connects the source electrode of second switch pipe, and the drain electrode of the first switching tube meets the drain electrode of the 3rd switching tube and described first output VP simultaneously; The drain electrode of second switch pipe meets the drain electrode of the 4th switching tube and described second output VN simultaneously; The source electrode of the 3rd switching tube connects the source electrode of the 4th switching tube simultaneously; The control end of second switch pipe and the 3rd switching tube all connects the output of inverter, and the control end of the first switching tube and the 4th switching tube all connects the input of inverter.
In above-mentioned low-voltage differential signal drive circuit, the equal ground connection of substrate of described first switching tube MN2, second switch pipe MN3, the 3rd switching tube MN4 and the 4th switching tube MN5.
In above-mentioned low-voltage differential signal drive circuit, also comprise the electric capacity C1 for filtering voltage regulation, described electric capacity C1 is connected between described first output VP and the second output VN.
In above-mentioned low-voltage differential signal drive circuit, described resistance R1 is equal with the resistance of resistance R3.
Low Voltage Differential Signal drive circuit provided by the invention realizes mainly through voltage generation circuit and level switching circuit, the reference voltage of outside is converted to high-low voltage by voltage generation circuit by it, simultaneously, by level switching circuit, the high-low voltage that voltage generation circuit exports is converted to the voltage with polarity, and then exportable required low-voltage differential signal.Due to, first amplifier in voltage generation circuit, second amplifier, resistance R1, R2, R3, first Correctional tube, and second effect of Correctional tube, the high-low voltage generated is made to depend mainly on resistance R1, R2, R3, with reference voltage V R1, VR2, due to resistance R1, R2, the proportionate relationship of R3 can accurately set and reference voltage V R1, VR2 is definite value, so, the Low Voltage Differential Signal LVDS that drive circuit provided by the invention exports can not be subject to process deviation influence, and then the common mode electrical level of LVDS voltage and peak-to-peak value can accurately set, the shake of the Low Voltage Differential Signal of output can be reduced, and the accuracy of the Low Voltage Differential Signal of drive circuit output is higher.
Embodiment
In order to make technical problem solved by the invention, technical scheme and beneficial effect clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
In describing the invention, it will be appreciated that, term " longitudinal direction ", " transverse direction ", " on ", D score, "front", "rear", "left", "right", " vertically ", " level ", " top ", " end " " interior ", the orientation of the instruction such as " outward " or position relationship be based on orientation shown in the drawings or position relationship, only the present invention for convenience of description and simplified characterization, instead of indicate or imply that the device of indication or element must have specific orientation, with specific azimuth configuration and operation, therefore can not be interpreted as limitation of the present invention.
The invention provides a kind of accurately can set Low Voltage Differential Signal common mode electrical level and voltage difference, reduce the shake of its output level and then improve the Low Voltage Differential Signal drive circuit of accuracy of the Low Voltage Differential Signal exported.Common mode electrical level refers to the median of two level, is absolute voltage value.If A point is VA relative to the level on ground, B point is VB (establishing VA>VB) relative to the level on ground, voltage difference so between AB is VAB=VA-VB, and the common mode electrical level of VA and VB is VCM=(VA+VB)/2=VB+VAB/2=VA-VAB/2.
Low Voltage Differential Signal drive circuit provided by the invention comprises: for generating the voltage generation circuit of high-low voltage and the high-low voltage that described voltage generation circuit produces being converted to the level switching circuit of polar voltages.Reference voltage is converted to high-low voltage by voltage generation circuit, and level switching circuit passes through the conversion of polarity of voltage and exportable Low Voltage Differential Signal.The concrete structure of drive circuit is as follows:
In drive circuit provided by the invention, voltage generation circuit comprises: the second Correctional tube that when the first Correctional tube that when the first amplifier, the second amplifier, resistance R1, R2, R3, negative feedback work, the first amplifier output controls and negative feedback, the second amplifier output controls; The inverting input of the first amplifier and the second amplifier connects reference voltage output end VR1 and VR2 respectively, and the in-phase input end of the first amplifier is electrically connected the in-phase input end of the second amplifier by resistance R2; First termination power of the first Correctional tube, the first output VP of its second end extraction voltage generative circuit, and electric connection resistance R1 between its second end and in-phase input end of the first amplifier, the control end of the first Correctional tube connects the output of the first amplifier; The first end ground connection of the second Correctional tube, the second output VN of its second end extraction voltage generative circuit, and electric connection resistance R3 between its second end and in-phase input end of the second amplifier, the control end of the second Correctional tube connects the output of the second amplifier.Wherein, if the homophase of the first amplifier and the voltage of inverting input unequal, the then control end of voltage-regulation first Correctional tube of the output of the first amplifier, thus regulate the output current of the first Correctional tube, make the change in voltage of the first amplifier in-phase input end, because the voltage of the inverting input of the first amplifier is constant, the output voltage of the first amplifier changes, and then regulate the output current of the first Correctional tube again, form feedback loop, finally make the homophase of the first amplifier equal with the voltage of inverting input, output end voltage keeps stable, make that output voltage VP is also stable remains on set point.In like manner, if the homophase of the second amplifier and the voltage of inverting input unequal, the then control end of voltage-regulation second Correctional tube of the output of the second amplifier, thus regulate the output current of the second Correctional tube, make the change in voltage of the in-phase input end of the second amplifier, because the voltage of the inverting input of the second amplifier is constant, the output voltage of the second amplifier changes, and then regulate the output current of the second Correctional tube again, form feedback loop, finally make the homophase of the second amplifier equal with the voltage of inverting input, output end voltage keeps stable, make that output voltage VN is also stable remains on set point.So, voltage generation circuit and the exportable high-low voltage that can accurately set, more required Low Voltage Differential Signal can be generated after carrying out dipole inversion by level switching circuit.
Level switching circuit comprises: inverter, the first switching tube MN2, second switch pipe MN3, the 3rd switching tube MN4 and the 4th switching tube MN5; The input termination data signal output DP of inverter; The first end of the first termination second switch pipe of the first switching tube, the second end of the first switching tube meets the second end of the 3rd switching tube and described first output VP simultaneously; Second end of second switch pipe meets the second end of the 4th switching tube and described second output VN simultaneously; The first end of the 3rd switching tube connects the first end of the 4th switching tube simultaneously; The control end of second switch pipe and the 3rd switching tube all connects the output of inverter, and the control end of the first switching tube and the 4th switching tube all connects the input of inverter.So, reference voltage V R1 and VR2 can change and export by drive circuit provided by the invention is Low Voltage Differential Signal, simultaneously, first amplifier, second amplifier, resistance R1, R2, R3, first Correctional tube, and second effect of Correctional tube, the high-low voltage generated is made to depend mainly on resistance R1, R2, R3, due to resistance R1, R2, the proportionate relationship of R3 can accurately set, so, the Low Voltage Differential Signal LVDS that drive circuit provided by the invention exports can not be subject to process deviation influence, and then the common mode electrical level of LVDS voltage and peak-to-peak value can accurately set, the shake of the Low Voltage Differential Signal of output can be reduced, and the accuracy of the Low Voltage Differential Signal of drive circuit output is higher.
The structure of the second Correctional tube that when the first Correctional tube that when those skilled in the art know negative feedback work, the first amplifier output controls and negative feedback, the second amplifier output controls.In a preferred embodiment of the invention, the first Correctional tube is P type field effect transistor, and the second Correctional tube is N-type field effect transistor.And the source electrode of the first Correctional tube connects power supply, the first output VP of its drain electrode extraction voltage generative circuit, and electric connection resistance R1 between its drain electrode and in-phase input end of the first amplifier, the control end of the first Correctional tube connects the output of the first amplifier; The source ground of the second Correctional tube, the second output VN of its drain electrode extraction voltage generative circuit, and electric connection resistance R3 between its drain electrode and in-phase input end of the second amplifier, the control end of the second Correctional tube connects the output of the second amplifier.The voltage generation circuit of this structure can generate high-low voltage fast and accurately.Concrete, voltage generation circuit is mainly converted to the high-low voltage (VP, VN) required by low-voltage differential signal input reference voltage (VR1, VR2), and provides driving force.
In a preferred embodiment of the invention, the first switching tube MN2, second switch pipe MN3, the 3rd switching tube MN4 and the 4th switching tube MN5 are N-type field effect transistor.The source electrode of the first switching tube connects the source electrode of second switch pipe, and the drain electrode of the first switching tube meets the drain electrode of the 3rd switching tube and described first output VP simultaneously; The drain electrode of second switch pipe meets the drain electrode of the 4th switching tube and described second output VN simultaneously; The source electrode of the 3rd switching tube connects the source electrode of the 4th switching tube simultaneously; The control end of second switch pipe and the 3rd switching tube all connects the output of inverter, and the control end of the first switching tube and the 4th switching tube all connects the input of inverter.Certainly, first switching tube MN2, second switch pipe MN3, the 3rd switching tube MN4 and the 4th switching tube MN5 also can be common switching tube, such as triode, in the circuit then connected, the grid of field effect transistor is replaced by the base stage of triode, the source electrode of field effect transistor is replaced by the emitter of triode, and the collector electrode of the drain electrode of field effect transistor triode again replaces.
In preferred embodiment shown in Fig. 2, the operation principle of drive circuit is as follows:
After powering on, VR1 and VR2 is an input reference voltage, at this moment due to the first amplifier, the second amplifier, the first Correctional tube and the degenerative adjustment of the second Correctional tube, the voltage of the positive-negative input end of the first amplifier and the second amplifier all equal (i.e. VN1=VR1, VN2=VR2) is made.The detailed process of negative-feedback regu-lation is: after powering on, if VN1 voltage ratio VR1 is little, because the gain of the first amplifier OP1 is very large, export and reduce, the grid voltage of enhancement mode PMOS MP1 reduces, and its conducting degree strengthens, electric current increases, according to Ohm's law then VN1 voltage rising, until VN1=VR1; If the voltage ratio VR1 of VN1 is large, because the gain of the first amplifier OP1 is very large, output voltage increases, and the grid voltage of enhancement mode PMOS MP1 increases, and its conducting degree weakens, and electric current reduces, according to Ohm's law then VN1 voltage reduction, until VN1=VR1.So, can VN1=VR1 be realized always.
After powering on, if VN2 voltage ratio VR2 is little, because the gain of operational amplifier OP2 is very large, exports and reduce, the grid voltage of enhancement mode NMOS tube MN1 reduces, and conducting degree weakens, and conducting resistance increases, according to Ohm's law then VN2 voltage raise, until VN2=VR2; If the voltage ratio VR2 of VN2 is large, because the gain of operational amplifier OP2 is very large, output voltage increases, and the grid voltage of enhancement mode NMOS tube MN1 increases, and conducting degree strengthens, and conducting resistance reduces, and obtains VN2 voltage reduce, until VN2=VR2 according to Ohm's law.So, can VN2=VR2 be realized always.
Finally obtain VN1=VR1, VN2=VR2, now can obtain according to Ohm's law:
VP=VN1+?(?(VN1-VN2)/R2?)*R1=VR1+(VR1-VR2)*R1/R2
VN=VN2-?(?(VN1-VN2)/R2?)*R3=VR2-(VR1-VR2)*R3)/R2
VP-VN=(VR1-VR2) * (R1+R2+R3)/R2, because R1, R2, R3 can accurately set than row relation, and substantially not by process deviation influence, therefore voltage VP and VN that can be met the demands accurately.Electric capacity C1 plays energy storage pressure stabilizing effect, and it can reduce clock feedthrough and accelerate after switching over to the speed of load node discharge and recharge, improves response speed.
In level switching circuit, when data-signal DP is high level, after inverter INV, DN is low level, and the first switching tube MN2 and the 4th switching tube MN5 conducting, second switch pipe MN3 and the 3rd switching tube MN4 disconnects, and makes VA=VP, VB=VN.Common mode electrical level VCM=(the VA+VB)/2=(VR1+VR2)/2 of VA and VB, so the common mode electrical level of VA and VB is determined value, it accurately sets by VR1, VR2.
When DP is low level, after inverter INV, DN is high level, and the first switching tube MN2 and the 4th switching tube MN5 disconnects, and second switch pipe MN3 and the 3rd switching tube MN4 conducting, make VA=VN, VB=VP; Common mode electrical level VCM=(the VA+VB)/2=(VR1+VR2)/2 of VA and VB, so the common mode electrical level of VA and VB is determined value, it accurately sets by VR1, VR2.
It can thus be appreciated that the common mode electrical level VCM=(VA+VB) obtained in drive circuit provided by the invention/2=(VR1+VR2)/2 can be arranged accurately by the value setting VR1, VR2; And the peak-to-peak value that drive circuit exports | VA-VB|=VP-VN=(VR1-VR2) * (R1+R2+R3)/R2, so the peak-to-peak value that drive circuit exports in conjunction with VR1, VR2, and accurately can be set by the ratio arranging resistance R1, R2, R3.Further preferably, resistance R1 is equal with the resistance of resistance R3.As R1=R3, more conveniently Low Voltage Differential Signal can be exported accurately.Preferably, the equal ground connection of substrate of the first switching tube MN2, second switch pipe MN3, the 3rd switching tube MN4 and the 4th switching tube MN5, the area of above-mentioned each switching tube can be reduced like this, and then the area of Low Voltage Differential Signal drive circuit provided by the invention and volume, minimizing technological requirement can be reduced further, improve the accuracy of the Low Voltage Differential Signal that drive circuit provides.
In sum, low-voltage differential signal drive circuit provided by the invention utilizes operational amplification circuit negative feedback, by resistance ratio computing, LVDS low and high level accurately can be generated, accurately can set common mode electrical level and the voltage difference of Low Voltage Differential Signal, and the shake of the Low Voltage Differential Signal of output can be reduced, the accuracy of the Low Voltage Differential Signal that drive circuit is exported is higher.Meanwhile, it can reduce the voltage glitch that clock feedthrough causes and the operating rate improving drive circuit.
In the description of this specification, specific features, structure, material or feature that the description of reference term " embodiment ", " some embodiments ", " example ", " concrete example " or " some examples " etc. means to describe in conjunction with this embodiment or example are contained at least one embodiment of the present invention or example.In this manual, identical embodiment or example are not necessarily referred to the schematic representation of above-mentioned term.And the specific features of description, structure, material or feature can combine in an appropriate manner in any one or more embodiment or example.
In describing the invention, unless otherwise prescribed and limit, it should be noted that, term " installation ", " being connected ", " connection " should be interpreted broadly, such as, can be mechanical connection or electrical connection, also can be the connection of two element internals, can be directly be connected, also indirectly can be connected by intermediary, for the ordinary skill in the art, the concrete meaning of above-mentioned term can be understood as the case may be.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.