CN104219183B - A kind of downhole modem and method based on the soft cores of Nios - Google Patents
A kind of downhole modem and method based on the soft cores of Nios Download PDFInfo
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- CN104219183B CN104219183B CN201310220084.5A CN201310220084A CN104219183B CN 104219183 B CN104219183 B CN 104219183B CN 201310220084 A CN201310220084 A CN 201310220084A CN 104219183 B CN104219183 B CN 104219183B
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Abstract
A kind of downhole modem and method based on the soft cores of Nios.Belong to oil well logging field data over cable system technical field.Using the Cyclone III fpga chips of a piece of Altera low in energy consumption, multiple processors are constructed wherein using II soft nuclear technology of Nios, complete modulation /demodulation function；Data acquire embedded II processors of Nios, it completes other assisted acquisition functions mainly by associated interface circuitry control acquisition downhole instrument CAN bus data in FPGA；Order receives embedded II processors of Nios and receives auxiliary circuit reception ground transmitting order to lower levels by order, and demodulates ground order together with relevant treatment logic, is used for the control of downhole instrument；Data send the various data organizations that II processors of embedded Nios carry out underground acquisition and are packaged, and carry out associated modulation together with relevant treatment logic, are then sent by sending auxiliary circuit.
Description
Technical field
The present invention relates to a kind of downhole modems and method based on the soft cores of Nios.Belong to oil well logging field cable
Data transmission system technical field.
Background technology
Oil well logging field downhole modem is mainly completed to be sent to ground after modulating downhole data；It receives simultaneously
Ground order is sent to downhole instrument after demodulation.Downhole modem used in current domestic logging remote transmission system is all
It is to complete modulation /demodulation function jointly with fpga chip using various data processing cpu chips, causes complex circuit designs, circuit
Board size is larger.And downhole instruments for petroleum logging is because of the limitation in underground space, it is desirable that circuit board size wants small, and integrated level wants high.
Especially high temperature and pressure minor diameter instrument, integrated level and size to circuit board require harsher.Simultaneously as circuit is installed
In vacuum flask, it requires that power consumption wants low in bottle.In order to solve this problem, it is necessary to improve level of integrated system, application is advanced
II soft core embedded processor technologies of Nios the highly integrated of downhole modem may be implemented, and power consumption is lower, can
More preferable by property, cost more reduces.Invention content
For overcome the deficiencies in the prior art, the present invention provides a kind of downhole modem based on the soft cores of Nios and side
Method.
Present invention solves the technical problem that be that the downhole modem integration degree that petroleum-logging data transmits is not high,
Power consumption is excessive, and circuit size is larger.
The present invention solves the above problems the technical solution adopted is that using a kind of advanced embedded software nuclear technology, specifically
Say it is that multiple processors and the corresponding interface and logic circuit realization underground are constructed in a piece of fpga chip based on II soft cores of Nios
The function of data transmission modulation /demodulation.
Technical scheme is as follows：
A kind of underground modulation-demo-demodulation method based on the soft cores of Nios, containing following steps, using a piece of low in energy consumption
The Cyclone III fpga chips of Altera construct multiple processors using II soft nuclear technology of Nios, complete modulation wherein
Demodulation function；Embedded 3 Nios II processors in the device；First, data acquire embedded II processors of Nios, it leads
If by associated interface circuitry control acquisition downhole instrument CAN bus data in FPGA, and completing other assisted acquisition functions,
One gamma pulse counter, a cable end voltage collector；Second is that order receives embedded II processors of Nios, it passes through
Order receives auxiliary circuit and receives ground transmitting order to lower levels, and demodulates ground order together with relevant treatment logic, is used for underground
The control of instrument；Third, data send embedded II processors of Nios, the various data organizations that it carrys out underground acquisition are packaged,
And associated modulation is carried out together with relevant treatment logic, then sent by sending auxiliary circuit.
A kind of downhole modem based on the soft cores of Nios is constructed using II soft nuclear technology of Nios in a piece of FPGA
Multiple processors coordinate associated interface circuitry and logic to complete complicated modulation /demodulation function；Including a fpga chip；FPGA
Include mainly in chip：Data acquire embedded Nios II processors, order receives embedded Nios II processors, data hair
Embedded Nios II processors, data acquisition interface circuit and logic, order receiving processing circuit and logic and data are sent to send
Processing circuit and logic；Wherein order receives embedded Nios II processors and order receiving processing circuit and logic, constitutes and adjusts
The transmitting order to lower levels receiving module of modulator-demodulator；Data send embedded Nios II processors and data send processing circuit and patrol
Volume, constitute the upload data transmission blocks of modem；Data acquire embedded Nios II processors and are connect by data acquisition
Mouth circuit acquires the data and parameter of downhole instrument with logic 14, after being subject to tissue arrangement, is sent to data and sends embedded Nios
II processors；The data of acquisition include mainly CAN bus data, gamma pulse signal and cable end voltage signal etc.；It goes back simultaneously
It receives order and receives the ground order that embedded Nios II processors are sent, downhole instrument is accordingly controlled；Transmitting order to lower levels
Receiving module is responsible for receiving the logging command that ground issues from cable；It includes that order receives embedded Nios II processors
With order receiving processing circuit and logic two parts；The data flow that ground is issued by cable is reflected in this two parts into planetary
It penetrates, decode transformation etc. and demodulate logging command after work, be then delivered to data and acquire embedded Nios II processors processing；On
Data transmission blocks are passed to be responsible for sending the log data of downhole instrument acquisition；It includes that data send embedded Nios II processing
Device and order receiving processing circuit and logic two parts；It is embedded that data send embedded Nios II processor datas acquisition
Nios II processors obtain the log data of underground acquisition, then with data sending processing circuit together with logic, to these numbers
According to being sent after carrying out the work such as framing, coding and modulation.
The present invention uses the Cyclone III fpga chips of a piece of Altera low in energy consumption, utilizes II soft core skills of Nios
Art constructs multiple processors wherein, completes modulation /demodulation function.3 Nios II processors are embedded in design in the device.
First, data acquire embedded II processors of Nios, it mainly passes through associated interface circuitry control acquisition downhole instrument in FPGA
Device CAN bus data, and other assisted acquisition functions are completed, a gamma pulse counter, a cable end voltage collector.Two
It is that order receives embedded II processors of Nios, it receives auxiliary circuit by order and receives ground transmitting order to lower levels, and and related
Processing logic demodulates ground order together, is used for the control of downhole instrument.It is handled third, data send embedded Nios II
Device, the various data organizations that it carrys out underground acquisition are packaged, and carry out associated modulation together with relevant treatment logic, are then passed through
Auxiliary circuit is sent to send.
Description of the drawings
When considered in conjunction with the accompanying drawings, by referring to following detailed description, can more completely more fully understand the present invention with
And be easy to learn the advantage that many of which is adjoint, but attached drawing described herein is used to provide further understanding of the present invention,
The part of the present invention is constituted, the illustrative embodiments of the present invention and their descriptions are used to explain the present invention, does not constitute to this hair
Bright improper restriction, such as figure are wherein：
Downhole modem structure diagrams of the Fig. 1 based on II soft cores of Nios.
Fig. 2 transmitting order to lower levels receiving module structure diagrams.
Fig. 3 uploads data transmission blocks structure diagram.
Present invention will be further explained below with reference to the attached drawings and examples.
Specific implementation mode
Obviously, those skilled in the art belong to the guarantor of the present invention based on many modifications and variations that spirit of the invention is done
Protect range.
Embodiment 1：As shown in Figure 1, data acquisition interface circuit, which connect data with logic device 14, acquires embedded Nios II
Processor 11, data acquire embedded 11 bind command of Nios II processors and receive embedded Nios II processors 12 and data
Embedded Nios II processors 13 are sent, order receives embedded 12 bind command receiving circuit of Nios II processors and logic
15, order receives embedded Nios II processors 12 and connects the embedded Nios II processors 13 of data transmission, and data send embedding
Enter formula Nios II processors 13 and connects data transmission circuit and logic 16.
Downhole modem based on II soft cores of Nios is one of oil well logging field down-hole data communication system
Point.It is mainly characterized by constructing multiple processors in a piece of FPGA using II soft nuclear technology of Nios, coordinates associated interface circuitry
Complicated modulation /demodulation function is completed with logic.The present invention includes a fpga chip 1.Include mainly in fpga chip 1：When
Data acquire embedded Nios II processors 11；Second is that order receives embedded Nios II processors 12；Third, data are sent
Embedded Nios II processors 13.In addition there are other three hardware modules in FPGA1, be respectively：Data acquisition interface electricity
Road and logic 14, order receiving circuit and logic 15, data transmission circuit and logic 16.Wherein order receives embedded Nios
II processors 12 and order receiving circuit and logic 15, constitute the transmitting order to lower levels receiving module of modem.Data send embedding
Enter formula Nios II processors 13 and data transmission circuit and logic 16, constitutes the upload data transmission blocks of modem.Number
The data and ginseng of downhole instrument are acquired by data acquisition interface circuit and logic 14 according to the embedded Nios II processors 11 of acquisition
Number after being subject to tissue arrangement, is sent to data and sends embedded Nios II processors 13.The data of acquisition include mainly CAN bus
Data, gamma pulse signal and cable end voltage signal etc..It also receives the embedded Nios II processors of order reception 12 and send simultaneously
The ground order come, accordingly controls downhole instrument.Transmitting order to lower levels receiving module is responsible for the reception ground from cable and is issued
Logging command.It includes that order receives embedded Nios II processors 12 and order receiving circuit and 15 two parts of logic.Ground
The data flow that face is issued by cable demodulates well logging life after carrying out the work such as constellation mapping, decoding transformation in this two parts
It enables, is then delivered to data and acquires the embedded processing of Nios II processors 11.The specific composition of transmitting order to lower levels receiving module is shown in Fig. 2.
Data transmission blocks are uploaded to be responsible for sending the log data of downhole instrument acquisition.It includes that data are sent at embedded Nios II
Manage device 13 and order receiving circuit and 16 two parts of logic.Data send embedded Nios II processors 13 and are acquired by data
Embedded Nios II processors 11, obtain underground acquisition log data, then with data transmission circuit with logic 16 together,
It is sent after carrying out the work such as framing, coding and modulation to these data.The specific composition for uploading data transmission blocks is shown in figure
3。
It is illustrated in figure 2 transmitting order to lower levels receiving module structure diagram.Order, which receives, controls embedded Nios II processors 12
Bind command receiving circuit is with logic 15：Receive data control section 151, RS decoders 152, data receiver buffer 153,
Autocorrelation filter 154 synchronizes trained correlation filter 155, plural number FFT converters 156 and the random descrambler of subcarrier 157.
The order receiving channel of downhole system is also the most complicated part with most critical in whole system, and all processing are equal
It is carried out in fpga chip 1.Ground transmitting order to lower levels is received by channel by hardware circuits such as programmable amplifier and low-pass filters
Afterwards, it is sent into AD converter.The underground order that signal is sent by becoming digital signal after AD conversion in modulation /demodulation fpga chip 1
It is handled in receiving module.Underground Order receiver module includes：Order receives embedded Nios II processors 12 and order connects
Receive circuit and 15 two parts of logic.Wherein order receiving circuit includes mainly with 15 part of logic：Receive data control section
151, RS decoders 152, data receiver buffer 153, autocorrelation filter 154, synchronize trained correlation filter 155, plural number
FFT converters 156 and the random descrambler of subcarrier 157.These parts and order, which receive, controls embedded Nios II processors 12
Together, the synchronization acquistion of data, the FFT transform of data, the demodulation of the decoding process and data of the random scrambler of subcarrier, RS are completed
Decoding processing etc., and the good ground order of demodulation process is sent to data acquisition Nios II processors 11 and carries out subsequent processing.
It is illustrated in figure 3 and uploads data transmission blocks structure diagram.Data send embedded Nios II processors 13 and connect
Transmission data control section 161, transmission data buffer 162, RS encoders 163, adjustment constellation converter 164, subcarrier with
Machine scrambler 165, plural number IFFT conjugater transformations device 166 and cyclic prefix generator 167.
The data sending part of downhole system point processing is also completed in fpga chip 1.Uploading data transmission blocks includes：Number
According to the embedded Nios II processors 13 of transmission and data transmission circuit and 16 two parts of logic.Wherein data transmission circuit with patrol
Collecting 16 parts includes mainly：Transmission data control section 161, transmission data buffer 162, RS encoders 163, adjustment constellation become
The random scrambler 165 of parallel operation 164, subcarrier, plural number IFFT conjugater transformations device 166 and cyclic prefix generator 167.Transmission data
Mainly based on data transmission circuit and the processing of logic 16, data send embedded Nios II processors 13 and carry out data transmission
Partial system administration, scheduling, control work.Processing procedure is as follows：Data acquire embedded Nios II processors 11 and completely connect
After receiving a frame downhole instrument data, an interrupt signal, the processing are generated according to the embedded Nios II processors 13 of transmission to negative
After device receives interrupt signal, with regard to log-on data transmission circuit and logic 16, to complete the complete transmission process of data.Basis first
The length gauge of data calculates the symbolic number that data transmission needs, then these data are taken out by symbol and are carried out at corresponding RS codings
Reason completes the mapping processing in the different sub-carrier of data, the IFFT of the random permutation processing and data of sub-carrier signal later
Transformation, after finally increasing cyclic prefix, signal is sent to external D/A-converter.Hardware handles, corresponding position are used completely due to handling
Managing complexity will be bigger, but controls circuit design method, finally due to the use of the change of hardware design, reliability aspect phase
For comparison software processing, reliability wants high.
As described above, being explained in detail to the embodiment of the present invention, as long as but essentially without this hair of disengaging
Bright inventive point and effect can have many deformations, this will be readily apparent to persons skilled in the art.Therefore, this
The variation of sample is also integrally incorporated within protection scope of the present invention.
Claims (1)
1. a kind of underground modulation-demo-demodulation method based on the soft cores of Nios, it is characterised in that containing following steps, use a piece of power consumption
The Cyclone III fpga chips of low Altera construct multiple processors wherein using II soft nuclear technology of Nios, complete
Modulation /demodulation function；Embedded 3 Nios II processors in the chip；First, data acquire embedded II processors of Nios,
It is to acquire downhole instrument CAN bus data by data acquisition interface circuit in FPGA and logic control, and complete other auxiliary
Help acquisition function, a gamma pulse counter, a cable end voltage collector；Second is that order receives at embedded Nios II
Device is managed, it receives ground transmitting order to lower levels by order receiving processing circuit and logic, then demodulates ground order together, is used for
The control of downhole instrument；Third, data send embedded II processors of Nios, it beats the various data organizations that underground acquisition comes
Packet, and send processing circuit with data and carry out associated modulation together with logic, then send；
Data acquire embedded Nios II processors by data acquisition interface circuit and logic acquire downhole instrument data and
Parameter after being subject to tissue arrangement, is sent to data and sends embedded Nios II processors；The data of acquisition include CAN bus number
According to, gamma pulse signal and cable end voltage signal；It also receives order and receives the ground that embedded Nios II processors are sent simultaneously
Face order accordingly controls downhole instrument；
Transmitting order to lower levels receiving module is responsible for receiving the logging command that ground issues from cable；Wherein order receives embedded Nios
II processors and order receiving processing circuit and logic constitute the transmitting order to lower levels receiving module of modem；Ground passes through electricity
The data flow that cable issues carries out constellation mapping in the module, decoding change demodulates logging command after changing jobs, and is then delivered to number
It is handled according to embedded Nios II processors are acquired；
Data transmission blocks are uploaded to be responsible for sending the log data of downhole instrument acquisition；Wherein, data send embedded Nios II
Processor and data send processing circuit and logic, constitute the upload data transmission blocks of modem；Data send insertion
Formula Nios II processors obtain the log data of underground acquisition, then with data sending processing circuit together with logic, to these
Data are sent after carrying out framing, coding and modulation work；
Wherein, order receiving processing circuit includes with logical gate：It is slow to receive data control section, RS decoders, data receiver
Storage, autocorrelation filter synchronize trained correlation filter, plural number FFT converters and the random descrambler of subcarrier；These parts
Embedded Nios II processors are received with order together, complete the synchronization acquistion of data, the FFT transform of data, subcarrier is random
Demodulation, the RS decodings processing of the decoding process and data of scrambler, and the good ground order of demodulation process is sent to data and is adopted
Collect embedded Nios II processors and carries out subsequent processing；
Wherein, the data sending processing circuit for uploading data transmission blocks includes with logical gate：Transmission data control section, hair
It send data buffer, RS encoders, adjustment constellation converter, the random scrambler of subcarrier, plural number IFFT conjugater transformations device and follows
Ring prefix generator；Processing procedure is as follows：Data acquire embedded Nios II processors and have completely received a frame downhole instrument number
According to later, one interrupt signal of embedded Nios II processors generation is sent to data are responsible for, which receives interruption letter
After number, with regard to log-on data transmission circuit and logic, to complete the complete transmission process of data；First according to the length computation of data
Go out the symbolic number of data transmission needs, then these data are taken out by symbol and carry out corresponding RS coded treatments, completes number later
According to different sub-carrier on mapping processing, sub-carrier signal random permutation processing and data IFFT convert, finally increase
After cyclic prefix, signal is sent to external D/A-converter.
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| CN107393500A (en) * | 2016-05-16 | 2017-11-24 | 长沙闽壹湖电子科技有限责任公司 | A kind of VGA display circuits design based on NIOSII |
| CN107168181A (en) * | 2017-06-26 | 2017-09-15 | 南方电网科学研究院有限责任公司 | Data acquisition system based on FPGA |
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| CN201075248Y (en) * | 2007-08-27 | 2008-06-18 | 中国石油天然气集团公司 | USB interface real-time data acquisition controller |
| CN201145945Y (en) * | 2007-11-01 | 2008-11-05 | 中国石油天然气集团公司 | Multifunctional down-hole cable telemetry data transmission converter |
| CN101705872A (en) * | 2009-11-10 | 2010-05-12 | 南京航空航天大学 | FPGA-based distributed aeroengine electronic controller in chip and control method |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201075248Y (en) * | 2007-08-27 | 2008-06-18 | 中国石油天然气集团公司 | USB interface real-time data acquisition controller |
| CN201145945Y (en) * | 2007-11-01 | 2008-11-05 | 中国石油天然气集团公司 | Multifunctional down-hole cable telemetry data transmission converter |
| CN101705872A (en) * | 2009-11-10 | 2010-05-12 | 南京航空航天大学 | FPGA-based distributed aeroengine electronic controller in chip and control method |
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