CN104201106A - Thin film transistor, and method as well as system for producing same - Google Patents

Thin film transistor, and method as well as system for producing same Download PDF

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Publication number
CN104201106A
CN104201106A CN201410424148.8A CN201410424148A CN104201106A CN 104201106 A CN104201106 A CN 104201106A CN 201410424148 A CN201410424148 A CN 201410424148A CN 104201106 A CN104201106 A CN 104201106A
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CN
China
Prior art keywords
layer
unit
touch control
insulating barrier
semiconductor layer
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Pending
Application number
CN201410424148.8A
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Chinese (zh)
Inventor
王金科
刘丹军
胡淑爱
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Hunan Electronic Information Industry Group Co., Ltd.
Original Assignee
HUNAN OMNISUN ABLE FLAT PANEL DISPLAY CO Ltd
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Application filed by HUNAN OMNISUN ABLE FLAT PANEL DISPLAY CO Ltd filed Critical HUNAN OMNISUN ABLE FLAT PANEL DISPLAY CO Ltd
Priority to CN201410424148.8A priority Critical patent/CN104201106A/en
Publication of CN104201106A publication Critical patent/CN104201106A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Human Computer Interaction (AREA)
  • Thin Film Transistor (AREA)

Abstract

The invention discloses a thin film transistor, and a method as well as a system for producing the same. As a scanning circuit in the thin film transistor and a first axial line in a touch control circuit are arranged in the same layer, an insulating layer in the thin film transistor and an insulating layer in the touch control circuit are arranged in the same layer, and a data circuit in the thin film transistor and a second axial line in the touch control circuit are arranged in the same layer, integral arrangement of a touch control mode input device and an original thin film transistor is realized. An externally arranged input device is unnecessary, so that volume enlargement is avoided; meanwhile, each layer of the touch control circuit and each layer of the original thin film transistor are arranged in the same layer, so that the problem of influencing the penetration effect by the externally arranged input device is solved efficiently.

Description

A kind of thin-film transistor manufacture method, system and thin-film transistor
Technical field
The present invention relates to Electronic Paper field, relate in particular to a kind of thin-film transistor manufacture method, system and thin-film transistor.
Background technology
Electronic paper technology adopts electrophoretic display technology as display floater more, and its display effect approaches nature paper effect, avoids reading fatigue, but it needs extra digital device to read, as electronic dictionary, PC etc.
At present, the display floater of Electronic Paper adopts thin-film transistor to make conventionally, and no matter is electronic dictionary or PC, all needs to increase input unit, namely need on the basis of thin-film transistor, additionally increase input unit, could realize the demonstration of Electronic Paper.
No matter be to increase push-button input device or touch-type input device, all can make volume increase, in addition, if adopt touch-type input device, can reduce the effect that sees through of display screen.
Summary of the invention
In view of this, the invention provides a kind of thin-film transistor manufacture method, system and thin-film transistor, increase input unit in prior art and can make volume increase to solve, and touch-type input device can reduce the problem that sees through effect of display screen, its concrete scheme is as follows:
A kind of thin-film transistor manufacture method, comprising:
Choose driving substrate;
Plated metal conductive film layer on described driving substrate, forms gate electrode pattern and sweep circuit, and described gate electrode pattern and sweep circuit are positioned on sweep circuit layer;
The first axle road that makes touch control line, is positioned on described sweep circuit floor the first axle road of described touch control line;
Above described sweep circuit layer, deposit gate insulation layer, described gate insulation layer is positioned on insulating barrier;
The insulating barrier of making touch control line, is positioned on described insulating barrier the insulating barrier of described touch control line;
Above described insulating barrier, form semiconductor layer, form source electrode, drain electrode and data circuit above described semiconductor layer, described source electrode, drain electrode and data circuit are positioned at data circuit layer;
The the second axis road that makes touch control line, is positioned on described data circuit floor the second axis road of described touch control line.
Further, plated metal conductive film layer on described driving substrate, forms gate electrode pattern and sweep circuit, specifically comprises:
Plated metal conductive film layer on described driving substrate, adopts gold-tinted, etching mode to form gate electrode pattern and sweep circuit.
Further, above described insulating barrier, form semiconductor layer, above described semiconductor layer, form source electrode, drain electrode, specifically comprise:
Above described insulating barrier, form semiconductor layer;
Above described semiconductor layer, form source electrode and drain electrode, described source electrode and drain electrode are overlapped on the two ends of described semiconductor layer.
Further, above described insulating barrier, form semiconductor layer, above described semiconductor layer, form source electrode, drain electrode, specifically comprise:
Above described insulating barrier, form semiconductor layer, described semiconductor layer comprises semiconductor pattern and ohmic contact layer pattern;
Above described semiconductor layer, form source electrode and drain electrode, described source electrode and drain electrode are overlapped on the two ends of described ohmic contact layer pattern;
Remove the ohmic contact layer pattern between source electrode and drain electrode by etching mode.
A kind of thin-film transistor manufacturing system, comprise: choose unit, choose with described the first production unit that unit is connected, the second production unit being connected with described the first production unit, the 3rd production unit being connected with described the second production unit, the 4th production unit being connected with described the 3rd production unit
The described unit selection of choosing drives substrate;
Described the first production unit is plated metal conductive film layer on described driving substrate, form gate electrode pattern and sweep circuit, described gate electrode pattern and sweep circuit are positioned on sweep circuit layer, and described the first production unit is made the first axle road of touch control line on described sweep circuit floor;
Described the second production unit deposits gate insulation layer above described sweep circuit layer, and described gate insulation layer is positioned on insulating barrier, and described the second production unit is made the insulating barrier of touch control line on described insulating barrier;
Described the 3rd production unit forms semiconductor layer above described insulating barrier;
Described the 4th production unit forms source electrode, drain electrode and data circuit above described semiconductor layer, described source electrode, drain electrode, data circuit are positioned on data circuit layer, and described the 4th production unit is made the second axis road of touch control line on described data circuit floor.
Further, also comprise: the etching unit being connected with described the first production unit,
Described etching unit for after plated metal conductive film layer, utilizing etching mode to form gate electrode pattern and sweep circuit in described the first production unit on described driving substrate.
Further, described the 4th production unit comprises: electrode forming unit,
Described electrode forming unit for forming source electrode and drain electrode above semiconductor layer, and described source electrode and drain electrode are overlapped on the two ends of described semiconductor layer.
Further, described the 3rd production unit comprises: the second electrode forming unit,
Described the second electrode forming unit for forming source electrode and drain electrode above semiconductor layer, described semiconductor layer comprises semiconductor pattern and ohmic contact layer pattern, described source electrode and drain electrode are overlapped on the two ends of described ohmic contact layer pattern, and described the second electrode forming unit is removed the ohmic contact layer pattern between source electrode and drain electrode by etching mode.
A kind of thin-film transistor, comprising: the driving substrate, sweep circuit layer unit, insulating barrier unit, semiconductor layer unit and the data circuit layer unit that set gradually from the bottom to top, and wherein, described sweep circuit layer unit is arranged on described driving substrate,
Described sweep circuit floor unit comprises: the first axle road of gate electrode pattern, sweep circuit and touch control line, and described gate electrode pattern and sweep circuit plated metal conductive film layer on described driving substrate forms;
Described insulating barrier unit comprises: the insulating barrier of gate insulation layer and touch control line, described gate insulation layer above described sweep circuit layer unit, deposit form;
Described data circuit floor unit comprises: the second axis road of source electrode, drain electrode, data circuit and touch control line.
Further, described gate electrode pattern, sweep circuit plated metal conductive film layer on described driving substrate forms, and is specially:
Gate electrode pattern, sweep circuit are plated metal conductive film layers on described driving substrate, and adopt gold-tinted, etching mode to form.
Can find out from technique scheme, the application's thin-film transistor manufacture method, system and thin-film transistor, by form respectively successively sweep circuit layer, insulating barrier, semiconductor layer and data circuit layer on substrate, on sweep circuit floor, be manufactured with the first axle road of sweep circuit and touch control line, on insulating barrier, be manufactured with the insulating barrier of gate insulation layer and touch control line, on data circuit floor, be manufactured with the second axis road of data circuit and touch control line.This programme is by arranging the first axle road in the sweep circuit in thin-film transistor and touch control line with the second axis road of the data circuit in floor, thin-film transistor and touch control line with the insulating barrier in floor, thin-film transistor and the insulating barrier in touch control line with floor, make to realize the input unit of control mode touch mode and original thin-film transistor is set to one, without external input unit, avoid volume to increase, simultaneously, each layer of touch control line arranges with each layer of same layer of former thin-film transistor, efficiently solves external input unit and make to see through the affected problem of effect.
Brief description of the drawings
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the flow chart of the disclosed a kind of thin-film transistor manufacture method of the embodiment of the present invention;
Fig. 2 is the structural representation of the disclosed a kind of thin-film transistor manufacturing system of the embodiment of the present invention;
Fig. 3 is the structural representation of the disclosed a kind of thin-film transistor of the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
The invention discloses a kind of thin-film transistor manufacture method, its flow chart as shown in Figure 1, comprising:
Step S11, choose driving substrate;
Step S12, driving plated metal conductive film layer on substrate, form gate electrode pattern and sweep circuit, gate electrode pattern and sweep circuit are positioned on sweep circuit layer;
Wherein, driving plated metal conductive film layer on substrate, form gate electrode pattern and sweep circuit, be specifically as follows: driving plated metal conductive film layer on substrate, adopting gold-tinted, etching mode to form gate electrode pattern and sweep circuit.
Step S13, the first axle road that makes touch control line, be positioned on sweep circuit floor the first axle road of touch control line;
The first axle road of gate electrode pattern, sweep circuit and touch control line is arranged on same layer, makes, in the time that touch control line is connected with former thin-film transistor, to have reduced the space at the first axle layer place of touch control line.
The first axle road of gate electrode pattern, sweep circuit and touch control line arranges separately mutually, is just arranged at same layer, makes function separately unaffected.
Step S14, above sweep circuit, deposit gate insulation layer, gate insulation layer is positioned on insulating barrier;
The insulating barrier of step S15, making touch control line, is positioned on insulating barrier the insulating barrier of touch control line;
The insulating barrier of gate insulation layer and touch control line is arranged on same layer, has avoided, in the time that touch control line is connected together with former thin-film transistor, increasing the insulating barrier of one deck touch control line more.
The insulating barrier of gate insulation layer and touch control line is arranged on same layer, but there is no separately association, and effect is separately unaffected.
Step S16, above insulating barrier, form semiconductor layer, form source electrode, drain electrode and data circuit above semiconductor layer, source electrode, drain electrode and data circuit are positioned at data circuit layer;
Wherein, form semiconductor layer above insulating barrier, the detailed process that forms source electrode, drain electrode above semiconductor layer is:
Above insulating barrier, form semiconductor layer, form source electrode and drain electrode on semiconductor layer, wherein, source electrode and drain electrode are positioned on data circuit layer, and source electrode and drain electrode are overlapped on the two ends of semiconductor layer.
Semiconductor layer can only comprise semiconductor pattern, also can comprise semiconductor pattern and ohmic contact layer pattern.
In the time that semiconductor layer comprises semiconductor pattern and ohmic contact layer pattern, above insulating barrier, form semiconductor layer, the detailed process that forms source electrode, drain electrode above semiconductor layer is:
Above insulating barrier, form semiconductor layer, wherein, semiconductor layer comprises semiconductor pattern and ohmic contact layer pattern, on semiconductor layer, form source electrode and drain electrode, wherein, source electrode and drain electrode are positioned on data circuit layer, and source electrode and drain electrode are overlapped on the two ends of ohmic contact layer pattern, remove the ohmic contact layer pattern between source electrode and drain electrode by etching mode.
Semiconductor layer is not done to concrete restriction at this.
Step S17, the second axis road that makes touch control line, be positioned on data circuit floor the second axis road of touch control line.
The second axis road of source electrode, drain electrode, data circuit and touch control line is arranged on same layer, makes, in the time that touch control line is connected with former thin-film transistor, to have reduced the space at the second axis layer place of touch control line.
Wherein, although the second axis road of source electrode, drain electrode, data circuit and touch control line is arranged on same layer, there is no separately association, effect is separately unaffected each other.
In addition, the first axle road of the touch control line in the present embodiment is arranged on sweep circuit floor, the second axis road is arranged on data circuit floor, in the present embodiment, the first axle road of touch control line can also be arranged on data circuit floor, the second axis road of touch control line is arranged on sweep circuit floor.
At this, only otherwise affect the realization of function separately, this is not construed as limiting.
The present embodiment thin-film transistor manufacture method, by form respectively successively sweep circuit layer, insulating barrier, semiconductor layer and data circuit layer on substrate, on sweep circuit floor, be manufactured with the first axle road of sweep circuit and touch control line, on insulating barrier, be manufactured with the insulating barrier of gate insulation layer and touch control line, on data circuit floor, be manufactured with the second axis road of data circuit and touch control line.This programme is by arranging the first axle road in the sweep circuit in thin-film transistor and touch control line with the second axis road of the data circuit in floor, thin-film transistor and touch control line with the insulating barrier in floor, thin-film transistor and the insulating barrier in touch control line with floor, make to realize the input unit of control mode touch mode and original thin-film transistor is set to one, without external input unit, avoid volume to increase, simultaneously, each layer of touch control line arranges with each layer of same layer of former thin-film transistor, efficiently solves external input unit and make to see through the affected problem of effect.
The present embodiment discloses a kind of thin-film transistor manufacturing system, and its structural representation as shown in Figure 2, comprising:
Choose unit 21, with the first production unit 22 of choosing unit 21 and being connected, the second production unit 23 being connected with the first production unit 22, the 3rd production unit 24 being connected with the second production unit 23, the 4th production unit 25 being connected with the 3rd production unit.
Wherein, choose unit 21 for choosing driving substrate.
The first production unit 22 is for driving plated metal conductive film layer on substrate, form gate electrode pattern, sweep circuit, gate electrode pattern, sweep circuit are positioned on sweep circuit layer, and the first production unit 22 is made the first axle road of touch control line on sweep circuit floor.
The second production unit 23 for depositing gate insulation layer above sweep circuit layer, and gate insulation layer is positioned on insulating barrier, and the second production unit 23 is made the insulating barrier of touch control line on insulating barrier.
The 3rd production unit 24 for forming semiconductor layer above insulating barrier.
The 4th production unit 25 for forming source electrode, drain electrode and data circuit above semiconductor layer, and source electrode, drain electrode and data circuit are positioned on data circuit layer, and the 4th production unit 25 is made the second axis road of touch control line on data circuit floor.
Wherein, disclosed the 4th production unit 25 of the present embodiment can comprise: electrode forming unit.
Electrode forming unit for forming source electrode and drain electrode on semiconductor layer, and source electrode and drain electrode are positioned on data circuit layer, and source electrode and drain electrode are overlapped on the two ends of semiconductor layer.
Semiconductor layer can only comprise semiconductor pattern, also can comprise semiconductor pattern and ohmic contact layer pattern.
In the time that semiconductor layer comprises semiconductor pattern and ohmic contact layer pattern, electrode forming unit specifically for:
Motor forming unit for forming source electrode and drain electrode on semiconductor layer, source electrode and drain electrode are positioned on data circuit layer, semiconductor layer comprises semiconductor pattern and ohmic contact layer pattern, source electrode and drain electrode are overlapped on the two ends of ohmic contact layer pattern, and remove the ohmic contact layer pattern between source electrode and drain electrode by etching mode.
Semiconductor layer is not done to concrete restriction at this.
The present embodiment thin-film transistor manufacturing system, by form respectively successively sweep circuit layer, insulating barrier, semiconductor layer and data circuit layer on substrate, on sweep circuit floor, be manufactured with the first axle road of sweep circuit and touch control line, on insulating barrier, be manufactured with the insulating barrier of gate insulation layer and touch control line, on data circuit floor, be manufactured with the second axis road of data circuit and touch control line.This programme is by arranging the first axle road in the sweep circuit in thin-film transistor and touch control line with the second axis road of the data circuit in floor, thin-film transistor and touch control line with the insulating barrier in floor, thin-film transistor and the insulating barrier in touch control line with floor, make to realize the input unit of control mode touch mode and original thin-film transistor is set to one, without external input unit, avoid volume to increase, simultaneously, each layer of touch control line arranges with each layer of same layer of former thin-film transistor, efficiently solves external input unit and make to see through the affected problem of effect.
The disclosed thin-film transistor manufacturing system of the present embodiment, can also comprise: the etching unit being connected with the first production unit 22.
Etching unit, for after forming plated metal conductive film layer in the first production unit 22 on driving substrate, utilizes etching mode to form gate electrode pattern, sweep circuit.
The present embodiment discloses a kind of thin-film transistor, and its structural representation as shown in Figure 3, comprising:
Drive substrate 31, sweep circuit layer unit 32, insulating barrier unit 33, semiconductor layer unit 34 and data circuit layer unit 35.
Drive substrate 31, sweep circuit layer unit 32, insulating barrier unit 33, semiconductor layer unit 34 and data circuit layer unit 35 arrange successively from the bottom to top, and sweep circuit layer unit 32 is arranged at and drives on substrate 31.
Sweep circuit floor unit 32 comprises: the first axle road of gate electrode pattern, sweep circuit and touch control line, wherein, gate electrode pattern and sweep circuit are to drive plated metal conductive film layer on substrate, and adopt gold-tinted, etching mode to form.
Insulating barrier unit 33 comprises: the insulating barrier of gate insulation layer, touch control line, gate insulation layer above sweep circuit layer unit 32, deposit form.
Data circuit floor unit 35 comprises: the second axis road of source electrode, drain electrode, data circuit and touch control line.
Semiconductor layer unit 34 can comprise semiconductor pattern and ohmic contact layer pattern, can be also only semiconductor pattern or other forms, does not limit at this.
In addition, it should be noted that, the first axle road of touch control line can be arranged on sweep circuit floor unit, and so, the second axis road of touch control line is arranged on data circuit floor unit; The first axle road of touch control line also can be arranged on data circuit floor unit, and now, the second axis road of touch control line is arranged on sweep circuit floor unit.At this, its concrete setting position is not limited.
The present embodiment thin-film transistor, by form respectively successively sweep circuit layer unit, insulating barrier unit, semiconductor layer unit and data circuit layer unit on driving substrate, on sweep circuit floor unit, be manufactured with the first axle road of sweep circuit and touch control line, on insulating barrier unit, be manufactured with the insulating barrier of gate insulation layer and touch control line, on data circuit floor unit, be manufactured with the second axis road of data circuit and touch control line.This programme is by arranging the first axle road in the sweep circuit in thin-film transistor and touch control line with the second axis road of the data circuit in floor, thin-film transistor and touch control line with the insulating barrier in floor, thin-film transistor and the insulating barrier in touch control line with floor, make to realize the input unit of control mode touch mode and original thin-film transistor is set to one, without external input unit, avoid volume to increase, simultaneously, each layer of touch control line arranges with each layer of same layer of former thin-film transistor, efficiently solves external input unit and make to see through the affected problem of effect.
In this specification, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is and the difference of other embodiment, between each embodiment identical similar part mutually referring to.For the disclosed device of embodiment, because it corresponds to the method disclosed in Example, so description is fairly simple, relevant part illustrates referring to method part.
Professional can also further recognize, unit and the algorithm steps of each example of describing in conjunction with embodiment disclosed herein, can realize with electronic hardware, computer software or the combination of the two, for the interchangeability of hardware and software is clearly described, composition and the step of each example described according to function in the above description in general manner.These functions are carried out with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.Professional and technical personnel can realize described function with distinct methods to each specifically should being used for, but this realization should not thought and exceeds scope of the present invention.
The software module that the method for describing in conjunction with embodiment disclosed herein or the step of algorithm can directly use hardware, processor to carry out, or the combination of the two is implemented.Software module can be placed in the storage medium of any other form known in random asccess memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technical field.
To the above-mentioned explanation of the disclosed embodiments, make professional and technical personnel in the field can realize or use the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiment, General Principle as defined herein can, in the situation that not departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention will can not be restricted to these embodiment shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.

Claims (10)

1. a thin-film transistor manufacture method, is characterized in that, comprising:
Choose driving substrate;
Plated metal conductive film layer on described driving substrate, forms gate electrode pattern and sweep circuit, and described gate electrode pattern and sweep circuit are positioned on sweep circuit layer;
The first axle road that makes touch control line, is positioned on described sweep circuit floor the first axle road of described touch control line;
Above described sweep circuit layer, deposit gate insulation layer, described gate insulation layer is positioned on insulating barrier;
The insulating barrier of making touch control line, is positioned on described insulating barrier the insulating barrier of described touch control line;
Above described insulating barrier, form semiconductor layer, form source electrode, drain electrode and data circuit above described semiconductor layer, described source electrode, drain electrode and data circuit are positioned at data circuit layer;
The the second axis road that makes touch control line, is positioned on described data circuit floor the second axis road of described touch control line.
2. method according to claim 1, is characterized in that, plated metal conductive film layer on described driving substrate forms gate electrode pattern and sweep circuit, specifically comprises:
Plated metal conductive film layer on described driving substrate, adopts gold-tinted, etching mode to form gate electrode pattern and sweep circuit.
3. method according to claim 1, is characterized in that, above described insulating barrier, forms semiconductor layer, forms source electrode, drain electrode above described semiconductor layer, specifically comprises:
Above described insulating barrier, form semiconductor layer;
Above described semiconductor layer, form source electrode and drain electrode, described source electrode and drain electrode are overlapped on the two ends of described semiconductor layer.
4. method according to claim 1, is characterized in that, above described insulating barrier, forms semiconductor layer, forms source electrode, drain electrode above described semiconductor layer, specifically comprises:
Above described insulating barrier, form semiconductor layer, described semiconductor layer comprises semiconductor pattern and ohmic contact layer pattern;
Above described semiconductor layer, form source electrode and drain electrode, described source electrode and drain electrode are overlapped on the two ends of described ohmic contact layer pattern;
Remove the ohmic contact layer pattern between source electrode and drain electrode by etching mode.
5. a thin-film transistor manufacturing system, it is characterized in that, comprise: choose unit, choose with described the first production unit that unit is connected, the second production unit being connected with described the first production unit, the 3rd production unit being connected with described the second production unit, the 4th production unit being connected with described the 3rd production unit
The described unit selection of choosing drives substrate;
Described the first production unit is plated metal conductive film layer on described driving substrate, form gate electrode pattern and sweep circuit, described gate electrode pattern and sweep circuit are positioned on sweep circuit layer, and described the first production unit is made the first axle road of touch control line on described sweep circuit floor;
Described the second production unit deposits gate insulation layer above described sweep circuit layer, and described gate insulation layer is positioned on insulating barrier, and described the second production unit is made the insulating barrier of touch control line on described insulating barrier;
Described the 3rd production unit forms semiconductor layer above described insulating barrier;
Described the 4th production unit forms source electrode, drain electrode and data circuit above described semiconductor layer, described source electrode, drain electrode, data circuit are positioned on data circuit layer, and described the 4th production unit is made the second axis road of touch control line on described data circuit floor.
6. system according to claim 5, is characterized in that, also comprises: the etching unit being connected with described the first production unit,
Described etching unit for after plated metal conductive film layer, utilizing etching mode to form gate electrode pattern and sweep circuit in described the first production unit on described driving substrate.
7. system according to claim 5, is characterized in that, described the 4th production unit comprises: electrode forming unit,
Described electrode forming unit for forming source electrode and drain electrode above semiconductor layer, and described source electrode and drain electrode are overlapped on the two ends of described semiconductor layer.
8. system according to claim 5, is characterized in that, described the 3rd production unit comprises: the second electrode forming unit,
Described the second electrode forming unit for forming source electrode and drain electrode above semiconductor layer, described semiconductor layer comprises semiconductor pattern and ohmic contact layer pattern, described source electrode and drain electrode are overlapped on the two ends of described ohmic contact layer pattern, and described the second electrode forming unit is removed the ohmic contact layer pattern between source electrode and drain electrode by etching mode.
9. a thin-film transistor, it is characterized in that, comprising: the driving substrate, sweep circuit layer unit, insulating barrier unit, semiconductor layer unit and the data circuit layer unit that set gradually from the bottom to top, wherein, described sweep circuit layer unit is arranged on described driving substrate
Described sweep circuit floor unit comprises: the first axle road of gate electrode pattern, sweep circuit and touch control line, and described gate electrode pattern and sweep circuit plated metal conductive film layer on described driving substrate forms;
Described insulating barrier unit comprises: the insulating barrier of gate insulation layer and touch control line, described gate insulation layer above described sweep circuit layer unit, deposit form;
Described data circuit floor unit comprises: the second axis road of source electrode, drain electrode, data circuit and touch control line.
10. thin-film transistor according to claim 9, is characterized in that, described gate electrode pattern, sweep circuit plated metal conductive film layer on described driving substrate forms, and is specially:
Gate electrode pattern, sweep circuit are plated metal conductive film layers on described driving substrate, and adopt gold-tinted, etching mode to form.
CN201410424148.8A 2014-08-26 2014-08-26 Thin film transistor, and method as well as system for producing same Pending CN104201106A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410424148.8A CN104201106A (en) 2014-08-26 2014-08-26 Thin film transistor, and method as well as system for producing same

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Application Number Priority Date Filing Date Title
CN201410424148.8A CN104201106A (en) 2014-08-26 2014-08-26 Thin film transistor, and method as well as system for producing same

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Publication Number Publication Date
CN104201106A true CN104201106A (en) 2014-12-10

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