CN104142886A - ARM (advanced RISC machines) assembly code debugging and processing method and device - Google Patents
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Abstract
An embodiment of the invention provides an ARM (advanced RISC machines) assembly code debugging and processing method and device. The method comprises the steps as follows: an ARM assembly code is converted into an ARM ASC (assembly simulated code) according to a conversion rule, and the ASC is an ARM assembly code represented with a C++ grammatical form; and a C++ IDE (integrated development environment) is applied to debugging of the ASC. In the embodiment of the invention, the ARM assembly code is converted into the ASC according to the conversion rule, then the C++ IDE can be applied to the debugging of the ASC, a professional special simulator is not required any more, a newest ARM instruction set can be supported rapidly, and accordingly, the development of relative products is more flexible and more extensible.
Description
Technical field
The present invention relates to the communication technology, relate in particular to a kind of ARM assembly code debugging disposal route and device.
Background technology
Senior reduced instruction set computer machine (Advanced RISC Machines, be called for short ARM) architecture at present large area be used in mobile platform, such as mobile phone, panel computer etc.Due to the susceptibility to power consumption, exploitation low-power consumption, high performance application become one of critical path promoting user's experience.
For performance-sensitive code, general compilation and the variant thereof of adopting, as the mode such as inline assembler, Intrinsic is write, wherein Intrinsic is the grammer for alternative inline assembler specific to certain compiler.Inline assembler and Intrinsic need specific compiler support, especially, also need different compiler supports for different Intrinsic, therefore use Intrinsic can reduce the portability of code.Common compilation only needs corresponding assembler support, transplants better performances.But writing with respect to writing of the codes such as C++ of assembly code more easily makes mistakes, thereby the debugging of assembly code seems particularly important.Along with ARM instruction set architecture is constantly upgraded, if do not have emulator to carry out single-step debug, carry out so function, functional module is integrated will become abnormal difficult.
In prior art, for the debugging of ARM assembly instruction, be to use corresponding isa simulator, the Visual Studio that for example WinCE uses, the Carbide that Saipan (Symbian) system is used, the Real View external member of ARM official.
But, adopt the method for prior art, if exploitation, debug new instruction set code and need to wait for the renewal of simulated environment, and also cannot ensure the update time of these environment, tends to affect the development progress of product.
Summary of the invention
The invention provides a kind of ARM assembly code debugging disposal route and device, the problem that must use particular simulator to debug for solving ARM assembly code.
Embodiment of the present invention first aspect provides a kind of ARM assembly code debugging disposal route, comprising:
According to transformation rule, ARM assembly code is converted to ARM compilation simulation code ASC, described ASC is the ARM assembly code that uses C++ grammatical form to represent;
The integrated open environment of application C++ is debugged described ASC.
In conjunction with first aspect, in the possible embodiment of the first of first aspect, described transformation rule comprises following conversion sub-rule one or a combination set of:
ARM ordinary instruction conversion sub-rule, ARM register conversion sub-rule, ARM constant conversion sub-rule, ARM barrel shifter conversion sub-rule, NEON scalar conversion sub-rule, ARM Neon instruction transformation sub-rule.
In conjunction with the possible embodiment of the first of first aspect, in the possible embodiment of the second of first aspect, described ARM ordinary instruction conversion sub-rule comprises: described ARM ordinary instruction is converted to the function in C++ grammatical form.
In conjunction with the possible embodiment of the first of first aspect, in the third possible embodiment of first aspect, described ARM register conversion sub-rule comprises: described ARM register is converted to the global variable in C++ grammatical form.
In conjunction with the possible embodiment of the first of first aspect, in the 4th kind of possible embodiment of first aspect, described ARM constant conversion sub-rule comprises: described ARM constant is converted to the constant in C++ grammatical form.
In conjunction with the possible embodiment of the first of first aspect, in the 5th kind of possible embodiment of first aspect, described NEON scalar conversion sub-rule comprises: described NEON scalar is converted to array and the constant in C++ grammatical form, wherein, the index that described constant is described array.
In conjunction with the possible embodiment of the first of first aspect, in the 6th kind of possible embodiment of first aspect, described ARM barrel shifter conversion sub-rule comprises: described ARM barrel shifter is converted to the enumerated value in C++ grammatical form.
In conjunction with the possible embodiment of the first of first aspect, in the 7th kind of possible embodiment of first aspect, described ARM Neon instruction transformation sub-rule comprises: be object and the member function in C++ grammatical form by described ARM Neon instruction transformation.
Embodiment of the present invention second aspect provides a kind of ARM assembly code debugging treating apparatus, comprising:
Modular converter, for according to transformation rule, is converted to ARM compilation simulation code ASC by ARM assembly code, and described ASC is the ARM assembly code that uses C++ grammatical form to represent;
Debugging module, debugs described ASC for applying the integrated open environment of C++.
In conjunction with second aspect, in the possible embodiment of the first of second aspect, described transformation rule comprises following conversion sub-rule one or a combination set of:
ARM ordinary instruction conversion sub-rule, ARM register conversion sub-rule, ARM constant conversion sub-rule, ARM barrel shifter conversion sub-rule, NEON scalar conversion sub-rule, ARM Neon instruction transformation sub-rule.
In conjunction with the possible embodiment of the first of second aspect, in the possible embodiment of the second of second aspect, described ARM ordinary instruction conversion sub-rule comprises: described ARM ordinary instruction is converted to the function in C++ grammatical form.
In conjunction with the possible embodiment of the first of second aspect, in the third possible embodiment of second aspect, described ARM register conversion sub-rule comprises: described ARM register is converted to the global variable in C++ grammatical form.
In conjunction with the possible embodiment of the first of second aspect, in the 4th kind of possible embodiment of second aspect, described ARM constant conversion sub-rule comprises: described ARM constant is converted to the constant in C++ grammatical form.
In conjunction with the possible embodiment of the first of second aspect, in the 5th kind of possible embodiment of second aspect, described NEON scalar conversion sub-rule comprises: described NEON scalar is converted to array and the constant in C++ grammatical form, wherein, the index that described constant is described array.
In conjunction with the possible embodiment of the first of second aspect, in the 6th kind of possible embodiment of second aspect, described ARM barrel shifter conversion sub-rule comprises: described ARM barrel shifter is converted to the enumerated value in C++ grammatical form.
In conjunction with the possible embodiment of the first of second aspect, in the 7th kind of possible embodiment of second aspect, described ARM Neon instruction transformation sub-rule comprises: be object and the member function in C++ grammatical form by described ARM Neon instruction transformation.
In the embodiment of the present invention, according to transformation rule, ARM assembly code is converted to ASC, then just can apply C++IDE debugs this ASC, and without the specific emulator that depends on again specialty, also can realize quick support ARM latest command collection, make the exploitation of Related product more flexible, can expand.
Brief description of the drawings
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skill in the art, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the schematic flow sheet of ARM assembly code debugging disposal route embodiment mono-provided by the invention;
Fig. 2 is the structural representation of ARM assembly code debugging treating apparatus embodiment mono-provided by the invention.
Embodiment
For making object, technical scheme and the advantage of the embodiment of the present invention clearer, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
Fig. 1 is the schematic flow sheet of ARM assembly code debugging disposal route embodiment mono-provided by the invention, and as shown in Figure 1, this flow process comprises:
S101, according to transformation rule, ARM assembly code is converted to ARM compilation simulation code (ARM Simulated Code is called for short ASC), this ASC is the ARM assembly code that uses C++ grammatical form to represent.
This transformation rule is the rule that ARM assembly code is converted to the ARM assembly code representing according to C++ grammatical form.
S102, the integrated open environment of application C++ (C++Integrated Development Environment is called for short C++IDE) are debugged above-mentioned ASC.
In the present embodiment, according to transformation rule, ARM assembly code is converted to ASC, then just can applies C++IDE this ASC is debugged, and without depending on again professional emulator, also can realize quick support ARM latest command collection, make the exploitation of Related product more flexible, can expand.
Further, above-mentioned transformation rule comprises following conversion sub-rule one or a combination set of: ARM ordinary instruction conversion sub-rule, ARM register conversion sub-rule, ARM constant conversion sub-rule, ARM barrel shifter conversion sub-rule, NEON scalar conversion sub-rule, ARM Neon instruction transformation sub-rule.
According to above-mentioned conversion sub-rule, in the time realizing conversion, ARM assembly code is divided into ARM ordinary instruction, ARM register, ARM constant, ARM barrel shifter, NEON scalar, ARM Neon instruction, change respectively according to above-mentioned conversion sub-rule like this, to obtain the ASC after conversion, can utilize like this characteristics such as global variable in C++ code, function, grand, enumerated value, heavy duty, obtain the code that can debug according to above-mentioned transformation rule in C++IDE.
Illustrate, ARM ordinary instruction conversion sub-rule can be that ARM ordinary instruction is converted to the function in C++ grammatical form, for example " add " is converted to " add () ", " add " is ARM ordinary instruction, and " add () " is the function in C++ grammatical form.
Similarly, ARM register conversion sub-rule can be for to be converted to the global variable in C++ grammatical form by described ARM register, for example, " r0, r1, r2 " is converted to " r0, r1, r2 "; " q8, d0, d4 " is converted to " q8, d0, d4 ".
ARM constant conversion sub-rule can, for described ARM constant is converted to the constant in C++ grammatical form, for example, be converted to " 2 " by " #2 ".
NEON scalar conversion sub-rule can be for to be converted to array and the constant in C++ grammatical form by described NEON scalar, for example, the NEON scalar in ARM assembly code " d30[0] " is converted to " d30,0 ", and wherein " 0 " represents the index of this array d30.
ARM barrel shifter conversion sub-rule can for described ARM barrel shifter is converted to the enumerated value in C++ grammatical form, for example, be converted to " lsl " by " lsl ".
ARM Neon instruction transformation sub-rule can for by described ARM Neon instruction transformation be object in C++ grammatical form and member function for example, " vmull.u16 " is converted to " vmull.u16 ".
Certainly, in specific implementation process, be not limited with above-mentioned example.
After getting above-mentioned ASC, in order to make to move after this ASC energy in C++IDE, the interpolation program operation time limit in ASC further, when operation to obtain the ASC that can move in C++IDE (ASC Run Time is called for short ASC RT).
Particularly, above-mentioned transformation rule can represent with transformation rule table, can be with reference to table 1.
Table 1
Based on above-mentioned transformation rule, the code as an example of table 2 example before and after explanation conversion.
Table 2
| ARM assembly code | ASC |
| add r0，r1，r2，1sl#2 | add(r0,r1,r2,ls1,2); |
| vmull.u16q8,d24,d30[0] | vmull.u16(q8,d24,d30,0); |
| vmull.s32 q8，d0，d4 | vmull.s32(q8,d0,d4); |
It should be noted that, after in above-mentioned ASC RT to C++IDE, ASC RT can be based on C++, realizes the actual functional capability of the each emulator command of ASC.Illustrate:
Example 1: for ARM elementary instruction add instruction, be implemented as follows:
Example 2: for the vmull.u16 emulator command of Neon, be implemented as follows:
void VMULL::u16(Qd, Dn, Dm, lane)
{
Extract Dn[0] high and low 16
Extract Dn[1] high and low 16
By Dn[0] low 16 multiply each other with lane the element of Dm, result is put into Qd[0]
By Dn[0] high 16 multiply each other with lane the element of Dm, result is put into Qd[1]
By Dn[1] low 16 multiply each other with lane the element of Dm, result is put into Qd[2]
By Dn[1] low 16 multiply each other with lane the element of Dm, result is put into Qd[3]
}
Example 3: for the vmull.s32 emulator command of Neon, be implemented as follows:
void VMULL::s32(Qd,Dn,Dm)
{
Extract high and low 16 of Dn
Extract high and low 16 of Dm
Undertaken 64 by low 16 of Dn, Dm and multiply each other, result is put into the low 32 of Qd
Undertaken 64 by high 16 of Dn, Dm and multiply each other, result is put into the high 32 of Qd
}
Further, debug based on C++IDE, ASC RT can debug in any C++IDE debugger (Debugger), taking the actual code fragment in following table 3 as example, illustrates.
Table 3
Start C++IDE, suppose to run to " vmull.s32 (q8, d0, d4); " statement, this statement is debugged, below code be the actual code logic of vmull.s32 in ASC RT (q8, d0, d4):
Wherein, Qd, Dn, Dm are three parameters, on grammatical form, are consistent with actual parameter q8, d0, d4.Experiment shows, the result after above-mentioned statement debugging is consistent with the result of debugging in true ARM environment.This statement debugging is complete, and then carries out next statement " vmull.s32 (q9, d1, d5); " debugging.
Fig. 2 is the structural representation of ARM assembly code debugging treating apparatus embodiment mono-provided by the invention, and as shown in Figure 2, described device comprises: modular converter 201 and debugging module 202, wherein:
Modular converter 201, for according to transformation rule, is converted to ARM compilation simulation code ASC by ARM assembly code, and described ASC is the ARM assembly code that uses C++ grammatical form to represent; Debugging module 202, debugs described ASC for applying the integrated open environment of C++.
Above-mentioned module is used for carrying out preceding method embodiment, and it realizes principle and technique effect is similar, does not repeat them here.
Further, described transformation rule comprises following conversion sub-rule one or a combination set of: ARM ordinary instruction conversion sub-rule, ARM register conversion sub-rule, ARM constant conversion sub-rule, ARM barrel shifter conversion sub-rule, NEON scalar conversion sub-rule, ARM Neon instruction transformation sub-rule.
Illustrate: described ARM ordinary instruction conversion sub-rule comprises: described ARM ordinary instruction is converted to the function in C++ grammatical form.Described ARM register conversion sub-rule comprises: described ARM register is converted to the global variable in C++ grammatical form.Described ARM constant conversion sub-rule comprises: described ARM constant is converted to the constant in C++ grammatical form.Described NEON scalar conversion sub-rule comprises: described NEON scalar is converted to array and the constant in C++ grammatical form, wherein, the index that described constant is described array.Described ARM barrel shifter conversion sub-rule comprises: described ARM barrel shifter is converted to the enumerated value in C++ grammatical form.Described ARM Neon instruction transformation sub-rule comprises: be object and the member function in C++ grammatical form by described ARM Neon instruction transformation.
The embodiment of the present invention also provides a kind of ARM assembly code debugging treating apparatus, comprising: processor.
This processor, for according to transformation rule, is converted to ARM compilation simulation code ASC by ARM assembly code, and described ASC is the ARM assembly code that uses C++ grammatical form to represent; The integrated open environment of application C++ is debugged described ASC.
Wherein, described transformation rule comprises following conversion sub-rule one or a combination set of: ARM ordinary instruction conversion sub-rule, ARM register conversion sub-rule, ARM constant conversion sub-rule, ARM barrel shifter conversion sub-rule, NEON scalar conversion sub-rule, ARM Neon instruction transformation sub-rule.
Particularly, illustrate, described ARM ordinary instruction conversion sub-rule comprises: described ARM ordinary instruction is converted to the function in C++ grammatical form.Described ARM register conversion sub-rule comprises: described ARM register is converted to the global variable in C++ grammatical form.Described ARM constant conversion sub-rule comprises: described ARM constant is converted to the constant in C++ grammatical form.Described NEON scalar conversion sub-rule comprises: described NEON scalar is converted to array and the constant in C++ grammatical form, wherein, the index that described constant is described array.Described ARM barrel shifter conversion sub-rule comprises: described ARM barrel shifter is converted to the enumerated value in C++ grammatical form.Described ARMNeon instruction transformation sub-rule comprises: be object and the member function in C++ grammatical form by described ARM Neon instruction transformation.
This device is used for carrying out preceding method embodiment, and it realizes principle and technique effect is similar, does not repeat them here.
In several embodiment provided by the present invention, should be understood that disclosed apparatus and method can realize by another way.For example, device embodiment described above is only schematic, for example, the division of described unit, be only that a kind of logic function is divided, when actual realization, can have other dividing mode, for example multiple unit or assembly can in conjunction with or can be integrated into another system, or some features can ignore, or do not carry out.Another point, shown or discussed coupling each other or direct-coupling or communication connection can be by some interfaces, indirect coupling or the communication connection of device or unit can be electrically, machinery or other form.
The described unit as separating component explanation can or can not be also physically to separate, and the parts that show as unit can be or can not be also physical locations, can be positioned at a place, or also can be distributed in multiple network element.Can select according to the actual needs some or all of unit wherein to realize the object of the present embodiment scheme.
In addition, the each functional unit in each embodiment of the present invention can be integrated in a processing unit, can be also that the independent physics of unit exists, and also can be integrated in a unit two or more unit.Above-mentioned integrated unit both can adopt the form of hardware to realize, and the form that also can adopt hardware to add SFU software functional unit realizes.
The integrated unit that the above-mentioned form with SFU software functional unit realizes, can be stored in a computer read/write memory medium.Above-mentioned SFU software functional unit is stored in a storage medium, comprise that some instructions (can be personal computers in order to make a computer equipment, server, or the network equipment etc.) or processor (processor) carry out the part steps of method described in each embodiment of the present invention.And aforesaid storage medium comprises: various media that can be program code stored such as USB flash disk, portable hard drive, ROM (read-only memory) (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disc or CDs.
Finally it should be noted that: above each embodiment, only in order to technical scheme of the present invention to be described, is not intended to limit; Although the present invention is had been described in detail with reference to aforementioned each embodiment, those of ordinary skill in the art is to be understood that: its technical scheme that still can record aforementioned each embodiment is modified, or some or all of technical characterictic is wherein equal to replacement; And these amendments or replacement do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (16)
1. an ARM assembly code debugging disposal route, is characterized in that, comprising:
According to transformation rule, ARM assembly code is converted to ARM compilation simulation code ASC, described ASC is the ARM assembly code that uses C++ grammatical form to represent;
The integrated open environment of application C++ is debugged described ASC.
2. method according to claim 1, is characterized in that, described transformation rule comprises following conversion sub-rule one or a combination set of:
ARM ordinary instruction conversion sub-rule, ARM register conversion sub-rule, ARM constant conversion sub-rule, ARM barrel shifter conversion sub-rule, NEON scalar conversion sub-rule, ARM Neon instruction transformation sub-rule.
3. method according to claim 2, is characterized in that, described ARM ordinary instruction conversion sub-rule comprises: described ARM ordinary instruction is converted to the function in C++ grammatical form.
4. method according to claim 2, is characterized in that, described ARM register conversion sub-rule comprises: described ARM register is converted to the global variable in C++ grammatical form.
5. method according to claim 2, is characterized in that, described ARM constant conversion sub-rule comprises: described ARM constant is converted to the constant in C++ grammatical form.
6. method according to claim 2, is characterized in that, described NEON scalar conversion sub-rule comprises: described NEON scalar is converted to array and the constant in C++ grammatical form, wherein, the index that described constant is described array.
7. method according to claim 2, is characterized in that, described ARM barrel shifter conversion sub-rule comprises: described ARM barrel shifter is converted to the enumerated value in C++ grammatical form.
8. method according to claim 2, is characterized in that, described ARM Neon instruction transformation sub-rule comprises: be object and the member function in C++ grammatical form by described ARM Neon instruction transformation.
9. an ARM assembly code debugging treating apparatus, is characterized in that, comprising:
Modular converter, for according to transformation rule, is converted to ARM compilation simulation code ASC by ARM assembly code, and described ASC is the ARM assembly code that uses C++ grammatical form to represent;
Debugging module, debugs described ASC for applying the integrated open environment of C++.
10. device according to claim 9, is characterized in that, described transformation rule comprises following conversion sub-rule one or a combination set of:
ARM ordinary instruction conversion sub-rule, ARM register conversion sub-rule, ARM constant conversion sub-rule, ARM barrel shifter conversion sub-rule, NEON scalar conversion sub-rule, ARM Neon instruction transformation sub-rule.
11. devices according to claim 10, is characterized in that, described ARM ordinary instruction conversion sub-rule comprises: described ARM ordinary instruction is converted to the function in C++ grammatical form.
12. devices according to claim 10, is characterized in that, described ARM register conversion sub-rule comprises: described ARM register is converted to the global variable in C++ grammatical form.
13. devices according to claim 10, is characterized in that, described ARM constant conversion sub-rule comprises: described ARM constant is converted to the constant in C++ grammatical form.
14. devices according to claim 10, is characterized in that, described NEON scalar conversion sub-rule comprises: described NEON scalar is converted to array and the constant in C++ grammatical form, wherein, the index that described constant is described array.
15. devices according to claim 10, is characterized in that, described ARM barrel shifter conversion sub-rule comprises: described ARM barrel shifter is converted to the enumerated value in C++ grammatical form.
16. devices according to claim 10, is characterized in that, described ARM Neon instruction transformation sub-rule comprises: be object and the member function in C++ grammatical form by described ARM Neon instruction transformation.
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