CN104134991B - A kind of three-port DC bus Voltage stabilizing module towards direct-current grid - Google Patents

A kind of three-port DC bus Voltage stabilizing module towards direct-current grid Download PDF

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CN104134991B
CN104134991B CN201410417518.5A CN201410417518A CN104134991B CN 104134991 B CN104134991 B CN 104134991B CN 201410417518 A CN201410417518 A CN 201410417518A CN 104134991 B CN104134991 B CN 104134991B
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power switch
switch pipe
full
signal
bridge topology
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CN104134991A (en
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张涛
刘宝龙
陈世明
查亚兵
黄卓
雷洪涛
张彦
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National University of Defense Technology
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Abstract

The invention discloses a kind of three-port DC bus Voltage stabilizing module towards direct-current grid, be made up of Technics of Power Electronic Conversion unit, signal processing unit and signal condition unit, Technics of Power Electronic Conversion unit is made up of 4 full-bridge topologies, 2 electric capacity, high frequency transformers; 4 full-bridge topologies build by power switch pipe, and 2 electric capacity are alminium electrolytic condenser or tantalum electrochemical capacitor; High frequency transformer is made up of armature winding, secondary winding and magnetic core; Signal processing unit is made up of digital signal processor, 4 driving chip, digital signal processor built with signal processing software, for having the microprocessor of analog-digital conversion function, timer, flash storage, more than 4 PWM generator; Volume of the present invention is little, and power density is high, can maintain the stable of DC bus-bar voltage in direct-current grid, realize the electrical isolation between utility alternating current net and direct-current grid, and can realize the seamless switching between micro-grid connection and island mode.

Description

A kind of three-port DC bus Voltage stabilizing module towards direct-current grid
Technical field
The present invention relates to field of power electronics, be related specifically to three-port DC bus Voltage stabilizing module.
Background technology
Compared with conventional AC micro-capacitance sensor, in direct-current grid, the connected mode of self multiple micro power and DC bus is more easy, need not consider to exchange the problems such as the frequency of output voltage in microgrid and phase place.Only be decided by DC bus-bar voltage to the control of direct-current grid, depend on power network current to a greater extent to the control exchanging micro-capacitance sensor, therefore direct-current grid more easily realizes the Collaborative Control between distributed power source.When utility alternating current net breaks down, direct-current grid can be separated with utility alternating current net rapidly, and normally can be run by the distributed power source maintenance native system of self.
Owing to there is the different energy storage device of electric pressure and distributed power source in micro-capacitance sensor, the key of direct-current grid stable operation is the balance that will keep power supply end and load side energy, and the key controlling direct-current grid energy balance is the management of adjustment to DC bus-bar voltage and the quality of power supply.At present, mainly contain grid-connected and isolated island two kinds of operational modes in direct-current grid, mainly carried out the voltage on stable DC bus at grid-connect mode by the rectification of utility alternating current net, and carry out stable DC busbar voltage by energy storage device under island mode.Therefore need three port modules, namely port is the continuous-current plant interface after the rectification of utility alternating current net, and a port is energy storage device interface, and another one port is the interface of DC bus in direct-current grid.
At present, there is no public technology file to relate to meet three port modules of above-mentioned functions.
Summary of the invention
It is little that the technical problem to be solved in the present invention is to provide a kind of volume, the three-port DC bus Voltage stabilizing module towards direct-current grid that power density is high, this module can maintain the stable of DC bus-bar voltage in direct-current grid on the one hand, the electrical isolation between utility alternating current net and direct-current grid can be realized on the one hand, be conducive to the safety of utility alternating current net, and micro-grid connection and island mode can be realized (after micro-capacitance sensor departs from bulk power grid, can provide the one of electric energy autonomous operational mode at least fraction load itself) between seamless switching.
To achieve these goals, the present invention adopts following technical scheme:
Be connected with utility alternating current net by grid interface and live wire L, zero line N when the present invention uses, be connected with energy storage device by energy storage device positive pole BAT+, energy storage device negative pole BAT-, be connected with the DC bus in direct-current grid by the anode LINE+ of DC bus, the negative terminal LINE of DC bus.
The present invention is made up of Technics of Power Electronic Conversion unit, signal processing unit and signal condition unit.Technics of Power Electronic Conversion unit is made up of the first full-bridge topology, the first electric capacity, the second electric capacity, the second full-bridge topology, the 3rd full-bridge topology, high frequency transformer, the 4th full-bridge topology.First full-bridge topology is connected with the first electric capacity with utility alternating current net, and the AC signal that utility alternating current net transmits is converted to rectified signal, and rectified signal is exported to the first electric capacity.First electric capacity is connected with the first full-bridge topology, the second full-bridge topology, the rectified signal that the first full-bridge topology transmits is become the first stable d. c. voltage signal, and the first d. c. voltage signal is exported to the second full-bridge topology.Second full-bridge topology is connected with high frequency transformer with the first electric capacity, the first d. c. voltage signal is converted to the first alternating voltage square-wave signal, and the first alternating voltage square-wave signal is transferred to high frequency transformer.3rd full-bridge topology is connected with energy storage device, high frequency transformer, and the second d. c. voltage signal provided by energy storage device is converted to the second alternating voltage square-wave signal, and is passed to the second alternating voltage square-wave signal to high frequency transformer.High frequency transformer is connected with the 4th full-bridge topology with the second full-bridge topology, the 3rd full-bridge topology, the first alternating voltage square-wave signal is coupled to the input of the 4th full-bridge topology, the second alternating voltage square-wave signal is also coupled to the input of the 4th full-bridge topology.4th full-bridge topology is connected with the second electric capacity with high frequency transformer, the first alternating voltage square-wave signal is become the 3rd d. c. voltage signal and outputs to DC bus, and the second alternating voltage square-wave signal is converted to the 4th d. c. voltage signal exports to DC bus.Second electric capacity is connected with DC bus with the 4th full-bridge topology, plays the effect of the ripple component in elimination the 3rd direct current signal.Signal condition unit is connected with signal processing unit with utility alternating current net, energy storage device, the first electric capacity, DC bus, and the ac voltage signal passed over by utility alternating current net nurses one's health into mains voltage signal respectively with ac current signal and power network current signal delivers to signal processing unit; The first d. c. voltage signal provided by first electric capacity is nursed one's health into the first capacitance voltage and is delivered to signal processing unit; The second d. c. voltage signal passed over by energy storage device is nursed one's health into energy storage device voltage signal and is delivered to signal processing unit; The second DC current signal flowing through energy storage device is nursed one's health into energy storage device current signal and delivers to signal processing unit; The 3rd d. c. voltage signal provided by DC bus is nursed one's health into DC bus-bar voltage signal and is delivered to signal processing unit; The 3rd DC current signal flowing through DC bus is nursed one's health into DC bus current signal and delivers to signal processing unit.Signal processing unit is connected with signal condition unit with the first full-bridge topology, the second full-bridge topology, the 3rd full-bridge topology, the 4th full-bridge topology, the mains voltage signal passed over signal condition unit, power network current signal, energy storage device voltage signal, energy storage device current signal, the first capacitance voltage signal, DC bus-bar voltage signal, DC bus current signal process, and are the pulse input end that drive pulse signal delivers to the first full-bridge topology, the second full-bridge topology, the 3rd full-bridge topology and the 4th full-bridge topology by the results conversion after process.
The following stated first to the 12 power switch pipe is field-effect transistor or insulated gate bipolar transistor IGBT (insulatedgatebipolartransistor).
If power switch pipe selects IGBT power switch pipe, then the first end of power switch pipe is the gate pole of IGBT, and power switch pipe second end is the collector electrode of IGBT, and power switch pipe the 3rd end is the emitter of IGBT.If selection field-effect transistor is power switch pipe, then the first end of power switch pipe is the grid of field-effect transistor, and power switch pipe second end is the drain electrode of field-effect transistor, and power switch pipe the 3rd end is the source electrode of field-effect transistor.
First full-bridge topology is made up of four power switch pipes, and the second end of the first power switch pipe is connected with the second end of the second power switch pipe, and the three-terminal link of the first power switch pipe is to the second end of the 3rd power switch pipe.Second end of the second power switch pipe was both connected with the second end of the first power switch pipe, was connected to again the positive pole of the first electric capacity, and the three-terminal link of the second power switch pipe to the second end of the 4th power switch pipe, and is connected to the zero line of utility alternating current net.Second end of the 3rd power switch pipe is connected to the 3rd end of the first power switch pipe, and is connected to the live wire of utility alternating current net.The three-terminal link of the 3rd power switch pipe is to the 3rd end of the 4th power switch pipe.Second end of the 4th power switch pipe is connected to the 3rd end of the second power switch pipe, and the 3rd end of the 4th power switch pipe was both connected with the 3rd end of the 3rd power switch pipe, was connected to again the negative pole of the first electric capacity.The first end of the power switch pipe in the first full-bridge topology and the first end of power switch pipe are the anode of the first full-bridge topology pulse input end, and the first end of the power switch pipe in the first full-bridge topology and the first end of power switch pipe are the negative terminal of the first full-bridge topology shape pulse input end.The pulse input end of the first full-bridge topology is connected with signal processing unit.
First electric capacity is alminium electrolytic condenser or tantalum electrochemical capacitor.The size of voltage signal magnitude in the rectified signal that should export according to the first full-bridge topology during this electric capacity and the size of ripple peak-to-peak value and frequency thereof is selected to choose.The capacitance of the first electric capacity wherein V 1for voltage signal average value, the V of rectified signal r1for size, the f of rectified voltage signal ripple r1for the rated power (being numerically equal to the maximum power of load in direct-current grid and the maximum power sum of distributed power source) that the size of rectified voltage signal ripple frequency, P are the first full-bridge topology.The withstand voltage of the first electric capacity should be 1.2V 1.
High frequency transformer is three port devices, is made up of armature winding, secondary winding and magnetic core, and its armature winding is made up of elementary first winding and elementary second winding.The number of turn of elementary first winding of high frequency transformer, elementary second winding and secondary winding should according to maximum power P of the present invention 1, high frequency transformer operating frequency f sand the size of high frequency transformer output voltage and input voltage is determined.
The number of turn of elementary first winding of high frequency transformer wherein V 2the input voltage of elementary first winding of high frequency transformer, f sfor the operating frequency of high frequency transformer, B wmagnetic core work intensity, A efor the effective work area of magnetic core, B wwith A ebe two parameters relevant to power, occurrence is by checking that the databook of selected core production producer is determined.Secondary winding turns wherein V 3the voltage at high frequency transformer secondary winding two ends.The number of turn of elementary second winding wherein V 4it is the input voltage of elementary second winding of high frequency transformer.The magnetic core used in high frequency transformer adopts the manganese-zinc ferrite core of ETD type.
Second full-bridge topology is made up of four power switch pipes, second end of the 5th power switch pipe is connected with the second end of the positive pole of the first electric capacity, the 6th power switch pipe, 3rd end of the 5th power switch pipe is connected with the second end of the 7th power switch pipe, and is connected to the Same Name of Ends of elementary first winding of high frequency transformer.Second end of the 6th power switch pipe is connected to the second end of the 5th power switch pipe, and the 3rd end of the 6th power switch pipe is connected with the second end of the 8th power switch pipe, and is connected to the different name end of elementary first winding of high frequency transformer.Second end of the 7th power switch pipe is connected to the 3rd end of the 5th power switch pipe, and the three-terminal link of the 7th power switch pipe to the negative pole of the first electric capacity, and is connected with the 3rd end of the 8th power switch pipe.Second end of the 8th power switch pipe is connected to the 3rd end of the 6th power switch pipe, and the three-terminal link of the 8th power switch pipe is to the 3rd end of the 7th power switch pipe.The first end of the power switch pipe in the second full-bridge topology and the first end of power switch pipe are the anode of the second full-bridge topology pulse input end, and the first end of the power switch pipe in the second full-bridge topology and the first end of power switch pipe are the negative terminal of the second full-bridge topology shape pulse input end.The pulse input end of the second full-bridge topology is connected with signal processing unit.
3rd full-bridge topology is made up of four power switch pipes, its connected mode is: the second end of the 9th power switch pipe is connected with the second end of the positive pole of energy storage device, the tenth power switch pipe, the three-terminal link of the 9th power switch pipe to the second end of the 11 power switch pipe, and is all connected to the Same Name of Ends of elementary second winding of high frequency transformer.Second end of the tenth power switch pipe is connected to the second end of the 9th power switch pipe, and the three-terminal link of the tenth power switch pipe to the second end of the 12 power switch pipe, and is connected to the different name end of elementary second winding of high frequency transformer.Second end of the 11 power switch pipe is connected to the 3rd end of the 9th power switch pipe, and the 3rd end of the 11 power switch pipe is connected with the negative pole of energy storage device, the 3rd end of the 12 power switch pipe.Second end of the 12 power switch pipe is connected to the 3rd end of the tenth power switch pipe, and the three-terminal link of the 12 power switch pipe is to the 3rd end of the 11 power switch pipe.The first end of power switch pipe in 3rd full-bridge topology and the first end of power switch pipe are the anode of the 3rd full-bridge topology pulse input end, and the first end of power switch pipe in the 3rd full-bridge topology and the first end of power switch pipe are the negative terminal of the 3rd full-bridge topology shape pulse input end.The pulse input end of the 3rd full-bridge topology is connected with signal processing unit.
4th full-bridge topology is made up of four power switch pipes, second end of the 13 power switch pipe is connected with the second end of the anode of DC bus, the 14 power switch pipe, 3rd end of the 13 power switch pipe is connected with the second end of the 15 power switch pipe, and is connected to the Same Name of Ends of the secondary winding of high frequency transformer.Second end of the 14 power switch pipe is connected to the second end of the 13 power switch pipe, and the three-terminal link of the 14 power switch pipe to the second end of the 16 power switch pipe, and is connected to the different name end of the secondary winding of high frequency transformer.Second end of the 15 power switch pipe is connected to the 3rd end of the 13 power switch pipe, and the three-terminal link of the 15 power switch pipe is to the 3rd end of the 16 power switch pipe.Second end of the 16 power switch pipe is connected to the 3rd end of the 14 power switch pipe, and the 3rd end of the 16 power switch pipe is connected with the 3rd end of the 15 power switch pipe, the negative terminal of DC bus.The first end of power switch pipe in 4th full-bridge topology and the first end of power switch pipe are the anode of the 4th full-bridge topology pulse input end, and the first end of power switch pipe in the 4th full-bridge topology and the first end of power switch pipe are the negative terminal of the 4th full-bridge topology shape pulse input end.The pulse input end of the 4th full-bridge topology is connected with signal processing unit.
Second electric capacity is alminium electrolytic condenser or tantalum electrochemical capacitor.Second capacitance size is relevant with the output current of DC bus-bar voltage and the 3rd full-bridge topology.The capacitance of the second electric capacity the withstand voltage of the second electric capacity is 1.2V, and wherein V is the peak value size of DC bus-bar voltage, V r2for the size of voltage ripple, f r2for line wave frequency, I is the output current of the 3rd full-bridge topology.
Signal processing unit is made up of digital signal processor, four driving chip.The microprocessor with analog-digital conversion function, timer, flash storage, more than four PWM generator (i.e. the first PWM generator, the second PWM generator, the 3rd PWM generator, the 4th PWM generator) selected by digital signal processor, as the TMS320F28xx series of TI (Texas Instrument) company, the DSPICFJ16GS504 etc. of Microchip (micro-core).The flash storage of digital signal processor has table of natural sines and fixed numbers D, D=50%.PWM generator all has advanced phase shifting control register, delayed phase shifting control register, on off control register.First PWM generator is connected with the first driving chip, exports sine pulse i.e. the first pulse signal according to the sine function obtained from table of natural sines to the first driving chip; Second PWM generator is connected with the second driving chip, exports the second pulse signal according to fixed numbers D to the second driving chip; 3rd PWM generator is connected with the 3rd driving chip, exports the 3rd pulse signal according to fixed numbers D to the 3rd driving chip; 4th PWM generator is connected with four-wheel drive chip, exports the 4th pulse signal according to fixed numbers D to four-wheel drive chip.
Driving chip comprises the first driving chip, second and drives sheet, the 3rd driving chip and four-wheel drive chip.Output voltage, the output current of driving chip are relevant with required drive current to the power switch pipe gate pole threshold voltage that driving chip connects, when choosing driving chip its output voltage, the gate pole threshold voltage of connected power switch pipe should be more than or equal to; Its current value exported should be more than or equal to the gate pole threshold current of connected power switch pipe.First driving chip is connected with the first full-bridge topology with the first PWM generator, the first pulse signal first PWM generator passed over converts the first positive drive singal and the first negative drive singal to, and the first positive drive singal is delivered to the anode of the first full-bridge topology pulse input end, the first negative drive singal is delivered to the negative terminal of the first full-bridge topology pulse input end.Second driving chip is connected with the second full-bridge topology with the second PWM generator, the second pulse signal second PWM generator passed over converts the second positive drive singal and the second negative drive singal to, and the second positive drive singal is delivered to the anode of the second full-bridge topology pulse input end, the second negative drive singal is delivered to the negative terminal of the second full-bridge topology pulse input end.3rd driving chip is connected with the 3rd full-bridge topology with the 3rd PWM generator, the 3rd pulse signal 3rd PWM generator passed over converts the 3rd positive drive singal and the 3rd negative drive singal to, 3rd positive drive singal is passed to the anode of the 3rd full-bridge topology pulse input end, the 3rd negative drive singal is passed to the negative terminal of the 3rd full-bridge topology pulse input end.Four-wheel drive chip is connected with the 4th full-bridge topology with the 4th PWM generator, the 4th pulse signal 4th PWM generator passed over converts the 4th positive drive singal and the 4th negative drive singal to, and the 4th positive drive singal is delivered to the anode of the 4th full-bridge topology pulse input end, the 4th negative drive singal is delivered to the negative terminal of the 4th full-bridge topology pulse input end.
Digital signal processor is built with signal processing software, and the flow process of signal processing software is:
The first step, initialization also judges the mode of operation of module of the present invention:
The operating frequency f of 1.1 initialize digital signal processors g, given the Duty ratio control register of the first PWM generator by the sine function assignment that will obtain from table of natural sines, the first PWM generator be set as sine pulse i.e. the first output of pulse signal; By fixed numbers D assignment being given the Duty ratio control register of the second PWM generator, the 3rd PWM generator and the 4th PWM generator, respectively the second PWM generator is set as the second output of pulse signal of fixed duty cycle, 3rd PWM generator is set as the 3rd output of pulse signal of fixed duty cycle, and the 4th PWM generator is set as the 4th output of pulse signal of fixed duty cycle.By numerical value f sassignment gives the frequency control register of the second PWM generator, the 3rd PWM generator and the 4th PWM generator, and the frequency making the second PWM generator, the 3rd PWM generator and the 4th PWM generator produce pulse is f s.By fixed numbers S assignment to timer, timing length is set as T s, wherein T s=S/f g.F gbe the operating frequency of digital signal processor, S is greater than 1.2Y, and Y is the number of the required statement performed of signal processing software flow process single cycle.
1.2 initialize Timer are 0, and timer starts timing.
1.3 digital signal processors read the mains voltage signal, power network current signal, energy storage device voltage signal, energy storage device current signal, the first capacitance voltage signal, DC bus-bar voltage signal, the DC bus current signal that are passed over by signal condition unit.
1.4 judge V min< V grid< V maxwhether set up, wherein V maxallow by utility network the maximum of work, V minallow by utility network the minimum value of work, if set up, then this module work is in grid-connect mode, jumps to second step.If be false, then this module work is in island mode, jumps to the 5th step.
Second step, the three-port DC bus Voltage stabilizing module towards direct-current grid works in grid-connect mode:
2.1 according to p t=V linei line-V gridi gridcalculate the size p of the present invention's transferring energy under grid-connect mode t.
2.2 according to obtain the phase shift angle of the second pulse signal wherein L is self leakage inductance of high frequency transformer, is a fixing parameter.
2.3 judge whether set up, if set up, jump to the 3rd step, if be false, jump to the 4th step.
3rd step, the three-port DC bus Voltage stabilizing module towards direct-current grid works in grid-connected energy regenerative pattern:
3.1 by the phase shift angle of the second pulse assignment gives the advanced phase shifting control register of the second PWM generator.
1 assignment is given the on off control register of the first PWM generator, the second PWM generator and the 4th PWM generator by 3.2, and the first PWM generator, the second PWM generator and the 4th PWM generator are started working.
3.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, jump to 3.4 steps.
3.4 timers continue timing, jump to 3.3.
4th step, the three-port DC bus Voltage stabilizing module towards direct-current grid is operated in and utility network powered mode off the net.
4.1 by phase shift angle assignment gives the delayed phase shifting control register of the second PWM generator, and will fix phase shifting angle assignment gives the delayed phase-shift controller of the first PWM generator.
1 assignment is given the on off control register of the first PWM generator, the second PWM generator and the 4th PWM generator by 4.2, and the first PWM generator, the second PWM generator and the 4th PWM generator are started working.
4.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, jump to 4.4 steps.
4.4 timers continue timing, jump to 4.3.
5th step, the three-port DC bus Voltage stabilizing module towards direct-current grid is operated in island mode:
5.1 according to P t'=V linei line-V storagei storagecalculate the size P of the present invention's transferring energy under island mode t'.
5.2 according to obtain phase shift angle
5.3 judge whether set up, if set up, then jump to the 6th step; If be false, jump to the 7th step.
6th step, energy storage device powered mode under working in isolated island towards the three-port DC bus Voltage stabilizing module of direct-current grid
6.1 by the phase shift angle of the 3rd pulse signal assignment gives the advanced phase shifting control register of the 3rd PWM generator.
1 assignment is given the on off control register of the 3rd PWM generator, the 4th PWM generator by 6.2, and the 3rd PWM generator and the 4th PWM generator are started working.
6.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, jump to 6.4 steps.
6.4 timers continue timing, jump to 6.3;
7th step, energy storage device energy storage pattern under working in isolated island towards the three-port DC bus Voltage stabilizing module of direct-current grid:
7.1 by the phase shift angle of the 3rd pulse signal assignment gives the delayed phase shifting control register of the 3rd PWM generator.
1 assignment is given the on off control register of the 3rd PWM generator, the 4th PWM generator by 7.2, and the 3rd PWM generator and the 4th PWM generator are started working.
7.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, jump to 7.4 steps.
7.4 timers jump to 7.3 after continuing timing.
Signal processing software flow process is an endless loop, when normally working towards direct-current grid three port Voltage stabilizing module, can repeatedly perform above-mentioned flow process always.
Signal condition unit be one 7 input, 7 export commercial unit, be made up of 1 road ac voltage detection circuit, 1 road alternating current testing circuit, 3 road direct voltage testing circuits and 2 road D.C. current detecting circuits.When the signal condition unit selected, answer the scope of attention conditioning unit input voltage, electric current and output voltage, electric current.The scope of input voltage should meet: allow the AC voltage range inputted should be greater than the peak value of AC signal, allow the DC voltage range inputted should be greater than the first d. c. voltage signal, the second d. c. voltage signal, the 3rd d. c. voltage signal the scope of maximum input current should meet: institute allows the alternating current of input should be greater than the peak value of alternating current, allow the direct current of input should be greater than the maximum of the second DC current signal, the 3rd DC current signal.Output voltage and electric current should be less than the voltage and current value of the input that be connected analog-to-digital conversion module (digital signal processor carries) allows.
The course of work of the present invention is:
The first step, the digital signal processor in signal processing unit reads the mains voltage signal, power network current signal, energy storage device voltage signal, energy storage device current signal, the first capacitance voltage signal, DC bus-bar voltage signal, the DC bus current signal that are passed over by signal condition unit.
Second step, initialize Timer is 0, and timer starts timing.Signal processing software in digital signal processor is first according to V min< V grid< V maxwhether set up, judge the mode of operation of this module.Work as V min< V grid< V maxduring establishment, under module of the present invention operates in grid-connect mode, perform the 3rd step; Work as V min< V grid< V maxwhen being false, under module of the present invention operates in island mode, perform the 4th step.
3rd step, the present invention runs on grid-connect mode, according to calculating formula (1)
Calculate the phase shifting angle of the second pulse and judge phase shifting angle positive and negative, if perform 3.1 steps; If perform 3.2 steps.
3.1 the present invention run on grid-connected energy regenerative pattern:
Signal processing software is by the phase shift angle of the second pulse assignment gives the advanced phase shifting control register of the second PWM generator.1 assignment is given the on off control register of the first PWM generator, the second PWM generator and the 4th PWM generator, the first PWM generator, the second PWM generator and the 4th PWM generator are started working.
First PWM generator produces the first pulse signal of fixed duty cycle, the first pulse signal that first PWM generator passes over by the first driving chip converts the first positive drive singal and the first negative drive singal to, and the first positive drive singal is delivered to the anode of the first full-bridge topology pulse input end, the first negative drive singal is delivered to the negative terminal of the first full-bridge topology pulse input end.First full-bridge topology is operated in rectification state, and the AC signal that utility alternating current net passes over is converted to rectified signal, and gives the first electric capacity by the energy transferring that passed over by utility alternating current net.First electric capacity converts rectified signal to first d. c. voltage signal.
Second PWM generator produces the second pulse signal of fixed duty cycle, second driving chip is connected with the second full-bridge topology with the second PWM generator, the second pulse signal second PWM generator passed over converts the second positive drive singal and the second negative drive singal to, and the second drive singal is delivered to the anode of the second full-bridge topology pulse input end, the second negative drive singal is delivered to the negative terminal of the second full-bridge topology pulse input end.It is f that first direct current signal is converted to frequency by the second full-bridge topology sthe first alternating voltage square-wave signal.
4th PWM generator produces the 4th pulse signal of fixed duty cycle, four-wheel drive chip is connected with the 4th full-bridge topology with the 4th PWM generator, the 4th pulse signal 4th PWM generator passed over converts the 4th positive drive singal and the 4th negative drive singal to, and the 4th positive drive singal is delivered to the anode of the 4th full-bridge topology pulse input end, the 4th positive drive singal is delivered to the negative terminal of the 4th full-bridge topology pulse input end.4th full-bridge topology, the first ac square-wave voltage signal of coming that is coupled by high frequency transformer converts the 3rd d. c. voltage signal to.
Due to by phase shifting angle assignment gives the advanced phase shifting control register of the second PWM generator, and the phase place of the second pulse signal of thus the second PWM generator output is ahead of the 4th phase pulse signal of the 4th PWM generator output degree, the energy that the first full-bridge topology is passed over by the second full-bridge topology passes to the 4th full-bridge topology by high frequency transformer, and energy is delivered on DC bus by the 4th full-bridge topology, turns the 5th step.Thus present invention achieves the process of utility alternating current net to direct-current grid conveying capacity, supplement the deficiency of energy in direct-current grid, thus maintain the stable of DC bus-bar voltage.
3.2 the present invention run on and utility network powered mode off the net:
Signal processing software is by phase shift angle assignment gives the delayed phase shifting control register of the second PWM generator, and will fix phase shifting angle assignment gives the delayed phase-shift controller of the first PWM generator.1 assignment is given the on off control register of the first PWM generator, the second PWM generator and the 4th PWM generator.First PWM generator, the second PWM generator and the 4th PWM generator are started working.
First PWM generator produces the first pulse signal of fixed duty cycle, the first pulse signal that first PWM generator passes over by the first driving chip converts the first positive drive singal and the first negative drive singal to, and the first positive drive singal is delivered to the anode M1+ of the first full-bridge topology pulse input end, the first negative drive singal is delivered to the negative terminal M1-of the first full-bridge topology pulse input end.Due to now will phase shifting angle be fixed assignment gives the delayed phase-shift controller of the first PWM generator, thus the first full-bridge topology is operated in inverter mode, the first d. c. voltage signal provided by first electric capacity converts ac voltage signal to, and by the energy transferring that passed over by the second full-bridge topology to utility alternating current net.
Second PWM generator produces the second pulse signal of fixed duty cycle, second driving chip is connected with the second full-bridge topology with the second PWM generator, the second pulse signal second PWM generator passed over converts the second positive drive singal and the second negative drive singal to, and the second drive singal is delivered to the anode of the second full-bridge topology pulse input end, the second negative drive singal is delivered to the negative terminal of the second full-bridge topology pulse input end.It is f that second full-bridge topology first direct current signal is converted to frequency sthe first alternating voltage square-wave signal.
4th PWM generator produces the 4th pulse signal of fixed duty cycle, four-wheel drive chip is connected with the 4th full-bridge topology with the 4th PWM generator, the 4th pulse signal 4th PWM generator passed over converts the 4th positive drive singal and the 4th negative drive singal to, and the 4th positive drive singal is delivered to the anode of the 4th full-bridge topology pulse input end, the 4th positive drive singal is delivered to the negative terminal of the 4th full-bridge topology pulse input end.4th full-bridge topology, the first ac square-wave voltage signal of coming that is coupled by high frequency transformer converts the 3rd d. c. voltage signal to.
Because signal processing software is by phase shifting angle assignment gives the delayed phase shifting control register of the second PWM generator, and the phase place of the pulse signal of thus the second PWM generator output lags behind the phase pulse signal of the 4th PWM generator output degree, the energy that DC bus is passed over by the 4th full-bridge topology delivers to high frequency transformer.Energy transferring is given the second full-bridge topology by high frequency transformer, turns the 5th step.Thus the module of the present invention dump energy achieved in direct-current grid is fed to the process of AC network, thus ensure that the stable of DC bus in direct-current grid.
4th step. the present invention runs on island mode, and signal processing software is according to formula (2)
Calculate the phase shifting angle of the 3rd pulse and judge phase shifting angle positive and negative.If perform 4.1 steps, if perform 4.2 steps.
4.1 the present invention run on energy storage device powered mode under isolated island:
Signal processing software is by the phase shift angle of the 3rd pulse signal assignment gives the advanced phase shifting control register of the 3rd PWM generator.1 assignment is given the on off control register of the 3rd PWM generator, the 4th PWM generator, the 3rd PWM generator and the 4th PWM generator are started working.
3rd PWM generator produces the 3rd pulse signal of fixed duty cycle.3rd driving chip is connected with the 3rd full-bridge topology with the 3rd PWM generator, the 3rd pulse signal 3rd PWM generator passed over converts the 3rd positive drive singal and the 3rd negative drive singal to, 3rd positive drive singal is passed to the anode of the 3rd full-bridge topology pulse input end, the 3rd negative drive singal is passed to the negative terminal of the 3rd full-bridge topology pulse input end.It is f that the second d. c. voltage signal that energy storage device provides by the 3rd full-bridge topology is converted to frequency sthe second ac square wave signal.The second alternating voltage square-wave signal that 3rd full-bridge topology passes over by high frequency transformer is coupled to the 4th full-bridge topology.
4th PWM generator produces the 4th pulse signal of fixed duty cycle, four-wheel drive chip is connected with the 4th full-bridge topology with the 4th PWM generator, the 4th pulse signal 4th PWM generator passed over converts the 4th positive drive singal and the 4th negative drive singal to, and the 4th positive drive singal is delivered to the anode of the 4th full-bridge topology pulse input end, the 4th positive drive singal is delivered to the negative terminal of the 4th full-bridge topology pulse input end.4th full-bridge topology converts transformer coupled second ac square wave signal of coming to the 4th d. c. voltage signal.
Because signal processing software is by phase shift angle assignment gives the advanced phase shifting control register of the 3rd PWM generator, and the phase place of the pulse signal that the 3rd PWM generator is exported is ahead of the phase place of the 4th PWM generator output pulse signal degree, thus the energy that energy storage device is provided by the 3rd full-bridge topology is sent to the 4th full-bridge topology via high frequency transformer.The Energy transfer that high frequency transformer sends by full-bridge topology, on DC bus, turns the 5th step.Thus the present invention realizes energy storage device provides process from energy to direct-current grid, supplements the deficiency of energy in direct-current grid, thus maintains the stable of DC bus-bar voltage.
4.2 the present invention run on energy storage device energy storage pattern under isolated island
Signal processing software is by the phase shift angle of the 3rd pulse signal assignment gives the advanced phase shifting control register of the 3rd PWM generator.1 assignment is given the on off control register of the 3rd PWM generator, the 4th PWM generator, the 3rd PWM generator and the 4th PWM generator are started working.
4th PWM generator produces the 4th pulse signal of fixed duty cycle, four-wheel drive chip is connected with the 4th full-bridge topology with the 4th PWM generator, the 4th pulse signal 4th PWM generator passed over converts the 4th positive drive singal and the 4th negative drive singal to, and the 4th positive drive singal is delivered to the anode of the 4th full-bridge topology pulse input end, the 4th positive drive singal is delivered to the negative terminal of the 4th full-bridge topology pulse input end.The 4th d. c. voltage signal that DC bus passes over by the 4th full-bridge topology is converted to the second alternating voltage square-wave signal.
3rd PWM generator produces the 3rd pulse signal of fixed duty cycle.3rd driving chip is connected with the 3rd full-bridge topology with the 3rd PWM generator, the 3rd pulse signal 3rd PWM generator passed over converts the 3rd positive drive singal and the 3rd negative drive singal to, 3rd positive drive singal is passed to the anode of the 3rd full-bridge topology pulse input end, the 3rd negative drive singal is passed to the negative terminal of the 3rd full-bridge topology pulse input end.The be coupled second alternating voltage square-wave signal of coming of 3rd full-bridge topology high frequency transformer converts the second d. c. voltage signal to and is supplied to energy storage device.
Because now signal processing software is by phase shift angle assignment gives the delayed phase shifting control register of the 3rd PWM generator, and the phase place of the 3rd pulse signal that the 3rd PWM generator is exported lags behind the phase place of the 4th pulse signal that the 4th PWM generator exports degree, thus make the 4th full-bridge topology that the dump energy in direct-current grid is sent to high frequency transformer via the 4th full-bridge topology.The Energy transfer that full-bridge topology sends by high frequency transformer gives the 3rd full-bridge topology, turns the 5th step.3rd full-bridge topology by the Energy transfer sent by high frequency transformer to energy storage device. thus module of the present invention realizes direct-current grid provides process from energy to energy storage device, absorb the dump energy in direct-current grid, thus maintain the stable of DC bus-bar voltage.
5th step,
Signal processing software judges whether timer is greater than T sif be greater than, then jump to second step, if be less than or equal to T s, timer continues timing, turns the 5th step.
Following technique effect can be reached with the present invention:
1. volume of the present invention is little, achieves the electrical isolation between bulk power grid and DC bus.
In the present invention due to the first full-bridge topology, the second full-bridge topology, the 3rd full-bridge topology and the 4th full-bridge topology, make high frequency transformer operating frequency very high, according to transformer induced potential E=4.44f sn φ m(N shows the number of turn, φ mmain flux density maxima) it is known that in identical induced potential situation, frequency is higher, the number of turn and main flux density less, also just mean that needed for transformer, the volume of iron core reduces thereupon, thus volume of the present invention is little.High frequency transformer achieves the electrical isolation between bulk power grid and DC bus that module of the present invention connects, and decreases the impact of direct-current grid to bulk power grid.
2. control simple, the seamless switching between the grid-connected and island mode of direct-current grid can be realized.
Connected use AC network and energy storage device are merged by high frequency transformer by the present invention.Direct-current grid is when carrying out the switching of pattern, the device for power switching that the present invention only just need can control itself according to the phase relation between different full-bridge topology driving pulse realizes the switching of operational mode, the rapidity that scheme switches compared to existing technology depends on the response speed of communication network between two complete equipments different on geographical position and stablizes, dynamic response capability of the present invention is fast, can realize the seamless switching between the grid-connected and island mode of direct-current grid.
Accompanying drawing explanation
Fig. 1 is use scenes schematic diagram of the present invention.
Fig. 2 is signal processing software flow chart.
Fig. 3 is overall logic structure chart of the present invention.
Fig. 4 is the inner connection layout of Technics of Power Electronic Conversion unit in the present invention; Technics of Power Electronic Conversion unit is made up of the first full-bridge topology 100, second full-bridge topology 200, the 3rd full-bridge topology 300, high frequency transformer 400, first electric capacity, the second electric capacity and the 4th full-bridge topology 500.
Embodiment
The present invention can be applicable in direct-current grid as shown in Figure 1.Direct-current grid refers to that (the present invention 131 by distributed power source 14, energy storage device 12, DC load 15, energy conversion device; first convertor assembly 132; second convertor assembly 133 forms) form can teaching display stand control, the autonomous system of protect and manage; both can be incorporated into the power networks with utility alternating current net 11; also can isolated operation, DC load 15 is connected on DC bus 16 by convertor assembly 133.Distributed power source 14 is connected on DC bus 16 by convertor assembly 132.When direct-current grid and utility alternating current net 11 are incorporated into the power networks, utility alternating current net 11 provides energy to maintain voltage stabilization on DC bus 16 by the present invention 131 to DC bus 16.When direct-current grid isolated operation, if distributed power source 14 by the first convertor assembly 132 energy be delivered on direct current be greater than DC bus 16 pass to the energy needed for DC load 15 by the second convertor assembly 133 time, DC bus 16 provides energy to maintain the stable of direct voltage on DC bus 16 by the present invention 131 to energy storage device 12.When direct-current grid isolated operation, if distributed power source 14 by the energy that convertor assembly 132 is delivered on direct current be less than DC bus 16 pass to the energy needed for DC load 15 by convertor assembly 133 time, energy storage device 12 provides energy to maintain the stable of direct voltage on DC bus 16 by the present invention 131 to DC bus 16.
The first step, initialization also judges the mode of operation of module of the present invention:
The operating frequency f of 1.1 initialize digital signal processors g, given the Duty ratio control register of the first PWM generator by the sine function assignment that will obtain from table of natural sines, the first PWM generator be set as sine pulse i.e. the first output of pulse signal; By fixed numbers D assignment being given the Duty ratio control register of the second PWM generator, the 3rd PWM generator and the 4th PWM generator, respectively the second PWM generator is set as the second output of pulse signal of fixed duty cycle, 3rd PWM generator is set as the 3rd output of pulse signal of fixed duty cycle, and the 4th PWM generator is set as the 4th output of pulse signal of fixed duty cycle.By numerical value f sassignment gives the frequency control register of the second PWM generator, the 3rd PWM generator and the 4th PWM generator, and the frequency making the second PWM generator, the 3rd PWM generator and the 4th PWM generator produce pulse is f s.By fixed numbers S assignment to timer, timing length is set as T s, wherein T s=S/f g.F gbe the operating frequency of digital signal processor, S is greater than 1.2Y, and Y is the number of the required statement performed of signal processing software flow process single cycle.
1.2 initialize Timer are 0, and timer starts timing.
1.3 digital signal processors read the mains voltage signal V passed over by signal condition unit 700 grid, power network current signal I grid, energy storage device voltage signal V storage, energy storage device current signal I storage, the first capacitance voltage signal V c, DC bus-bar voltage signal V line, DC bus current signal I line.
1.4 judge V min< V grid< V maxwhether set up, wherein V maxallow by utility network the maximum of work, V minallow by utility network the minimum value of work, if set up, then this module work is in grid-connect mode, jumps to second step.If be false, then this module work is in island mode, jumps to the 5th step.
Second step, the three-port DC bus Voltage stabilizing module towards direct-current grid works in grid-connect mode:
2.1 according to p t=V linei line-V gridi gridcalculate the size p of the present invention's transferring energy under grid-connect mode t.
2.2 according to obtain the phase shift angle of the second pulse signal wherein L is self leakage inductance of high frequency transformer 400, is a fixing parameter.
2.3 judge whether set up, if set up, jump to the 3rd step, if be false, jump to the 4th step.
3rd step, the three-port DC bus Voltage stabilizing module towards direct-current grid works in grid-connected energy regenerative pattern:
3.1 by the phase shift angle of the second pulse assignment gives the advanced phase shifting control register of the second PWM generator.
1 assignment is given the on off control register of the first PWM generator, the second PWM generator and the 4th PWM generator by 3.2, and the first PWM generator, the second PWM generator and the 4th PWM generator are started working.
3.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, jump to 3.4 steps.
3.4 timers continue timing, jump to 3.3.
4th step, the three-port DC bus Voltage stabilizing module towards direct-current grid is operated in and utility network powered mode off the net.
4.1 by phase shift angle assignment gives the delayed phase shifting control register of the second PWM generator, and will fix phase shifting angle assignment gives the delayed phase-shift controller of the first PWM generator.
1 assignment is given the on off control register of the first PWM generator, the second PWM generator and the 4th PWM generator by 4.2, and the first PWM generator, the second PWM generator and the 4th PWM generator are started working.
4.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, go to 4.4 steps.
4.4 timers continue timing, jump to 4.3.
5th step, the three-port DC bus Voltage stabilizing module towards direct-current grid is operated in island mode:
5.1 according to P t'=V linei line-V storagei storagecalculate the size P of the present invention's transferring energy under island mode t'.
5.2 according to obtain phase shift angle
5.3 judge whether set up, if set up, then jump to the 6th step; If be false, jump to the 7th step.
6th step, energy storage device powered mode under working in isolated island towards the three-port DC bus Voltage stabilizing module of direct-current grid
6.1 by the phase shift angle of the 3rd pulse signal assignment gives the advanced phase shifting control register of the 3rd PWM generator.
1 assignment is given the on off control register of the 3rd PWM generator, the 4th PWM generator by 6.2, and the 3rd PWM generator and the 4th PWM generator are started working.
6.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, jump to 6.4 steps.
6.4 timers continue timing, jump to 6.3;
7th step, energy storage device energy storage pattern under working in isolated island towards the three-port DC bus Voltage stabilizing module of direct-current grid:
7.1 by the phase shift angle of the 3rd pulse signal assignment gives the delayed phase shifting control register of the 3rd PWM generator.
1 assignment is given the on off control register of the 3rd PWM generator, the 4th PWM generator by 7.2, and the 3rd PWM generator and the 4th PWM generator are started working.
7.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, jump to 7.4 steps.
7.4 timers jump to 7.3 after continuing timing.
Signal processing software flow process is an endless loop, when normally working towards direct-current grid three port Voltage stabilizing module, can repeatedly perform above-mentioned flow process always.
Fig. 3 is overall logic structure chart of the present invention.The present invention towards the DC bus Voltage stabilizing module of direct-current grid by the first topology 100, first electric capacity, the first full-bridge topology 200, second full-bridge topology 300, high frequency transformer 400, the 3rd full-bridge topology 500, second electric capacity, signal processing unit 600 and signal condition unit 700 form.
First full-bridge topology 100 is made up of four power switch pipes, and the second end of the first power switch tube S 1 is connected with the second end of the second power switch tube S 2, and the three-terminal link of the first power switch tube S 1 is to the second end of the 3rd power switch tube S 3.Second end of the second power switch tube S 2 was both connected with the second end of the first power switch tube S 1, be connected to again the positive pole of the first electric capacity, the three-terminal link of the second power switch tube S 2 to the second end of the 4th power switch tube S 4, and is connected to the zero line N of utility alternating current net.Second end of the 3rd power switch tube S 3 is connected to the 3rd end of the first power switch tube S 1, and is connected to the live wire L of utility alternating current net.The three-terminal link of the 3rd power switch tube S 3 is to the 3rd end of the 4th power switch tube S 4.Second end of the 4th power switch tube S 4 is connected to the 3rd end of the second power switch tube S 2, and the 3rd end of the 4th power switch tube S 4 was both connected with the 3rd end of the 3rd power switch tube S 3, was connected to again the negative pole of the first electric capacity.The first end of the power switch tube S 1 in the first full-bridge topology 100 and the first end of power switch tube S 4 are the anode M1+ of the first full-bridge topology 100 pulse input end, and the first end of the power switch tube S 2 in the first full-bridge topology 100 and the first end of power switch tube S 3 are the negative terminal M1-of the first full-bridge topology 100 shape pulse input end.The pulse input end of the first full-bridge topology 100 is connected with signal processing unit 600.
Second full-bridge topology 200 is made up of four power switch pipes, second end of the 5th power switch tube S 5 is connected with the second end of the positive pole of the first electric capacity, the 6th power switch tube S 6,3rd end of the 5th power switch tube S 5 is connected with the second end of the 7th power switch tube S 7, and is connected to the Same Name of Ends of elementary first winding of high frequency transformer 400.Second end of the 6th power switch tube S 6 is connected to the second end of the 5th power switch tube S 5, and the 3rd end of the 6th power switch tube S 6 is connected with the second end of the 8th power switch tube S 8, and is connected to the different name end of elementary first winding of high frequency transformer 400.Second end of the 7th power switch tube S 7 is connected to the 3rd end of the 5th power switch tube S 5, and the three-terminal link of the 7th power switch tube S 7 to the negative pole of the first electric capacity, and is connected with the 3rd end of the 8th power switch tube S 8.Second end of the 8th power switch tube S 8 is connected to the 3rd end of the 6th power switch tube S 6, and the three-terminal link of the 8th power switch tube S 8 is to the 3rd end of the 7th power switch tube S 7.The first end of the power switch tube S 5 in the second full-bridge topology 200 and the first end of power switch tube S 8 are the anode M2+ of the second full-bridge topology 200 pulse input end, and the first end of the power switch tube S 6 in the second full-bridge topology 200 and the first end of power switch tube S 7 are the negative terminal M2-of the second full-bridge topology 200 shape pulse input end.The pulse input end of the second full-bridge topology 200 is connected with signal processing unit 600.
3rd full-bridge topology 300 is made up of four power switch pipes, its connected mode is: the second end of the 9th power switch tube S 9 is connected with the second end of the positive pole BAT+ of energy storage device, the tenth power switch tube S 10, the three-terminal link of the 9th power switch tube S 9 to the second end of the 11 power switch tube S 11, and is all connected to the Same Name of Ends of elementary second winding of high frequency transformer 400.Second end of the tenth power switch tube S 10 is connected to the second end of the 9th power switch tube S 9, the three-terminal link of the tenth power switch tube S 10 to the second end of the 12 power switch tube S 12, and is connected to the different name end of elementary second winding of high frequency transformer 400.Second end of the 11 power switch tube S 11 is connected to the 3rd end of the 9th power switch tube S 9, and the 3rd end of the 11 power switch tube S 11 is connected with the negative pole BAT-of energy storage device, the 3rd end of the 12 power switch tube S 12.Second end of the 12 power switch tube S 12 is connected to the 3rd end of the tenth power switch tube S 10, and the three-terminal link of the 12 power switch tube S 12 is to the 3rd end of the 11 power switch tube S 11.The first end of the power switch tube S 9 in the 3rd full-bridge topology 300 and the first end of power switch tube S 12 are the anode M3+ of the 3rd full-bridge topology 300 pulse input end, and the first end of the power switch tube S 10 in the 3rd full-bridge topology 300 and the first end of power switch tube S 11 are the negative terminal M3-of the 3rd full-bridge topology 300 shape pulse input end.The pulse input end of the 3rd full-bridge topology 300 is connected with signal processing unit 600.
4th full-bridge topology 500 is made up of four power switch pipes, second end of the 13 power switch tube S 13 is connected with the second end of the anode LINE+ of DC bus, the 14 power switch tube S 14,3rd end of the 13 power switch tube S 13 is connected with the second end of the 15 power switch tube S 15, and is connected to the Same Name of Ends of the secondary winding of high frequency transformer 400.Second end of the 14 power switch tube S 14 is connected to the second end of the 13 power switch tube S 13, the three-terminal link of the 14 power switch tube S 14 to the second end of the 16 power switch tube S 16, and is connected to the different name end of the secondary winding of high frequency transformer 400.Second end of the 15 power switch tube S 15 is connected to the 3rd end of the 13 power switch tube S 13, and the three-terminal link of the 15 power switch tube S 15 is to the 3rd end of the 16 power switch tube S 16.Second end of the 16 power switch tube S 16 is connected to the 3rd end of the 14 power switch tube S 14, and the 3rd end of the 16 power switch tube S 16 is connected with the 3rd end of the 15 power switch tube S 15, the negative terminal LINE-of DC bus.The first end of the power switch tube S 13 in the 4th full-bridge topology 500 and the first end of power switch tube S 16 are the anode M4+ of the 4th full-bridge topology 500 pulse input end, and the first end of the power switch tube S 14 in the 4th full-bridge topology 500 and the first end of power switch tube S 15 are the negative terminal M4-of the 4th full-bridge topology 500 shape pulse input end.The pulse input end of the 4th full-bridge topology 500 is connected with signal processing unit 600.

Claims (9)

1. the three-port DC bus Voltage stabilizing module towards direct-current grid, by live wire L, zero line N is connected with utility alternating current net (11), by energy storage device positive pole BAT+, energy storage device negative pole BAT-is connected with energy storage device (12), by the anode LINE+ of DC bus, the negative terminal LINE-of DC bus is connected with the DC bus (16) in direct-current grid, it is characterized in that three-port DC bus Voltage stabilizing module towards direct-current grid is by Technics of Power Electronic Conversion unit, signal processing unit (600) and signal condition unit (700) composition, Technics of Power Electronic Conversion unit is made up of the first full-bridge topology (100), the first electric capacity, the second electric capacity, the second full-bridge topology (200), the 3rd full-bridge topology (300), high frequency transformer (400), the 4th full-bridge topology (500), first full-bridge topology (100) is connected with the first electric capacity with utility alternating current net (11), the AC signal that utility alternating current net (11) transmits is converted to rectified signal, and rectified signal is exported to the first electric capacity, first electric capacity is connected with the first full-bridge topology (100), the second full-bridge topology (200), the rectified signal that first full-bridge topology (100) transmits is become the first stable d. c. voltage signal, and the first d. c. voltage signal is exported to the second full-bridge topology (200), second full-bridge topology (200) is connected with high frequency transformer (400) with the first electric capacity, first d. c. voltage signal is converted to the first alternating voltage square-wave signal, and the first alternating voltage square-wave signal is transferred to high frequency transformer (400), 3rd full-bridge topology (300) is connected with energy storage device (12), high frequency transformer (400), the second d. c. voltage signal that energy storage device (12) provides is converted to the second alternating voltage square-wave signal, and the second alternating voltage square-wave signal is passed to high frequency transformer (400), high frequency transformer (400) is connected with the 4th full-bridge topology (500) with the second full-bridge topology (200), the 3rd full-bridge topology (300), first alternating voltage square-wave signal is coupled to the input of the 4th full-bridge topology (500), the second alternating voltage square-wave signal is also coupled to the input of the 4th full-bridge topology (500), 4th full-bridge topology (500) is connected with the second electric capacity with high frequency transformer (400), first alternating voltage square-wave signal is become the 3rd d. c. voltage signal and outputs to DC bus, and the second alternating voltage square-wave signal is converted to the 4th d. c. voltage signal exports to DC bus, second electric capacity is connected with DC bus (16) with the 4th full-bridge topology (500), signal condition unit (700) is connected with signal processing unit (600) with utility alternating current net (11), energy storage device (12), the first electric capacity, DC bus (16), by the ac voltage signal (V that utility alternating current net (11) passes over aC) and ac current signal (I aC) nurse one's health into mains voltage signal (V respectively grid) and power network current signal (I grid) deliver to signal processing unit (600), the first d. c. voltage signal (V that first electric capacity is provided dC1) nurse one's health into the first capacitance voltage (V c) deliver to signal processing unit (600), the second d. c. voltage signal (V that energy storage device (12) is passed over dC2) nurse one's health into energy storage device voltage signal (V storage) deliver to signal processing unit (600), the second DC current signal (I of energy storage device (12) will be flow through dC2) nurse one's health into energy storage device current signal (I storage) deliver to signal processing unit (600), the 3rd d. c. voltage signal (V that DC bus (16) is provided dC3) nurse one's health into DC bus-bar voltage signal (V line) deliver to signal processing unit (600), the 3rd DC current signal (I of DC bus (16) will be flow through dC3) nurse one's health into DC bus current signal (I line) deliver to signal processing unit (600), signal processing unit (600) is connected with signal condition unit (700), to the mains voltage signal (V that signal condition unit (700) passes over the first full-bridge topology (100), the second full-bridge topology (200), the 3rd full-bridge topology (300), the 4th full-bridge topology (500) grid), power network current signal (I grid), energy storage device voltage signal (V storage), energy storage device current signal (I storage), the first capacitance voltage signal (V c), DC bus-bar voltage signal (V line), DC bus current signal (I line) process, be the pulse input end that drive pulse signal delivers to the first full-bridge topology (100), the second full-bridge topology (200), the 3rd full-bridge topology (300) and the 4th full-bridge topology (500) by the results conversion after process,
First full-bridge topology (100) is made up of four power switch pipes, second end of the first power switch pipe (S1) is connected with the second end of the second power switch pipe (S2), and the three-terminal link of the first power switch pipe (S1) is to the second end of the 3rd power switch pipe (S3); Second end of the second power switch pipe (S2) was both connected with the second end of the first power switch pipe (S1), be connected to again the positive pole of the first electric capacity, the three-terminal link of the second power switch pipe (S2) to the second end of the 4th power switch pipe (S4), and is connected to the zero line N of utility alternating current net; Second end of the 3rd power switch pipe (S3) is connected to the 3rd end of the first power switch pipe (S1), and is connected to the live wire L of utility alternating current net; The three-terminal link of the 3rd power switch pipe (S3) is to the 3rd end of the 4th power switch pipe (S4); Second end of the 4th power switch pipe (S4) is connected to the 3rd end of the second power switch pipe (S2), 3rd end of the 4th power switch pipe (S4) was both connected with the 3rd end of the 3rd power switch pipe (S3), was connected to again the negative pole of the first electric capacity; The first end of the first power switch pipe (S1) in the first full-bridge topology (100) and the first end of the 4th power switch pipe (S4) are the anode M1+ of the first full-bridge topology (100) pulse input end, and the first end of the second power switch pipe (S2) in the first full-bridge topology (100) and the first end of the 3rd power switch pipe (S3) are the negative terminal M1-of the first full-bridge topology (100) pulse input end; The pulse input end of the first full-bridge topology (100) is connected with signal processing unit (600);
First electric capacity and the second electric capacity are alminium electrolytic condenser or tantalum electrochemical capacitor;
High frequency transformer (400) is three port devices, is made up of armature winding, secondary winding and magnetic core, and its armature winding is made up of elementary first winding and elementary second winding;
Second full-bridge topology (200) is made up of four power switch pipes, second end of the 5th power switch pipe (S5) is connected with the second end of the positive pole of the first electric capacity, the 6th power switch pipe (S6), 3rd end of the 5th power switch pipe (S5) is connected with the second end of the 7th power switch pipe (S7), and is connected to the Same Name of Ends of elementary first winding of high frequency transformer (400); Second end of the 6th power switch pipe (S6) is connected to the second end of the 5th power switch pipe (S5), 3rd end of the 6th power switch pipe (S6) is connected with the second end of the 8th power switch pipe (S8), and is connected to the different name end of elementary first winding of high frequency transformer (400); Second end of the 7th power switch pipe (S7) is connected to the 3rd end of the 5th power switch pipe (S5), the three-terminal link of the 7th power switch pipe (S7) to the negative pole of the first electric capacity, and is connected with the 3rd end of the 8th power switch pipe (S8); Second end of the 8th power switch pipe (S8) is connected to the 3rd end of the 6th power switch pipe (S6), and the three-terminal link of the 8th power switch pipe (S8) is to the 3rd end of the 7th power switch pipe (S7); The first end of the 5th power switch pipe (S5) in the second full-bridge topology (200) and the first end of the 8th power switch pipe (S8) are the anode (M2+) of the second full-bridge topology (200) pulse input end, and the first end of the 6th power switch pipe (S6) in the second full-bridge topology (200) and the first end of the 7th power switch pipe (S7) are the negative terminal (M2-) of the second full-bridge topology (200) shape pulse input end; The pulse input end of the second full-bridge topology (200) is connected with signal processing unit (600);
3rd full-bridge topology (300) is made up of four power switch pipes, second end of the 9th power switch pipe (S9) is connected with the second end of the positive pole (BAT+) of energy storage device, the tenth power switch pipe (S10), the three-terminal link of the 9th power switch pipe (S9) to the second end of the 11 power switch pipe (S11), and is all connected to the Same Name of Ends of elementary second winding of high frequency transformer (400); Second end of the tenth power switch pipe (S10) is connected to the second end of the 9th power switch pipe (S9), the three-terminal link of the tenth power switch pipe (S10) to the second end of the 12 power switch pipe (S12), and is connected to the different name end of elementary second winding of high frequency transformer (400); Second end of the 11 power switch pipe (S11) is connected to the 3rd end of the 9th power switch pipe (S9), and the 3rd end of the 11 power switch pipe (S11) is connected with the negative pole (BAT-) of energy storage device, the 3rd end of the 12 power switch pipe (S12); Second end of the 12 power switch pipe (S12) is connected to the 3rd end of the tenth power switch pipe (S10), and the three-terminal link of the 12 power switch pipe (S12) is to the 3rd end of the 11 power switch pipe (S11); The first end of the 9th power switch pipe (S9) in 3rd full-bridge topology (300) and the first end of the 12 power switch pipe (S12) are the anode (M3+) of the 3rd full-bridge topology (300) pulse input end, and the first end of the tenth power switch pipe (S10) in the 3rd full-bridge topology (300) and the first end of the 11 power switch pipe (S11) are the negative terminal (M3-) of the 3rd full-bridge topology (300) shape pulse input end; The pulse input end of the 3rd full-bridge topology (300) is connected with signal processing unit (600);
4th full-bridge topology (500) is made up of four power switch pipes, second end of the 13 power switch pipe (S13) is connected with the second end of the anode (LINE+) of DC bus, the 14 power switch pipe (S14), 3rd end of the 13 power switch pipe (S13) is connected with the second end of the 15 power switch pipe (S15), and is connected to the Same Name of Ends of the secondary winding of high frequency transformer (400); Second end of the 14 power switch pipe (S14) is connected to the second end of the 13 power switch pipe (S13), the three-terminal link of the 14 power switch pipe (S14) to the second end of the 16 power switch pipe (S16), and is connected to the different name end of the secondary winding of high frequency transformer (400); Second end of the 15 power switch pipe (S15) is connected to the 3rd end of the 13 power switch pipe (S13), and the three-terminal link of the 15 power switch pipe (S15) is to the 3rd end of the 16 power switch pipe (S16); Second end of the 16 power switch pipe (S16) is connected to the 3rd end of the 14 power switch pipe (S14), and the 3rd end of the 16 power switch pipe (S16) is connected with the 3rd end of the 15 power switch pipe (S15), the negative terminal (LINE-) of DC bus; The first end of the 13 power switch pipe (S13) in 4th full-bridge topology (500) and the first end of the 16 power switch pipe (S16) are the anode (M4+) of the 4th full-bridge topology (500) pulse input end, and the first end of the 14 power switch pipe (S14) in the 4th full-bridge topology (500) and the first end of the 15 power switch pipe (S15) are the negative terminal (M4-) of the 4th full-bridge topology (500) shape pulse input end; The pulse input end of the 4th full-bridge topology (500) is connected with signal processing unit (600);
Signal processing unit (600) is made up of digital signal processor, 4 driving chip, and the microprocessor with analog-digital conversion function, timer, flash storage, more than 4 PWM generator selected by digital signal processor; The flash storage of digital signal processor has table of natural sines and fixed numbers D; PWM generator all has advanced phase shifting control register, delayed phase shifting control register, on off control register; First PWM generator is connected with the first driving chip, exports sine pulse i.e. the first pulse signal according to the sine function obtained from table of natural sines to the first driving chip; Second PWM generator is connected with the second driving chip, exports the second pulse signal according to fixed numbers D to the second driving chip; 3rd PWM generator is connected with the 3rd driving chip, exports the 3rd pulse signal according to fixed numbers D to the 3rd driving chip; 4th PWM generator is connected with four-wheel drive chip, exports the 4th pulse signal according to fixed numbers D to four-wheel drive chip;
Driving chip comprises the first driving chip, second and drives sheet, the 3rd driving chip and four-wheel drive chip; First driving chip is connected with the first full-bridge topology (100) with the first PWM generator, the first pulse signal first PWM generator passed over converts the first positive drive singal and the first negative drive singal to, and the first positive drive singal is delivered to the anode (M1+) of the first full-bridge topology (100) pulse input end, the first negative drive singal is delivered to the negative terminal (M1-) of the first full-bridge topology (100) pulse input end; Second driving chip is connected with the second full-bridge topology (200) with the second PWM generator, the second pulse signal second PWM generator passed over converts the second positive drive singal and the second negative drive singal to, and the second positive drive singal is delivered to the anode (M2+) of the second full-bridge topology (200) pulse input end, the second negative drive singal is delivered to the negative terminal (M2-) of the second full-bridge topology (200) pulse input end; 3rd driving chip is connected with the 3rd full-bridge topology (300) with the 3rd PWM generator, the 3rd pulse signal 3rd PWM generator passed over converts the 3rd positive drive singal and the 3rd negative drive singal to, 3rd positive drive singal is passed to the anode (M3+) of the 3rd full-bridge topology (300) pulse input end, the 3rd negative drive singal is passed to the negative terminal (M3-) of the 3rd full-bridge topology (300) pulse input end; Four-wheel drive chip is connected with the 4th full-bridge topology (500) with the 4th PWM generator, the 4th pulse signal 4th PWM generator passed over converts the 4th positive drive singal and the 4th negative drive singal to, and the 4th positive drive singal is delivered to the anode (M4+) of the 4th full-bridge topology (500) pulse input end, the 4th negative drive singal is delivered to the negative terminal (M4-) of the 4th full-bridge topology (500) pulse input end;
Digital signal processor is built with signal processing software;
Signal condition unit (700) is made up of 1 road ac voltage detection circuit, 1 road alternating current testing circuit, 3 road direct voltage testing circuits and 2 road D.C. current detecting circuits.
2., as claimed in claim 1 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that the size of voltage signal magnitude in the rectified signal that described first electric capacity exports according to the first full-bridge topology (100) and the size of ripple peak-to-peak value and frequency thereof are chosen; The capacitance of the first electric capacity wherein V 1for voltage signal average value, the V of rectified signal r1for size, the f of rectified voltage signal ripple r1for the rated power that the size of rectified voltage signal ripple frequency, P are the first full-bridge topology (100), be numerically equal to maximum power and the distributed power source maximum power sum of load in direct-current grid; The withstand voltage 1.2V of the first electric capacity 1.
3., as claimed in claim 1 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that the capacitance of described second electric capacity the withstand voltage of the second electric capacity is 1.2V 5, wherein V 5for the peak value size of DC bus-bar voltage, V r2for the size of voltage ripple, f r2for line wave frequency, I is the output current of the 3rd full-bridge topology.
4., as claimed in claim 1 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that the maximum power P of the number of turn of elementary first winding of described high frequency transformer (400), elementary second winding and secondary winding according to the three-port DC bus Voltage stabilizing module towards direct-current grid 1, high frequency transformer (400) operating frequency f sand the size of high frequency transformer (400) output voltage and input voltage is determined; The number of turn of elementary first winding of high frequency transformer (400) wherein V 2the input voltage of elementary first winding of high frequency transformer, f sfor the operating frequency of high frequency transformer, B wmagnetic core work intensity, A efor the effective work area of magnetic core; Secondary winding turns wherein V 3the voltage at high frequency transformer (400) secondary winding two ends; The number of turn of elementary second winding wherein V 4it is the input voltage of elementary second winding of high frequency transformer; The magnetic core used in high frequency transformer (400) adopts the manganese-zinc ferrite core of ETD type.
5. as claimed in claim 1 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that the power switch pipe gate pole threshold voltage that the output voltage of described driving chip, output current and driving chip connect is relevant with required drive current, when choosing driving chip, its output voltage should be more than or equal to the gate pole threshold voltage of connected power switch pipe, and output current should be more than or equal to the gate pole threshold current of connected power switch pipe.
6., as claimed in claim 1 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that the flow process of described signal processing software is:
The first step, initialization also judges the mode of operation towards the three-port DC bus Voltage stabilizing module of direct-current grid:
The operating frequency f of 1.1 initialize digital signal processors g, given the Duty ratio control register of the first PWM generator by the sine function assignment that will obtain from table of natural sines, the first PWM generator be set as sine pulse i.e. the first output of pulse signal; By fixed numbers D assignment being given the Duty ratio control register of the second PWM generator, the 3rd PWM generator and the 4th PWM generator, respectively the second PWM generator is set as the second output of pulse signal of fixed duty cycle, 3rd PWM generator is set as the 3rd output of pulse signal of fixed duty cycle, and the 4th PWM generator is set as the 4th output of pulse signal of fixed duty cycle; By numerical value f sassignment gives the frequency control register of the second PWM generator, the 3rd PWM generator and the 4th PWM generator, and the frequency making the second PWM generator, the 3rd PWM generator and the 4th PWM generator produce pulse is f s; By fixed numbers S assignment to timer, timing length is set as T s, wherein T s=S/f g; f gbeing the operating frequency of digital signal processor, should estimating the number Y of execute statement needed for signal processing software flow process when arranging, S should be greater than 1.2Y;
1.2 initialize Timer are 0, and timer starts timing;
1.3 digital signal processors read the mains voltage signal (V passed over by signal condition unit (700) grid), power network current signal (I grid), energy storage device voltage signal (V storage), energy storage device current signal (I storage), the first capacitance voltage signal (V c), DC bus-bar voltage signal (V line), DC bus current signal (I line);
1.4 judge V min< V grid< V maxwhether set up, wherein V maxallow by utility network the maximum of work, V minallow by utility network the minimum value of work, if set up, then this module work is in grid-connect mode, jumps to second step, if be false, then this module work is in island mode, jumps to the 5th step;
Second step, the three-port DC bus Voltage stabilizing module towards direct-current grid works in grid-connect mode:
2.1 according to p t=V linei line-V gridi gridcalculate the size p towards three-port DC bus Voltage stabilizing module transferring energy under grid-connect mode of direct-current grid t;
2.2 according to obtain the phase shift angle of the second pulse signal wherein L is self leakage inductance of high frequency transformer (400), is a fixing parameter;
2.3 judge whether set up, if set up, jump to the 3rd step, if be false, jump to the 4th step;
3rd step, the three-port DC bus Voltage stabilizing module towards direct-current grid works in grid-connected energy regenerative pattern:
3.1 by the phase shift angle of the second pulse assignment gives the advanced phase shifting control register of the second PWM generator;
1 assignment is given the on off control register of the first PWM generator, the second PWM generator and the 4th PWM generator by 3.2, and the first PWM generator, the second PWM generator and the 4th PWM generator are started working;
3.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, jump to 3.4 steps;
3.4 timers continue timing, jump to 3.3;
4th step, the three-port DC bus Voltage stabilizing module towards direct-current grid is operated in and utility network powered mode off the net:
4.1 by phase shift angle assignment gives the delayed phase shifting control register of the second PWM generator, and will fix phase shifting angle assignment gives the delayed phase-shift controller of the first PWM generator;
1 assignment is given the on off control register of the first PWM generator, the second PWM generator and the 4th PWM generator by 4.2, and the first PWM generator, the second PWM generator and the 4th PWM generator are started working;
4.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, jump to 4.4 steps;
4.4 timers continue timing, jump to 4.3;
5th step, the three-port DC bus Voltage stabilizing module towards direct-current grid is operated in island mode:
5.1 according to P t'=V linei line-V storagei storagecalculate the size P of the present invention's transferring energy under island mode t';
5.2 according to obtain phase shift angle
5.3 judge whether set up, if set up, then jump to the 6th step; If be false, jump to the 7th step;
6th step, energy storage device powered mode under working in isolated island towards the three-port DC bus Voltage stabilizing module of direct-current grid:
6.1 by the phase shift angle of the 3rd pulse signal assignment gives the advanced phase shifting control register of the 3rd PWM generator;
1 assignment is given the on off control register of the 3rd PWM generator, the 4th PWM generator by 6.2, and the 3rd PWM generator and the 4th PWM generator are started working;
6.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, jump to 6.4 steps;
6.4 timers continue timing, jump to 6.3;
7th step, energy storage device energy storage pattern under working in isolated island towards the three-port DC bus Voltage stabilizing module of direct-current grid:
7.1 by the phase shift angle of the 3rd pulse signal assignment gives the delayed phase shifting control register of the 3rd PWM generator;
1 assignment is given the on off control register of the 3rd PWM generator, the 4th PWM generator by 7.2, and the 3rd PWM generator and the 4th PWM generator are started working;
7.3 judge whether timer is greater than T sif be greater than, jump to 1.2 steps, if be less than or equal to, jump to 7.4 steps;
7.4 timers jump to 7.3 after continuing timing.
7. as claimed in claim 1 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that the scope of described signal condition unit (700) input voltage should meet: institute allows the AC voltage range of input should be greater than AC signal (V aC) peak value, allow input DC voltage range should be greater than the first d. c. voltage signal (V dC1), the second d. c. voltage signal (V dC2), the 3rd d. c. voltage signal (V dC3) maximum; The scope of input current should meet: allow input alternating current should be greater than alternating current (I aC) peak value, allow input direct current should be greater than the second DC current signal (I dC2), the 3rd DC current signal (I dC3) maximum; Output voltage and electric current should be less than the voltage and current value of the input that analog-to-digital conversion module that be connected digital signal processor carries allows.
8., as claimed in claim 1 or 2 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that described first to the 12 power switch pipe is field-effect transistor or insulated gate bipolar transistor IGBT; If power switch pipe selects IGBT power switch pipe, then the first end of power switch pipe is the gate pole of IGBT, and power switch pipe second end is the collector electrode of IGBT, and power switch pipe the 3rd end is the emitter of IGBT; If selection field-effect transistor is power switch pipe, then the first end of power switch pipe is the grid of field-effect transistor, and power switch pipe second end is the drain electrode of field-effect transistor, and power switch pipe the 3rd end is the source electrode of field-effect transistor.
9., as claimed in claim 1 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that described fixed numbers D=50%.
CN201410417518.5A 2014-08-22 2014-08-22 A kind of three-port DC bus Voltage stabilizing module towards direct-current grid Expired - Fee Related CN104134991B (en)

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