CN104102785A - Method and device for reducing source synchronous switch noise - Google Patents

Abstract

The invention provides a method and a device for reducing source synchronous switch noise, relates to the electronic field, and solves the problem of output pin switch noise. The method includes: calculating the target impedance of a power supply; adjusting the impedances, at part of or all frequency bands, of the power supply to allow the impedances to be lower than the target impedance. The method is applicable to integrated circuits, and standardized impedance adjustment is achieved.

Description

Reduce the method and apparatus of source simultaneous switching noise

Technical field

The present invention relates to electronic applications, relate in particular to a kind of method and apparatus that reduces source simultaneous switching noise.

Background technology

Because current chip does less and less, integrated technique has entered the sub-micron epoch, makes the design of high-speed digital system face huge challenge.Some negligible problems in low speed design become very important problem, as simultaneous switching noise in high speed design.Simultaneous switching noise is due to gate circuit, and especially impact damper is opened produced mutation current simultaneously and flow through power supply/ground distributed network and produced fluctuation electromotive force.When a large amount of output pins in the same moment from high level to low level switching or the switching from low level to high level, can on adjacent pin, introduce simultaneous switching noise.

Summary of the invention

The invention provides a kind of method and apparatus that reduces source simultaneous switching noise, solved the problem of output pin switching noise.

A method that reduces source simultaneous switching noise, comprising:

Calculate the target impedance of power supply;

Regulate described power supply in the impedance of part or all of frequency range to all lower than described target impedance.

Preferably, the target impedance of calculating power supply comprises:

Calculate target impedance according to following formula:

$Z_{T\arg \mathrm{et}}=\frac{\left(\mathrm{Power\; Supply\; Voltage}\right)\×\left(\mathrm{Ripple\; Tolerance}\right)}{\mathrm{Delta\; Current}},$

Wherein, Power supply voltage is supply voltage, Ripple tolerance is fluctuation range, maximum variable-current=Max delta current that Delta Current=electric current can reach, the variable-current of Max current=maximum adds quiescent current, the maximum variable-current of Max delta current=maximum current.

Preferably, the value of described Max delta current be described Max current value 20% to 40%, the value of described Max delta current is the value sum of all Delta current that are connected to the switching device in same power supplies.

Preferably, regulate PDS extremely all to comprise lower than described target impedance in the impedance of part or all of frequency range:

Taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of target impedance;

Taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of described power supply practical impedance;

Increase electric capacity to part or all of all resistance values on this frequency values lower than described target impedance of resistance value corresponding to frequency values in the curve of described power supply practical impedance.

Preferably, increase electric capacity in the curve of described power supply practical impedance partly or entirely resistance value corresponding to frequency values all, before the step of the resistance value on this frequency values, also comprise lower than described target impedance:

The transient current of computational load electric capacity;

According to described transient current and magnitude of a voltage fluctuation, calculate the target capacitance amount that increases electric capacity.

Preferably, increase electric capacity in the curve of described PDS impedance partly or entirely resistance value corresponding to frequency values all, before the step of the resistance value on this frequency values, also comprise lower than described target impedance:

Determine stabilized voltage supply frequency response range;

In described supply frequency responding range, calculate the maximum impedance of target capacitance amount;

Calculate the highest effective frequency corresponding to described target capacitance amount according to described maximum impedance;

Calculate frequency during higher than described the highest effective frequency required electric capacity as the target capacitance amount that increases electric capacity.

The present invention also provides a kind of device that reduces source simultaneous switching noise, comprising:

Target computing module, for calculating the target impedance of power supply;

Impedance adjustment module, for regulate PDS in the impedance of each frequency range to all lower than described target impedance.

Preferably, described target computing module comprises:

The first computing unit, for calculating target impedance according to following formula:

$Z_{T\arg \mathrm{et}}=\frac{\left(\mathrm{Power\; Supply\; Voltage}\right)\×\left(\mathrm{Ripple\; Tolerance}\right)}{\mathrm{Delta\; Current}},$

Wherein, Power supply voltage is supply voltage, Ripple tolerance is fluctuation range, maximum variable-current=Max delta current that Delta Current=electric current can reach, the variable-current of Max current=maximum adds quiescent current, the maximum variable-current of Max delta current=maximum current.

Preferably, described impedance adjustment module comprises:

Aim curve generation unit, for taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of target impedance;

Impedance curve generation unit, for taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of PDS impedance;

Regulate performance element, for increasing electric capacity to part or all of all resistance values on this frequency values lower than described target impedance of resistance value corresponding to frequency values in the curve of described PDS impedance.

The invention provides a kind of method and apparatus that reduces source simultaneous switching noise, calculate the target impedance of power supply, then regulate PDS in the impedance of part or all of frequency range to all lower than described target impedance, realized standardized impedance adjustment, solved the problem of output pin switching noise.

Brief description of the drawings

Fig. 1 is source impedance curve map of the prior art;

The structural representation of a kind of device that reduces source simultaneous switching noise that Fig. 2 provides for embodiments of the invention two.

Embodiment

Simultaneous switching noise is due to gate circuit, and especially impact damper is opened produced mutation current simultaneously and flow through power supply/ground distributed network and produced fluctuation electromotive force.When a large amount of output pins in the same moment from high level to low level switching or the switching from low level to high level, can on adjacent pin, introduce simultaneous switching noise.

In order to address the above problem, embodiments of the invention provide a kind of method and apparatus that reduces source simultaneous switching noise.Hereinafter in connection with accompanying drawing, embodiments of the invention are elaborated.It should be noted that, in the situation that not conflicting, the combination in any mutually of the feature in embodiment and embodiment in the application.

Below in conjunction with accompanying drawing, embodiments of the invention one are described.

In signal testing, find that Wen Bo has appearred in the zone network of the output terminal of chip power, this is because the source simultaneous switching noise of chip causes.Principle based on reducing source simultaneous switching noise reduces stray inductance, large-area paving VDD-to-VSS and decoupling capacitor.General stray inductance is relevant with encapsulation, and for PCB, design cannot change, and increases the area of VDD-to-VSS, due to the also bad realization of density of veneer now.Therefore can realize and reduce switching noise by the means of increase decoupling capacitor.Add so how much electric capacity, the electric capacity of how many capacitances? the present invention, by the method for emulation, adds decoupling capacitor by the adjustment of impedance curve.Find suitable electric capacity number, position and capacitance.The embodiment of the present invention has been changed design by emulation, adds at the output terminal of chip the electric capacity that emulation obtains.Can see that by test Wen Bo has reduced.

As shown in Figure 1, calculate the target impedance of power supply, the target impedance that label is power supply for that straight line of " 3 ", target impedance, by calculating, can use following expression to calculate and obtain:

$Z_{T\arg \mathrm{et}}=\frac{\left(\mathrm{Power\; Supply\; Voltage}\right)\×\left(\mathrm{Ripple\; Tolerance}\right)}{\mathrm{Delta\; Current}},$

Wherein, Power supply voltage: supply voltage,

Ripple tolerance: fluctuation range,

Maximum variable-current=Max delta current that Delta Current=electric current can reach,

The variable-current of Max current=maximum adds quiescent current,

The maximum variable-current of Max delta current=maximum current.

General Max delta current is the 20%-40% of Max current, is noted that max delta current is all switching device delta current sums that are connected in same power supplies simultaneously.Regulate PDS in the impedance of part or all of frequency range to all lower than described target impedance.Then, adjustable PDS in the impedance of part or all of frequency range to all lower than described target impedance.Concrete, taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of target impedance; Taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of PDS impedance; Increase electric capacity to part or all of all resistance values on this frequency values lower than described target impedance of resistance value corresponding to frequency values in the curve of described PDS impedance.

As shown in Figure 1, the curve (hereinafter referred to as No. 1 curve) that label is " 1 " is the impedance while thering is no electric capacity, drag down the impedance of corresponding frequency by increasing electric capacity, make it to be pressed onto below target impedance at corresponding frequency (can inquire about the instructions of chip, generally between 20MHz-tens MHz).The kurtosis that can see No. 1 curve by figure is 0.1GHz at 1e8, so need to add the electric capacity of 10uF, electric capacity is as far as possible near output terminal, and the curve that label is " 2 " is to add electric capacity curve map afterwards.Embodiments of the invention, by the method for emulation, add decoupling capacitor by the adjustment of impedance curve.Find suitable electric capacity number, position and capacitance.

Find suitable electric capacity number and capacitance (capacitance and number obtain by the kurtosis of impedance curve), the following is two kinds of methods of the target capacitance value calculating of adjusting electric capacity:

Method one: the load calculation electric capacity of utilizing power drives;

First, the transient current of computational load electric capacity.For example, establish load (capacitive) for 30pF, in 2ns, be driven into 3.3V from 0V, transient current is:

$I=C\frac{\mathrm{dV}}{\mathrm{dt}}=30\mathrm{pF}\×\frac{3.3V}{2\mathrm{ns}}49.5\mathrm{mA}.$

Then,, according to described transient current and magnitude of a voltage fluctuation, calculate the target capacitance amount that increases electric capacity.If have 36 such load demand motives, transient current is: 36*49.5mA=1.782A.Suppose that allowable voltage fluctuation is: 3.3*2.5%=82.5mV, required electric capacity is:

C＝I*dt/dv＝1.782A*2ns/0.0825V＝43.2nF。

Method two: utilize target impedance to calculate electric capacity:

For the computing method of electric capacity are clearly described, with an example.The power supply of wanting decoupling is 1.2V, and allowable voltage fluctuation is 2.5%, maximum transient current 600mA.

The first step: calculate target impedance:

$X_{\mathrm{MAX}}=\frac{V_{\mathrm{DD}}\×\mathrm{Ripple}}{\mathrm{\Δ}{I}_{\mathrm{MAX}}}=\frac{1.2*0.025}{0.6}=50\mathrm{m\Ω}.$

Second step: determine stabilized voltage supply frequency response range.

Relevant with the power supply slice, thin piece of concrete use, conventionally arrive between hundreds of kHz at DC.Here be made as DC to 100kHz.

Below 100kHz time, power supply chip can well be made a response to transient current, during higher than 100kHz, shows as very high impedance, if there is no additional electric capacity, power-supply fluctuation will exceed 2.5% of permission.Be less than 2.5% requirement in order still to meet voltage fluctuation when higher than 100kHz, add great electric capacity?

The 3rd step: calculate bulk electric capacity;

In described supply frequency responding range, calculate the maximum impedance of target capacitance amount.In the time that frequency is below electric capacity self-resonance point, the impedance of electric capacity can approximate representation be:

$Z_C=\frac{1}{2\mathrm{\πfC}}.$

Frequency f is higher, and impedance is less, and frequency is lower, and impedance is larger.In the frequency range of needs, the maximum impedance of electric capacity can not exceed target impedance, therefore uses 100kHz to calculate (low-limit frequency of the frequency range that electric capacity works, corresponding electric capacity high impedance):

$C=\frac{1}{2\mathrm{\πf}{X}_{\mathrm{MAX}}}=31.831\mathrm{uF}.$

The 4th step: the highest effective frequency that calculates bulk electric capacity;

Calculate the highest effective frequency corresponding to described target capacitance amount according to described maximum impedance.Put when above in electric capacity self-resonance when frequency, the impedance of electric capacity can approximate representation be:

C?Z＝2πf×ESL。

Frequency f is higher, and impedance is larger, but impedance can not exceed target impedance.Suppose that ESL is 5nH, the highest effective frequency is:

$f_{\mathrm{MAX}}=\frac{X_{\mathrm{MAX}}}{2\mathrm{\πESL}}=1.6\mathrm{MHz}.$

So large electric capacity can let us source impedance at 100kHz to being controlled between 1.6MHz under target impedance, 1.6MHz is the highest effective frequency.When frequency is during higher than 1.6MHz, also need extra electric capacity to control power-supply system impedance, increase the operation of electric capacity.

The 5th step: calculated rate required electric capacity during higher than 1.6MHz;

Calculate frequency during higher than described the highest effective frequency required electric capacity as the target capacitance amount that increases electric capacity.If wish when power-supply system is below 500MHz to meet voltage fluctuation requirement, the stray inductance amount of just necessary control capacitance.Must meet 2 π f × Lmax≤XMAX, so have:

$L_{\mathrm{MAX}}\≤\frac{X_{\mathrm{MAX}}}{2\mathrm{\π}\×200\mathrm{MHz}}=0.016\mathrm{nH}.$

The 0402 packaging ceramic electric capacity of supposing to use AVX Corp., stray inductance is about 0.4nH, adds the stray inductance of via hole after being installed on circuit board, is assumed to be 0.6nH, and total stray inductance is 1nH.Be not more than the requirement of 0.16nH in order to meet total inductance, we need electric capacity number in parallel to be: 1/0.016=62.5, therefore need 63 0402 electric capacity.For impedance when the 1.6MHz is less than target impedance, need electric capacity to be:

$C=\frac{1}{2\mathrm{\π}\×1.6\mathrm{MHz}\×X_{\mathrm{MAX}}}=1.9894\mathrm{uF}.$

Therefore the electric capacity of each electric capacity is 1.9894/63=0.0316uF.

In sum, for this system, we select the large electric capacity of 1 31.831uF and the little electric capacity of 63 0.0316uF to meet the demands.

Below in conjunction with accompanying drawing, embodiments of the invention two are described.

The embodiment of the present invention provides a kind of device that reduces source simultaneous switching noise, and its structure as shown in Figure 2, comprising:

Target computing module 201, for calculating the target impedance of power supply;

Impedance adjustment module 202, for regulate PDS in the impedance of each frequency range to all lower than described target impedance.

Preferably, described target computing module 201 comprises:

The first computing unit 2011, for calculating target impedance according to following formula:

$Z_{T\arg \mathrm{et}}=\frac{\left(\mathrm{Power\; Supply\; Voltage}\right)\×\left(\mathrm{Ripple\; Tolerance}\right)}{\mathrm{Delta\; Current}},$

Wherein, Power supply voltage is supply voltage, Ripple tolerance is fluctuation range, maximum variable-current=Max delta current that Delta Current=electric current can reach, the variable-current of Max current=maximum adds quiescent current, the maximum variable-current of Max delta current=maximum current.

Preferably, described impedance adjustment module 202 comprises:

Aim curve generation unit 2021, for taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of target impedance;

Impedance curve generation unit 2022, for taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of PDS impedance;

Regulate performance element 2023, for increasing electric capacity to part or all of all resistance values on this frequency values lower than described target impedance of resistance value corresponding to frequency values in the curve of described PDS impedance.

Embodiments of the invention provide a kind of target impedance that calculates power supply, then regulate PDS in the impedance of part or all of frequency range to all lower than described target impedance, realized standardized impedance adjustment, solved the problem of output pin switching noise.

The all or part of step that one of ordinary skill in the art will appreciate that above-described embodiment can realize by computer program flow process, described computer program can be stored in a computer-readable recording medium, described computer program (as system, unit, device etc.) on corresponding hardware platform is carried out, in the time carrying out, comprise step of embodiment of the method one or a combination set of.

Alternatively, all or part of step of above-described embodiment also can realize with integrated circuit, and these steps can be made into respectively integrated circuit modules one by one, or the multiple modules in them or step are made into single integrated circuit module realize.Like this, the present invention is not restricted to any specific hardware and software combination.

Each device/functional module/functional unit in above-described embodiment can adopt general calculation element to realize, and they can concentrate on single calculation element, also can be distributed on the network that multiple calculation elements form.

Each device/functional module/functional unit in above-described embodiment is realized and during as production marketing independently or use, can be stored in a computer read/write memory medium using the form of software function module.The above-mentioned computer read/write memory medium of mentioning can be ROM (read-only memory), disk or CD etc.

Any be familiar with those skilled in the art the present invention disclose technical scope in, can expect easily change or replace, within all should being encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain described in claim.

Claims (9)

1. a method that reduces source simultaneous switching noise, is characterized in that, comprising:

Calculate the target impedance of power supply;

Regulate described power supply in the impedance of part or all of frequency range to all lower than described target impedance.

2. the method that reduces source simultaneous switching noise according to claim 1, is characterized in that, the target impedance that calculates power supply comprises:

Calculate target impedance according to following formula:

$Z_{T\arg \mathrm{et}}=\frac{\left(\mathrm{Power\; Supply\; Voltage}\right)\×\left(\mathrm{Ripple\; Tolerance}\right)}{\mathrm{Delta\; Current}},$

Wherein, Power supply voltage is supply voltage, Ripple tolerance is fluctuation range, maximum variable-current=Max delta current that Delta Current=electric current can reach, the variable-current of Max current=maximum adds quiescent current, the maximum variable-current of Max delta current=maximum current.

3. the method that reduces source simultaneous switching noise according to claim 2, is characterized in that,

The value of described Max delta current be described Max current value 20% to 40%, the value of described Max delta current is the value sum of all Delta current that are connected to the switching device in same power supplies.

4. according to the method that reduces source simultaneous switching noise described in claim 1 or 2 or 3, it is characterized in that, regulate PDS extremely all to comprise lower than described target impedance in the impedance of part or all of frequency range:

Taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of target impedance;

Taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of described power supply practical impedance;

Increase electric capacity to part or all of all resistance values on this frequency values lower than described target impedance of resistance value corresponding to frequency values in the curve of described power supply practical impedance.

5. the method that reduces source simultaneous switching noise according to claim 4, it is characterized in that, increase electric capacity in the curve of described power supply practical impedance partly or entirely resistance value corresponding to frequency values all, before the step of the resistance value on this frequency values, also comprise lower than described target impedance:

The transient current of computational load electric capacity;

According to described transient current and magnitude of a voltage fluctuation, calculate the target capacitance amount that increases electric capacity.

6. the method that reduces source simultaneous switching noise according to claim 4, it is characterized in that, increase electric capacity in the curve of described PDS impedance partly or entirely resistance value corresponding to frequency values all, before the step of the resistance value on this frequency values, also comprise lower than described target impedance:

Determine stabilized voltage supply frequency response range;

In described supply frequency responding range, calculate the maximum impedance of target capacitance amount;

Calculate the highest effective frequency corresponding to described target capacitance amount according to described maximum impedance;

Calculate frequency during higher than described the highest effective frequency required electric capacity as the target capacitance amount that increases electric capacity.

7. a device that reduces source simultaneous switching noise, is characterized in that, comprising:

Target computing module, for calculating the target impedance of power supply;

Impedance adjustment module, for regulate PDS in the impedance of each frequency range to all lower than described target impedance.

8. the device that reduces source simultaneous switching noise according to claim 7, is characterized in that, described target computing module comprises:

The first computing unit, for calculating target impedance according to following formula:

$Z_{T\arg \mathrm{et}}=\frac{\left(\mathrm{Power\; Supply\; Voltage}\right)\×\left(\mathrm{Ripple\; Tolerance}\right)}{\mathrm{Delta\; Current}},$

Wherein, Power supply voltage is supply voltage, Ripple tolerance is fluctuation range, maximum variable-current=Max delta current that Delta Current=electric current can reach, the variable-current of Max current=maximum adds quiescent current, the maximum variable-current of Max delta current=maximum current.

9. according to the device that reduces source simultaneous switching noise described in claim 7 or 8, it is characterized in that, described impedance adjustment module comprises:

Aim curve generation unit, for taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of target impedance;

Impedance curve generation unit, for taking frequency values as horizontal ordinate, resistance value is ordinate, generates the curve of PDS impedance;

Regulate performance element, for increasing electric capacity to part or all of all resistance values on this frequency values lower than described target impedance of resistance value corresponding to frequency values in the curve of described PDS impedance.