CN104102695B - 智能设备启动过程的数据处理方法及智能设备 - Google Patents
智能设备启动过程的数据处理方法及智能设备 Download PDFInfo
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- CN104102695B CN104102695B CN201410298614.2A CN201410298614A CN104102695B CN 104102695 B CN104102695 B CN 104102695B CN 201410298614 A CN201410298614 A CN 201410298614A CN 104102695 B CN104102695 B CN 104102695B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
- G06F12/0868—Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30047—Prefetch instructions; cache control instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1016—Performance improvement
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/46—Caching storage objects of specific type in disk cache
- G06F2212/461—Sector or disk block
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/46—Caching storage objects of specific type in disk cache
- G06F2212/466—Metadata, control data
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/6026—Prefetching based on access pattern detection, e.g. stride based prefetch
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Abstract
Description
Claims (16)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410298614.2A CN104102695B (zh) | 2014-06-26 | 2014-06-26 | 智能设备启动过程的数据处理方法及智能设备 |
TW103128992A TWI507987B (zh) | 2014-06-26 | 2014-08-22 | 智能設備啓動過程的資料處理方法及智能設備 |
US14/751,223 US9710283B2 (en) | 2014-06-26 | 2015-06-26 | System and method for pre-storing small data files into a page-cache and performing reading and writing to the page cache during booting |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410298614.2A CN104102695B (zh) | 2014-06-26 | 2014-06-26 | 智能设备启动过程的数据处理方法及智能设备 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104102695A CN104102695A (zh) | 2014-10-15 |
CN104102695B true CN104102695B (zh) | 2017-11-10 |
Family
ID=51670849
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201410298614.2A Active CN104102695B (zh) | 2014-06-26 | 2014-06-26 | 智能设备启动过程的数据处理方法及智能设备 |
Country Status (3)
Country | Link |
---|---|
US (1) | US9710283B2 (zh) |
CN (1) | CN104102695B (zh) |
TW (1) | TWI507987B (zh) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014201696A1 (zh) * | 2013-06-21 | 2014-12-24 | 华为技术有限公司 | 一种文件读取方法、存储设备及读取*** |
CN104375871B (zh) * | 2014-12-04 | 2018-01-09 | 福州瑞芯微电子股份有限公司 | 一种基于eMMC加速***开机的方法和装置 |
CN108399047B (zh) * | 2017-02-06 | 2022-11-29 | 中兴通讯股份有限公司 | 一种闪存文件***及其数据管理方法 |
CN109213526B (zh) * | 2017-06-30 | 2020-03-03 | 清华大学 | 用于确定处理器操作的方法及装置 |
US11042383B2 (en) * | 2018-02-03 | 2021-06-22 | Insyde Software Corp. | System and method for boot speed optimization using non-volatile dual in-line memory modules |
CN110855786B (zh) * | 2019-11-18 | 2022-07-29 | 天津联想协同科技有限公司 | 针对网络数据请求的处理方法、设备及计算机存储介质 |
US20220011746A1 (en) * | 2020-07-08 | 2022-01-13 | BWR Innovations LLC | Software Architecture and System for Delivering Selected Sanitation Protocols for Multiple Pathogens and Pests |
CN114625433B (zh) * | 2020-11-27 | 2024-05-07 | 北京字跳网络技术有限公司 | 应用程序启动方法和*** |
CN112559060A (zh) * | 2020-12-09 | 2021-03-26 | 珠海全志科技股份有限公司 | 基于文件pagecache预读加速开机启动的方法及装置 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19961499A1 (de) * | 1999-12-20 | 2001-07-05 | Ericsson Telefon Ab L M | Caching von Objekten in Platten-gestützten Datenbanken |
US8239354B2 (en) * | 2005-03-03 | 2012-08-07 | F5 Networks, Inc. | System and method for managing small-size files in an aggregated file system |
US8195760B2 (en) * | 2001-01-11 | 2012-06-05 | F5 Networks, Inc. | File aggregation in a switched file system |
US6766413B2 (en) * | 2001-03-01 | 2004-07-20 | Stratus Technologies Bermuda Ltd. | Systems and methods for caching with file-level granularity |
US6920533B2 (en) * | 2001-06-27 | 2005-07-19 | Intel Corporation | System boot time reduction method |
US7003646B2 (en) * | 2002-03-27 | 2006-02-21 | Hewlett-Packard Development Company, L.P. | Efficiency in a memory management system |
TW200828273A (en) * | 2006-12-28 | 2008-07-01 | Genesys Logic Inc | Hard disk cache device and method |
US8914579B2 (en) * | 2008-02-29 | 2014-12-16 | Panasonic Corporation | Access device, information recording device, controller, and information recording system |
US7853751B2 (en) * | 2008-03-12 | 2010-12-14 | Lsi Corporation | Stripe caching and data read ahead |
WO2011043845A1 (en) * | 2009-10-07 | 2011-04-14 | Qualcomm Incorporated | Method and apparatus for avoiding physical random access channel collisions |
CN101814038B (zh) * | 2010-03-23 | 2012-10-03 | 杭州顺网科技股份有限公司 | 一种加快计算机启动速度的方法 |
US9292329B2 (en) * | 2011-02-10 | 2016-03-22 | Microsoft Technology Licensing, Llc | Virtual switch interceptor |
CN102323888B (zh) * | 2011-08-11 | 2014-06-04 | 杭州顺网科技股份有限公司 | 一种无盘计算机启动加速方法 |
TWI514278B (zh) * | 2012-09-19 | 2015-12-21 | Ind Tech Res Inst | 開機之映像檔之大小縮減方法及運算裝置 |
US9280482B2 (en) * | 2012-12-13 | 2016-03-08 | Western Digital Technologies, Inc. | Methods and systems for provisioning a bootable image on to an external drive |
US9720698B2 (en) * | 2013-05-07 | 2017-08-01 | Insyde Software Corp. | Method and device for increased boot sequence speed using a cache in non-volatile memory |
KR102094163B1 (ko) * | 2013-08-28 | 2020-03-27 | 삼성전자 주식회사 | 하이브리드 캐시 기반의 메모리 시스템에서 캐시를 관리하는 장치 및 방법과, 그 메모리 시스템 |
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2014
- 2014-06-26 CN CN201410298614.2A patent/CN104102695B/zh active Active
- 2014-08-22 TW TW103128992A patent/TWI507987B/zh active
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2015
- 2015-06-26 US US14/751,223 patent/US9710283B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN104102695A (zh) | 2014-10-15 |
US20150378745A1 (en) | 2015-12-31 |
TWI507987B (zh) | 2015-11-11 |
US9710283B2 (en) | 2017-07-18 |
TW201601064A (zh) | 2016-01-01 |
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Effective date of registration: 20200403 Address after: No.1, Duhang 1st Road, Hsinchu City, Hsinchu Science Park, Taiwan, China Patentee after: MEDIATEK Inc. Address before: Taiwan Hsinchu County Tai Yuan Street China jhubei City, No. 26 4 floor 1 Patentee before: MStar Semiconductor, Inc. |
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Effective date of registration: 20220519 Address after: Ontario, Canada Patentee after: Xueshan Technology Co.,Ltd. Address before: No.1, Duhang 1st Road, Hsinchu City, Hsinchu Science Park, Taiwan, China Patentee before: MEDIATEK Inc. |