CN104090847B - Address distribution method of solid-state storage device - Google Patents
Address distribution method of solid-state storage device Download PDFInfo
- Publication number
- CN104090847B CN104090847B CN201410290432.0A CN201410290432A CN104090847B CN 104090847 B CN104090847 B CN 104090847B CN 201410290432 A CN201410290432 A CN 201410290432A CN 104090847 B CN104090847 B CN 104090847B
- Authority
- CN
- China
- Prior art keywords
- request
- passage
- weights
- read
- write
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Memory System (AREA)
Abstract
The invention discloses an address distribution method of a solid-state storage device, belongs to the field of solid-stage storage, and aims at solving the problem of conflict of read and write requests in the existing distribution strategy and the problem that the request response time is prolonged under the read and write request mixed workload. The address distribution method is applicable to a multi-channel solid-stage storage device based on flash memory. The method comprises the steps of distributing weights of a channel, distributing physical addresses, and building a conflict prediction and avoiding mechanism. According to the address distribution method of the solid-stage storage device, different weights are distributed to read and write requests and garbage recovery operation; the weights can be adjusted according to user requirements in order to adapt to different read and write performance requirements, and the parallelism in the solid-stage storage device can be fully utilized; a proper physical address is selected for the write request according to the load condition, thus the conflict between write and read can be decreased, and the block of the garbage recovery operation to the write request is reduced; the read and write response time of the solid-state storage device is decreased, and the performances of the solid-stage storage device are improved.
Description
Technical field
The invention belongs to solid state storage technologies field, more particularly, to a kind of solid storage device
Address distribution method.
Background technology
Solid storage device is the novel computer storage device that a class is different from mechanical hard disk.With tradition
Hard disk is compared, and solid storage device based on flash memory has high density, low energy consumption, noiselessness, antidetonation
The feature such as dynamic, it has relatively low read-write time delay and higher throughput simultaneously.
Due to flash media, solid storage device based on flash memory also has the disadvantage that
(1) first wipe and write afterwards: flash media can not update on the spot when writing data, need first to target
The physical block of address carries out erasing operation, carries out the renewal of data the most again.Erasing operation and read-write behaviour
The ultimate unit made is different, erasing operation in units of physical block, read-write operation in units of Physical Page,
A usual physical block includes 64 or 128 Physical Page.
(2) reading and writing and the speed difference of erasing operation: in flash media, during the read operation of single
Between be about 15-50 μ s, the write operation time is about 200 μ s, and the erasing operating time is about 50ms.Read-write
The difference of speed can bring the obstructing problem of read operation, when read request arrives after write request, by
Process the time in longer write request, read request can be caused to wait a longer time.Erasing operation
Time-consuming long, subsequent request can be caused to wait as long for.
(3) service life of flash memory: the life-span of flash memory granule is secondary by Program/Erase (program/erase)
Number calculate, the life-span of MLC (full name, multi-level cell memory flash memory) typically at 1000-10000 time,
SLC (full name, single-order memory element flash memory) is then at about 100,000 times.
In order to make full use of the speed advantage of flash chip, and solve the problem that flash chip exists,
In solid storage device, add a flash translation layer (FTL).Flash translation layer (FTL) mainly provides address to map,
Garbage reclamation and 3 functions of abrasion equilibrium.Address mapping is the core of flash translation layer (FTL), and it passes through
One mapping table provides logical address to the mapping of physical address.The effect of garbage reclamation is to reclaim solid-state
Inefficacy page in storage device, merges the physical block arranged as clean, increases the free space of equipment.
Abrasion equilibrium is used for ensureing the equilibrium of erasing times between each physical block in solid storage device, it is ensured that
The life-span of solid storage device and reliability.The function such as garbage reclamation and abrasion equilibrium is dependent on address
Mapping table realizes.
Solid-state storage based on flash memory is generally made up of multiple autonomous channels, and each passage connects many sudden strains of a muscle
Depositing chip, chip internal can be divided into again wafer, packet, block and page.The read or write speed of single chips,
The transmission speed of single passage is the most limited, in order to improve the performance of solid storage device as far as possible, just
Need sufficiently to utilize the concurrency of passage and chip chamber.
In solid storage device, address distribution refers to as needing the logical page (LPAGE) writing in equipment to determine the free time
Physical Page, according to select Physical Page scope be broadly divided into static allocation mode, the dynamic method of salary distribution and
Mixed ways of distribution.The utilization to the concurrency within solid storage device of the different address distribution
Mode is different, so having opposite impacts on performance.Under normal conditions, static allocation mode
Reading performance be better than the dynamic method of salary distribution, and write performance is poorer than the dynamic method of salary distribution.
In static allocation mode, passage that logical page (LPAGE) is assigned to specify by the rule pre-defined,
In chip, wafer, packet.According to the difference of allocation rule, multiple different static state can be divided into divide
Formula formula, according to the permutation and combination order that<passage, chip, wafer, packet>is different, can arrange
Become 24 kinds of different static allocation modes.
In the dynamic method of salary distribution, logical page (LPAGE) can all of free physical page in selection equipment.Comprehensively
Consider passage, chip, wafer, the busy of packet, the factor such as the degree of wear of physical block, the most really
The particular location of fixed distribution.Use the complete dynamic method of salary distribution, can effectively improve write performance, allow
Write request obtains response in relatively short period of time.
Mixed ways of distribution combines static allocation mode and the feature of the dynamic method of salary distribution, passage, core
Sheet, wafer, the distribution portion of 4 levels of packet use static rule to specify, and part is by DP
Specify.Such as static distribution passage, distribute chip, wafer, packet etc. dynamically according to busy.
At present, static address distribution is extensively applied in solid storage device, and static address distribution is permissible
Preferable streamability is provided, but the poor-performing of random read-write.Request is assigned to solid-state storage
The particular location of device interior, is calculated by the logical address asked, when request logical address with
During machine distribution, it may appear that ask the contention to resources such as solid storage device inner passages in a large number, cause
In some passage, request is the most intensive, and some channel request is less even without request access.Especially
It is that its Data Position accessed of read request determines according to address, during write request active channel resource, reads
Request response time constantly rises, and the performance of solid storage device is remarkably decreased.
Dynamic address allocation can improve the write performance of solid storage device, but can not effectively reduce
Conflict between read-write requests, the distribution of reading performance relatively static address reduces.
Summary of the invention
For disadvantages described above or the Improvement requirement of prior art, the invention provides a kind of based on right of way
The address distribution method of value, its object is to realize read-write requests scheduling, fully profit inside solid-state disk
By the concurrency within solid storage device, thus solve the solid storage device work in read-write mixing
The hydraulic performance decline that in environment, its internal resource contention is caused by read-write requests.
For achieving the above object, the invention provides the address distribution method of a kind of solid storage device,
Described method comprises the steps:
(1) request receiving step: solid storage device receives the read-write sent by topmost paper system
Request, judges the request type received and operates accordingly, if write request, the most directly
Connect and request is joined request queue tail of the queue, wait pending;If read request, then patrolling according to request
Collecting address search mapping table and obtain the physical address of its correspondence, can be calculated according to physical address please
Seek corresponding channel information, anticipate the weights that read request is corresponding, according to known channel information,
Add the weights of read operation to corresponding passage, and this request is joined request queue tail of the queue, wait
Process;
(2) request queue processes step: solid storage device is untreated to leaving in request queue
Request uses the mode of first in first out to process, and carries out address distribution successively;
(3) read request allocation step: if the request from request queue taking-up is read request, according to request
Receiving step is searched information known to mapping table, request is joined the channel queue of respective channel
Afterbody, waits pending;
(4) write request allocation step: if the request from request queue taking-up is write request, then according to each
The weights size of individual passage, compares and obtains the passage that weights are minimum, and select according to chip busy information
Chip, wafer, packet, physical block and the Physical Page that this write request is corresponding, and thus calculate correspondence
Physical address;Request is joined the afterbody of the channel queue of respective channel, change respective channel
Weights, wait pending;
(5) channel queue processes step: flash controller takes out request from channel queue, and according to
Processed by request receiving step and request queue step obtains request physical address, request size,
Request type information, operates accordingly to flash chip, reads corresponding data information from flash memory
Maybe the data that request is carried are written in the flash memory Physical Page that its physical address is corresponding;Work as flash chip
Read-write operation complete after, flash controller has returned information to solid state disk controller, and according to please
The weights of the Type Change respective channel asked;In passage, read operation completes, and the weights of respective channel deduct
Read operation weights, write operation completes, and the weights of respective channel deduct write operation weights;
(6) garbage reclamation processes step: when triggering garbage collection operation, for carrying out garbage collection operation
Passage plus garbage collection operation weights, after garbage collection operation completes, the weights of respective channel
Deduct the weights of garbage collection operation.
In one embodiment of the invention, described request receiving step specifically includes:
(1.1) solid storage device receives topmost paper system or the reading of solid storage device caching generation
Write request, described read-write requests includes at least logical page address, request size, read-write operation information,
Carry out sub-step (1.2);
(1.2) size asking size whether to be more than a Physical Page, if being more than, rotor step are judged
(1.3);Otherwise rotor step (1.4);
(1.3) calculate number of physical pages n that this request needs to take, be divided into n request, often
The corresponding Physical Page of individual request, rotor step (1.4);
(1.4) action type of request is judged, if write request, rotor step (1.7);If reading
Request, rotor step (1.5);
(1.5) look into mapping table according to the logical address of read request and obtain the physical address of correspondence, by physics
Address understand this request corresponding to passage i, chip, a certain channel number in i correspondence solid storage device,
Rotor step (1.6);
(1.6) passage i respective channel weights W is calculatedi=Wi+WR, WRFor read request weights, rotor
Step (1.7);
(1.7) request is sequentially added the afterbody of request queue.
In one embodiment of the invention, described request queue process step specifically includes:
(2.1) inquiry request quene state, it is judged that whether request queue is empty, is then rotor step
(2.3), otherwise rotor step (2.2);
(2.2) read request queue team head request, classifies according to action message, if read request,
Go to step (3);If write request, go to step (4).
In one embodiment of the invention, described read request allocation step specifically includes: from request team
Lining up head and take out read request, the channel number i corresponding by checking in request in sub-step (1.5), this being read please
Seek addition passage i queue tail, go to step (5).
In one embodiment of the invention, described write request allocation step specifically includes:
(4.1) take out write request from request queue team head, carry out sub-step (4.2);
(4.2) write attribute after first being wiped from flash memory, write request needs free physical page to store,
Relatively each passage weights Wi, find in passage j, the j correspondence now solid storage device of weights minimum
The passage that weights are minimum, rotor step (4.3);
(4.3) judge whether flash translation layer (FTL) supports that chip selects, if supporting, rotor step (4.4);
If not supporting, this write request is added passage j queue tail, rotor step (4.5);
(4.4) chip chip selection signal R/B under poll searches this passage, finds free chip die k, if all
Chip is the most idle, then select the chip k of first inquiry, determines the chip k that request will write,
This write request is added passage j queue tail, rotor step (4.5)
(4.5) passage j passage weights Wj=Wi+WW, WWFor write request weights, go to step (5)
In one embodiment of the invention, described channel queue process step specifically includes:
(5.1) inquire about channel queue successively, if passage i queue is empty, goes to step (6) and continue to look into
Ask next passage, if not empty, rotor step (5.2);
(5.2) read channel queue's head request, obtain information, rotor step (5.3);
(5.3) request for the treatment of channel queue team head, if read request, rotor step (5.4);If
For write request, rotor step (5.5);
(5.4) according to the physical address of read request, the data in the Physical Page that physical address is corresponding are taken out,
And be sent to upper layer application, after read operation completes, update chip chip selection signal R/B, by this request from
Channel queue deletes, now Wi=Wi-WR, rotor step (5.1);
(5.5) according to known write request passage, chip information, the idle thing of correspondence is write data into
In reason page, after write operation completes, update chip chip selection signal R/B, by this request from channel queue
Delete, now Wi=Wi-WW, rotor step (5.1).
In one embodiment of the invention, described channel queue process step specifically includes:
(6.1) according to passage i free physical page ratio, it may be judged whether need to carry out garbage collection operation,
If being made without garbage collection operation, rotor step (2.1), if desired carry out garbage collection operation,
Rotor step (6.2);
(6.2) garbage collection operation in passage, passage i passage weights W are performedi=Wi+WGC, WGC
For garbage reclamation weights, rotor step (6.3);
(6.3) garbage collection operation completes, passage i passage weights Wi=Wi-WGC, go to step (5).
In general, by the contemplated above technical scheme of the present invention compared with prior art, have
Following beneficial effect:
(1) compare traditional static allocation mode and the dynamic method of salary distribution, the present invention adds passage
Weights.Passage weights can characterize the busy degree of passage, when there being write request to arrive, and can be according to logical
The comparison of road weights, selects suitable channel allocation to ask, makes full use of interchannel concurrency.
(2) present invention is when carrying out garbage collection operation, for respective channel plus garbage collection operation
Weights, write request processes step and can compare according to passage weights, reasonably avoids garbage collection operation
With write request operation conflict, for write request distribute suitable passage, reduce write request response time.
(3) present invention adds channel queue at read request entrance solid storage device rather than read request
Time, the passage giving request corresponding adds corresponding read operation weights WR, by the step for weights
Operation, improve the priority of this read request, reduce the possibility that this read request is blocked by write request
Property, decrease the conflict of read-write operation, such that it is able to improve the performance of solid storage device, reduce and read
The response time of write request.
(4) by the first in first out strategy of channel queue, the present invention ensures that read-write requests can be in a timing
Interior processed, without occurring that read request or write request are blocked for a long time, it is ensured that read-write requests
Fairness.By setting and the polling mechanism of weights, also ensure that write request is at each interchannel
Be uniformly distributed.Make the average distribution of data in each channel, it is ensured that the concurrency of read request and
Performance, makes the degree of wear of physical block in each passage keep in balance simultaneously.
(5) the self-defined read-write of working environment that the present invention can reasonably use according to solid storage device
The weights W of operationR、WW, thus control the priority of read-write operation, to adapt to the read-write of requirement difference
The working environment of response time.WRWith WWRatio is the highest, then read request priority is the highest, otherwise then
Write request priority is the highest.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of the address distribution method of solid storage device of the present invention;
Fig. 2 is the schematic flow sheet asking receiving step in one embodiment of the invention;
Fig. 3 is the schematic flow sheet that in one embodiment of the invention, request queue processes step;
Fig. 4 is the schematic flow sheet of read request allocation step in one embodiment of the invention;
Fig. 5 is the schematic flow sheet of write request allocation step in one embodiment of the invention;
Fig. 6 is the schematic flow sheet that in one embodiment of the invention, channel queue processes step;
Fig. 7 is the schematic flow sheet of garbage collection operation step in one embodiment of the invention.
Detailed description of the invention
In order to make the purpose of the present invention, technical scheme and advantage clearer, below in conjunction with accompanying drawing
And embodiment, the present invention is further elaborated.Should be appreciated that described herein specifically
Embodiment only in order to explain the present invention, is not intended to limit the present invention.Additionally, it is disclosed below
Just may be used as long as technical characteristic involved in each embodiment of the present invention does not constitutes conflict each other
To be mutually combined.
In order to be expressly understood the present invention, below relevant concept is explained:
Nand flash memory chip: flash chip technology was invented by Toshiba in 1984, is a kind of electricity
Minor can clear program read only memory, its feature is simple for structure, the quasiconductor of unit are
Interior can realize considerable memory data output.Can not be with bit when the side effect that this structure is brought is erasable
For unit, and can only operate on a large scale in units of physical block.
Flash controller: the data that management is stored in flash chip, and access interface is provided.
Passage: connecting flash controller and flash chip in solid storage device, each passage is by many
Individual chip forms;
Physical block: the memory area of flash chip, comprises several physical blocks in each flash chip,
Comprising the Physical Page of constant number in each physical block, physical block is also the ultimate unit of erasing operation;
Physical Page: the minimum memory unit of flash chip, Physical Page is the base for write request Resources allocation
Our unit, according to the difference of flash technology, the physical page size of different chips is different;
Logical page address: describe the general mechanism of data place block on computer memory device, refer to certain
Data block pointed by the address of individual data block or certain address, can be changed by flash translation layer (FTL)
To physical address;
Free physical page: in solid storage device, Physical Page does not the most use, when i.e. it does not has data,
This Physical Page is free physical page, may be used for the distribution of write request and garbage collection operation;
Mapping table: be the data knot preserving one-to-one relationship between logical page address and physical page address
Structure.
Garbage reclamation: the valid data that the process of garbage reclamation is usually in the physical block first will chosen turn
Move on in other physical block, then it is implemented erasing operation.It is, by erasing, there is more invalid number
According to physical block reclaim Physical Page.
Request queue: being used for depositing the queue of pending request in solid storage device, this queue is first
Enter first dequeue;
Channel queue: be used in solid storage device depositing from request queue, through flash translation layer (FTL)
Distributing to the request of each passage, this queue is fifo queue;
Read request weights WR: read a number of physical pages according to solid storage device and take according to the required time
Value, it is possible to user's job demand is self-defined;
Write request weights WW: take according to the required time according to one number of physical pages of solid storage device write
It is worth and needs self-defined also dependent on user job.Read-write weights ratio is the highest, then read request priority is more
Height, on the contrary then write request priority is the highest;
Garbage reclamation weights WGC: according to the time value carried out in passage needed for garbage collection operation,
Need self-defined also dependent on user job;
Passage weights: by the read-write requests state in channel queue, unite according to read-write requests weight computing
Count out now corresponding for passage i weights Wi, Wi and can represent channel status now perception future one
Passage busy extent in the section time.
The address distribution method of a kind of solid storage device provided by the present invention, uses mixed allocation side
Formula, is more dynamically obtained destination channel by weight computing, each chip R/B connected by sense channel
Signal busy selects chip.This mode is applicable to solid storage device based on flash memory, as it is shown in figure 1,
The inventive method includes asking reception, request queue process, read request distribution, write request distribution, leading to
Road queue processing and the step of garbage collection operation, including:
(1) request receiving step: solid-state disk storage device receives the reading sent by topmost paper system
The information such as write request, wherein comprises the logical address of request, asks size, read-write operation, equipment pair
Read-write requests uses different process strategies, judges the request type received and carries out corresponding
Operation, if write request, then directly joins request queue tail of the queue by request, waits pending, if
Read request, then search mapping table according to the logical address of request and obtain the physical address of its correspondence, according to
Physical address can be calculated the channel information that request is corresponding, anticipates the weights that read request is corresponding,
According to known channel information, add the weights of read operation to corresponding passage, and this request is added
To request queue tail of the queue, wait pending;
(2) request queue processes step: request queue is the interface of solid-state disk and upper strata, the most untreated
Request all to will be stored in request queue medium pending, request queue uses first-in first-out design,
Request in queue carries out address distribution successively;
(3) read request allocation step: request queue uses fifo queue, and solid state disk controller takes
Go out the request of request queue team head, read-write requests is used different allocation strategies;If from request queue
The request taken out, searches information known to mapping table according in request receiving step, will ask from request
Queue team head takes out, and joins the afterbody of the channel queue of respective channel, waits pending;
(4) write request allocation step: if the request from request queue taking-up is write request, then according to each
The weights size of individual passage, compares and obtains the passage that weights are minimum, and according to information choosings such as chip busy
Select chip corresponding to this write request, wafer, packet, physical block and Physical Page, and thus calculate right
The physical address answered;Request is taken out from request queue team head, joins the channel queue of respective channel
Afterbody, change respective channel weights, wait pending;
(5) channel queue processes step: flash controller takes out request from channel queue, and according to
Processed by request receiving step and request queue step obtains request physical address, request size,
The information such as request type, operate accordingly to flash chip, read respective counts and it is believed that from flash memory
The data that request is carried maybe are written in the flash memory Physical Page that its physical address is corresponding by breath;When flash memory core
After the read-write operation of sheet completes, flash controller has returned information to solid state disk controller, and according to
The weights of the Type Change respective channel of request;In passage, read operation completes, and the weights of respective channel subtract
Removing read operation weights, write operation completes, and the weights of respective channel deduct write operation weights;
(6) garbage reclamation processes step: when triggering garbage collection operation, for carrying out garbage collection operation
Passage plus garbage collection operation weights, the garbage collection operation time is longer, and weights arrange relatively big,
Reduce write request and distribute the priority to this passage, after garbage collection operation completes, respective channel
Weights deduct the weights of garbage collection operation.
Operation in detail to each step below is specifically described,
(1) request receiving step, concrete as in figure 2 it is shown, include following sub-step:
(1.1) solid storage device receives topmost paper system or the reading of solid storage device caching generation
Write request, described read-write requests includes at least logical page address, request size, read-write operation information,
Carry out sub-step (1.2);
(1.2) size asking size whether to be more than a Physical Page, if being more than, rotor step are judged
(1.3);Otherwise rotor step (1.4);
(1.3) calculate number of physical pages n that this request needs to take, be divided into n request, often
The corresponding Physical Page of individual request, rotor step (1.4);
(1.4) action type of request is judged, if write request, rotor step (1.7);If reading
Request, rotor step (1.5);
(1.5) look into mapping table according to the logical address of read request and obtain the physical address of correspondence, by physics
Address understand this request corresponding to passage i (a certain channel number in i correspondence solid storage device), core
Sheet, rotor step (1.6);
(1.6) passage i respective channel weights W is calculatedi=Wi+WR, rotor step (1.7);
(1.7) request is sequentially added the afterbody of request queue, goes to step (2);
(2) request queue processes step, concrete as it is shown on figure 3, include following sub-step:
(2.1) inquiry request quene state, it is judged that whether request queue is empty, is then rotor step
(2.3), otherwise rotor step (2.2);
(2.2) read request queue team head request, classifies according to action message, if read request,
Go to step (3);If write request, go to step (4);
(2.3) terminate;
(3) read request allocation step, the most as shown in Figure 4, including following sub-step:
(3.1) read request is taken out from request queue team head, by sub-step (1.5) checks in request correspondence
Channel number i, by this read request add passage i queue tail, go to step (5);
(4) write request allocation step is concrete as it is shown in figure 5, include following sub-step:
(4.1) take out write request from request queue team head, carry out sub-step (4.2);
(4.2) write attribute after first being wiped from flash memory, write request needs free physical page to store,
Relatively each passage weights Wi, find the passage j of weights minimum (in j correspondence now solid storage device
The passage that weights are minimum), rotor step (4.3);
(4.3) judge whether flash translation layer (FTL) supports that chip selects, if supporting, rotor step (4.4);
If not supporting, this write request is added passage j queue tail, rotor step (4.5);
(4.4) chip chip selection signal R/B under poll searches this passage, finds free chip die k, if all
Chip is the most idle, then select the chip k of first inquiry, determines the chip k that request will write,
This write request is added passage j queue tail, rotor step (4.5)
(4.5) passage j passage weights Wj=Wi+WW, go to step (5);
(5) channel queue processes step, and the most as shown in Figure 6, its sub-step is as follows:
(5.1) inquire about channel queue successively, if passage i queue is empty, goes to step (6) and continue to look into
Ask next passage, if not empty, rotor step (5.2);
(5.2) read channel queue's head request, obtain information, rotor step (5.3);
(5.3) request for the treatment of channel queue team head, if read request, rotor step (5.4);If
For write request, rotor step (5.5);
(5.4) according to the physical address of read request, the data in the Physical Page that physical address is corresponding are taken out,
And be sent to upper layer application, after read operation completes, update chip chip selection signal R/B, by this request from
Channel queue deletes, now Wi=Wi-WR, rotor step (5.1);
(5.5) according to known write request passage, chip information, the idle thing of correspondence is write data into
In reason page, after write operation completes, update chip chip selection signal R/B, by this request from channel queue
Delete, now Wi=Wi-WW, rotor step (5.1);
(6) garbage reclamation processes step, concrete as it is shown in fig. 7, its sub-step is as follows:
(6.1) according to passage i free physical page ratio, it may be judged whether need to carry out garbage collection operation,
If being made without garbage collection operation, rotor step (2.1), if desired carry out garbage collection operation,
Rotor step (6.2);
(6.2) garbage collection operation in passage, passage i passage weights W are performedi=Wi+WGC, rotor
Step (6.3);
(6.3) garbage collection operation completes, passage i passage weights Wi=Wi-WGC, go to step (5);
Below in conjunction with specific embodiment, the solution of the present invention is described, the solid storage device in the present embodiment
Physical capacity is 512GB, has 4 passages in equipment, and each passage connects 4 32GB flash memory cores
Sheet.As a example by MT29F256G08CJAAB chip, in chip, physical page size is 8KB, each
256 Physical Page, every 2048 physical blocks, one packet of composition, two packets are comprised inside physical block
It is encapsulated as a wafer, four wafer one chips of composition.
Continuous print write request:
When the request in request queue is continuous print write request, according to write request allocation step (4.2)
Flash controller inquires about the weights of more each passage, and now passage weights are by being arranged with one from small to large
Fixing order, such as passage 1 < passage 2 < passage 3 < passage 0.According to the present invention program, will request
Write request in queue is sequentially allocated passage 1, passage 2, passage 3, in the queue of passage 0, increases
Add the weights of respective channel and found the chip of free time by chip selection signal.Writing because of each passage please
Asking addition, the weights comparative sequence of each passage will not change, and write request is evenly distributed in logical in order
In road 1,2,3,0, when read request accesses these continuous datas, can read according to channel sequence, fully
Utilize the concurrency between solid storage device inner passage.
Random write request:
When the request in request queue is random write request, the present invention program processing mode is with continuous
Write request the same, make random write performance suitable with continuous write performance.
Continuous print read request:
When the request in request queue is continuous print read request, according to request receiving step (1.5),
Flash controller is looked into mapping table according to read request logical address (lpn) and is obtained the physical address of correspondence.By
In read request the physical address asked it has been determined that read request is assigned to correspondence passage in, etc.
Pending.Data majority corresponding to continuous print read request is the data being originally continuously written into.According to this
Scheme of the invention, its data have been evenly distributed in each passage and chip, and continuous read request also can be filled
Divide the concurrency utilizing equipment.
Random read request:
Similar with continuous print read request processing mode.If the data that read request is asked are at one continuously
Solid storage device it is sent to, then process the principle of random write request according to this programme in time period,
These data also can be evenly distributed in each passage and chip.If it is not, be then likely to occur random
The data asked of read request be distributed in the situation in even one chip of a passage, now, after
Continuous request needs to wait that request above completes, it is impossible to utilize the concurrency of flash memory device, equipment
Overall performance declines.
The request of read-write mixing:
The situation that write request is more:
When read-write mixing request occurs in request queue, according to the step of patent of the present invention.Assume this
Shi Suoyou passage be all idle condition, i.e. passage weights be all 0.Now, write request 1,2,3,4,
5 sequentially enter request queue, and write request 1,2,3,4 is distributed serially in passage 0,1,2,3,
Being written in the flash chip of correspondence Deng pending data, now passage weights W0, W1, W2, W3 are
Plus corresponding write request weights WW.Now read request 1,2 enters request queue, according to read request
Logical address, directly search mapping table and obtain the physical address of correspondence, physical address calculate
Request data respective channel 0 and passage 1, now to passage 0, passage 1 weights W1, W2 are plus right
The read request weights W answeredRFor WW+WR.Now channel queue's request foremost is write request 5,
Judging step (2) according to request, request type is write request, goes to step (4).Step (4.2)
The weights W of the more each passage of polling ratio, finds the passage 2 that now passage weights are minimum, and this is asked
It is assigned in the request queue of passage 2.The now weights W2=W of passage 2W+WW.Continue with
Read request 1,2, write request 5 is assigned in passage 2, and read request 1,2 can be assigned directly to passage
0,1 is medium pending, and is finished without waiting for write request 5, causes read request response time
Increase.
The situation that read request is more:
When read-write mixing request occurs in request queue, according to the step of patent of the present invention.Assume this
Time channel queue in request distribution as follows: read request 1,2,3,4, write request 1, read request 6,7,
8, write request 2, read request 9,10,11,12,13,14,15,16.Now, according to repeatedly
The calculating of step (1.6), when write request 1 is in request queue team head, enters step (4), logical
Road weights W0 to W3 is respectively 5*WR、3*WR、1*WRAnd 8*WR, now passage 2 is right
Answer the minimum 1*W of weights W2R, according to step (4.2), write request 1 is distributed to passage 2, and
Add channel queue 2, by step (4.5) W2=1*WR+WW.Now continuing with follow-up reading please
Asking 6,7,8 to arrive request queue team head until write request 2, at this moment read request 1,2,3,4 is the completeest
Becoming, the weights of passage 0 to 3 are respectively 4*WR、3*WR, Ww and 7*WR, now basis
Step (4.2), obtains the passage 1 that now weights are minimum, and weights are 3*WR.Write request 2 is distributed
To passage 1, now passage 1 weights W1=3*WR+Ww。
Garbage collection operation:
In passage i being detected, free physical page is not enough, when carrying out garbage collection operation, and now passage i
Weights are plus the weights W of garbage collection operationGC.If now there being write request to access solid storage device,
According to sub-step (4.2), controller can judge according to weights, minimum the leading to of selector channel weights
Road, if there being the weights weights less than passage i of other passages, this write request will not distribute to passage i,
Write request need not wait that garbage collection operation completes, and effectively reduces the response time of write request.
Extreme case:
In mixing request queue, read request continuous print reads the data of same passage, makes this passage
Weights keep a higher value, and now flash controller is when distributing write request, will not ask writing
Asking and be assigned in this passage, avoid the obstruction between read-write requests in this passage, reducing read-write please
The delay asked, but reduce and be available for distributing to the port number of write request, reduce inside solid storage device
Interchannel concurrency, makes the resource of solid storage device can not get sufficiently and utilizes.This also can simultaneously
Affect the abrasion equilibrium of whole solid storage device.
Compared with static allocation mode, the present invention program can select allocated the leading to of write request flexibly
Road, and the setting and read request by weights is certain to the priority treatment guarantee read request response of weights
Degree of priority, and reduce the interference that each passage read-write requests is mutual, reduce between read-write requests
Obstruction, reduce solid storage device read-write response time.
In the present invention program, request queue and channel queue are all first in first out (FIFO) queue, respectively
The process request of channel parallel, is indifferent in the order between each request, request queue and channel queue
Request order performs.
As it will be easily appreciated by one skilled in the art that and the foregoing is only presently preferred embodiments of the present invention,
Not in order to limit the present invention, all made within the spirit and principles in the present invention any amendment, etc.
With replacement and improvement etc., should be included within the scope of the present invention.
Claims (7)
1. the address distribution method of a solid storage device, it is characterised in that described method comprises the steps:
(1) request receiving step: solid storage device receives the read-write requests sent by topmost paper system, the request type received is judged and operates accordingly, if write request, then directly request is joined request queue tail of the queue, wait pending;If read request, then search mapping table according to the logical address of request and obtain the physical address of its correspondence, can be calculated, according to physical address, the channel information that request is corresponding, anticipate the weights that read request is corresponding, i.e. read request weights WR, according to known channel information, give corresponding passage plus read request weights WR, and this request is joined request queue tail of the queue, wait pending;Described read request weights WRIt is according to required time value according to solid storage device one number of physical pages of reading, or is needed by user job self-defined;
(2) request queue processes step: solid storage device uses the mode of first in first out to process to leaving untreated request in request queue in, carries out address distribution successively;
(3) read request allocation step: if the request from request queue taking-up is read request, searches channel information known to mapping table according in request receiving step, request is joined the afterbody of the channel queue of respective channel, waits pending;
(4) write request allocation step: if the request from request queue taking-up is write request, then according to the passage weights size of each passage, relatively obtain the passage that weights are minimum, and select corresponding chip, wafer, packet, physical block and the Physical Page of this write request according to chip busy information, and thus calculate the physical address of correspondence;Request is joined the afterbody of the channel queue of respective channel, the passage weights of change respective channel, its Wj=Wi+WW, wait pending;Wherein, described passage weights refer to, by the read-write requests state in channel queue, count now corresponding for passage i weights Wi, Wi according to read-write requests weight computing and can represent channel status now the passage busy extent in perception a period of time in future;WWFor write request weights, refer to that writing a number of physical pages according to solid storage device according to required time value or needs self-defined according to user job;
(5) channel queue processes step: flash controller takes out request from channel queue, and according to being processed request physical address, request size, the request type information obtained in step by request receiving step and request queue, flash chip is operated accordingly, from flash memory, reads corresponding data information maybe the data that request is carried are written in the flash memory Physical Page that its physical address is corresponding;After the read-write operation of flash chip completes, flash controller has returned information, and the passage weights of the Type Change respective channel according to request to solid state disk controller;In passage, read operation completes, and the passage weights of respective channel deduct read request weights, and write operation completes, and the passage weights of respective channel deduct write request weights;
(6) garbage reclamation processes step: according to passage i free physical page ratio, it may be judged whether need to carry out garbage collection operation, when triggering garbage collection operation, for carrying out the passage of garbage collection operation plus garbage reclamation weights WGC, after garbage collection operation completes, the passage weights of respective channel deduct garbage reclamation weights WGC;Described garbage reclamation weights WGCRefer to according to the time value carried out in passage needed for garbage collection operation, or need self-defined according to user job.
2. the method for claim 1, it is characterised in that described request receiving step specifically includes:
(1.1) solid storage device receives topmost paper system or the read-write requests of solid storage device caching generation, and described read-write requests, including at least logical page address, request size, read-write operation information, carries out sub-step (1.2);
(1.2) size asking size whether to be more than a Physical Page, if being more than, rotor step (1.3) are judged;Otherwise rotor step (1.4);
(1.3) calculate number of physical pages n that this request needs to take, be divided into n request, the corresponding Physical Page of each request, rotor step (1.4);
(1.4) action type of request is judged, if write request, rotor step (1.7);If read request, rotor step (1.5);
(1.5) look into mapping table according to the logical address of read request and obtain the physical address of correspondence, physical address understand the passage i corresponding to this request, chip, a certain channel number in i correspondence solid storage device, rotor step (1.6);
(1.6) passage i respective channel weights W is calculatedi=Wi+WR, WRFor read request weights, rotor step (1.7);
(1.7) request is sequentially added the afterbody of request queue.
3. method as claimed in claim 1 or 2, it is characterised in that described request queue processes step and specifically includes:
(2.1) inquiry request quene state, it is judged that whether request queue is empty, is then rotor step (2.3), otherwise rotor step (2.2);
(2.2) read request queue team head request, classifies according to action message, if read request, goes to step (3);If write request, go to step (4).
4. method as claimed in claim 1 or 2, it is characterized in that, described read request allocation step specifically includes: take out read request from request queue team head, the channel number i corresponding by checking in request in sub-step (1.5), this read request is added passage i queue tail, goes to step (5).
5. method as claimed in claim 1 or 2, it is characterised in that described write request allocation step specifically includes:
(4.1) take out write request from request queue team head, carry out sub-step (4.2);
(4.2) write attribute after first being wiped from flash memory, write request needs free physical page to store, and compares each passage weights Wi, the passage of weights minimum, rotor step (4.3) in the corresponding now solid storage device of passage j, j finding weights minimum;
(4.3) judge whether flash translation layer (FTL) supports that chip selects, if supporting, rotor step (4.4);If not supporting, this write request is added passage j queue tail, rotor step (4.5);
(4.4) chip chip selection signal R/B under poll searches this passage, finds free chip die k, if all chips are the most idle, then select the chip k of first inquiry, determine the chip k that request will write, this write request is added passage j queue tail, rotor step (4.5);
(4.5) passage j passage weights Wj=Wi+WW, WWFor write request weights, go to step (5).
6. method as claimed in claim 1 or 2, it is characterised in that described channel queue processes step and specifically includes:
(5.1) inquire about channel queue successively, if passage i queue is empty, goes to step (6) and continue to inquire about next passage, if not empty, rotor step (5.2);
(5.2) read channel queue's head request, obtain information, rotor step (5.3);
(5.3) request for the treatment of channel queue team head, if read request, rotor step (5.4);If write request, rotor step (5.5);
(5.4) according to the physical address of read request, take out the data in the Physical Page that physical address is corresponding, and be sent to upper layer application, after read operation completes, update chip chip selection signal R/B, this request is deleted from channel queue, now Wi=Wi-WR, rotor step (5.1);
(5.5) according to known write request passage, chip information, write data in the free physical page of correspondence, after write operation completes, update chip chip selection signal R/B, this request is deleted from channel queue, now Wi=Wi-WW, rotor step (5.1).
7. method as claimed in claim 1 or 2, it is characterised in that described garbage reclamation processes step and specifically includes:
(6.1) according to passage i free physical page ratio, it may be judged whether need to carry out garbage collection operation, if being made without garbage collection operation, rotor step (2.1), if desired carry out garbage collection operation, rotor step (6.2);
(6.2) garbage collection operation in passage, passage i passage weights W are performedi=Wi+WGC, WGCFor garbage reclamation weights, rotor step (6.3);
(6.3) garbage collection operation completes, passage i passage weights Wi=Wi-WGC, go to step (5).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410290432.0A CN104090847B (en) | 2014-06-25 | 2014-06-25 | Address distribution method of solid-state storage device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410290432.0A CN104090847B (en) | 2014-06-25 | 2014-06-25 | Address distribution method of solid-state storage device |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104090847A CN104090847A (en) | 2014-10-08 |
CN104090847B true CN104090847B (en) | 2017-01-11 |
Family
ID=51638565
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410290432.0A Active CN104090847B (en) | 2014-06-25 | 2014-06-25 | Address distribution method of solid-state storage device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104090847B (en) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105718206B (en) * | 2014-12-03 | 2018-08-03 | 中国人民解放军国防科学技术大学 | The flash translation layer (FTL) and its implementation of RAID can be perceived |
US9866647B2 (en) * | 2015-03-26 | 2018-01-09 | Alcatel Lucent | Hierarchical cost based caching for online media |
CN105159836B (en) * | 2015-08-03 | 2019-01-08 | 北京联想核芯科技有限公司 | A kind of information processing method and electronic equipment |
CN105975209A (en) * | 2016-04-26 | 2016-09-28 | 浪潮(北京)电子信息产业有限公司 | Multichannel data write-in method and system |
CN107515728B (en) * | 2016-06-17 | 2019-12-24 | 清华大学 | Data management method and device for developing internal concurrency characteristics of flash memory device |
CN106325994B (en) * | 2016-08-24 | 2018-05-29 | 广东欧珀移动通信有限公司 | A kind of method and terminal device for controlling write request |
CN107885456B (en) * | 2016-09-29 | 2022-09-16 | 北京忆恒创源科技股份有限公司 | Reducing conflicts for IO command access to NVM |
CN107885667B (en) * | 2016-09-29 | 2022-02-11 | 北京忆恒创源科技股份有限公司 | Method and apparatus for reducing read command processing delay |
CN106547703B (en) * | 2016-10-08 | 2019-05-14 | 华中科技大学 | A kind of FTL optimization method based on block group structure |
JP6667629B2 (en) | 2016-12-29 | 2020-03-18 | 華為技術有限公司Huawei Technologies Co.,Ltd. | Storage systems and solid state disks |
TWI653533B (en) * | 2017-03-07 | 2019-03-11 | 慧榮科技股份有限公司 | Data storage device and method of operation thereof |
CN107220124B (en) * | 2017-05-26 | 2021-01-12 | 苏州浪潮智能科技有限公司 | Path selection method and device |
EP4099177A1 (en) | 2017-10-09 | 2022-12-07 | Huawei Technologies Co., Ltd. | Garbage data scrubbing method, and device |
CN109726137B (en) * | 2017-10-27 | 2021-01-29 | 华为技术有限公司 | Management method of garbage collection task of solid state disk, controller and solid state disk |
CN108829346B (en) * | 2018-05-28 | 2020-11-17 | 华中科技大学 | User writing request processing method of solid state disk adapting to flash memory page difference |
CN109697032B (en) * | 2018-12-19 | 2022-01-07 | 中国人民解放军国防科技大学 | Physical address aware solid-state disk request scheduling method and device |
CN109783398B (en) * | 2019-01-18 | 2020-09-15 | 上海海事大学 | Performance optimization method for FTL (fiber to the Home) solid state disk based on relevant perception page level |
CN110515859B (en) * | 2019-07-09 | 2021-07-20 | 杭州电子科技大学 | Parallel processing method for read-write requests of solid state disk |
CN111857601B (en) * | 2020-07-30 | 2023-09-01 | 暨南大学 | Solid-state disk cache management method based on garbage collection and channel parallelism |
CN114047712B (en) * | 2021-10-12 | 2023-04-18 | 中国电子科技集团公司第二十九研究所 | Data communication method of semi-physical simulation system based on reflective memory network |
CN117055820B (en) * | 2023-10-09 | 2024-02-09 | 苏州元脑智能科技有限公司 | Command processing method of solid state disk, solid state disk and storage medium |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102567257A (en) * | 2011-12-26 | 2012-07-11 | 华中科技大学 | Method for controlling data reading and writing of multi-channel solid-state disc |
CN103135945A (en) * | 2013-03-25 | 2013-06-05 | 中国人民解放军国防科学技术大学 | Multi-channel dynamic read-write dispatching method used in solid state drive (SSD) |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012248110A (en) * | 2011-05-30 | 2012-12-13 | Toshiba Corp | Memory unit having multiple channels and writing control method including error correction channel determination therein |
JP2012248109A (en) * | 2011-05-30 | 2012-12-13 | Toshiba Corp | Memory unit having multiple channels and read command group generating method for compaction in the memory unit |
-
2014
- 2014-06-25 CN CN201410290432.0A patent/CN104090847B/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102567257A (en) * | 2011-12-26 | 2012-07-11 | 华中科技大学 | Method for controlling data reading and writing of multi-channel solid-state disc |
CN103135945A (en) * | 2013-03-25 | 2013-06-05 | 中国人民解放军国防科学技术大学 | Multi-channel dynamic read-write dispatching method used in solid state drive (SSD) |
Non-Patent Citations (1)
Title |
---|
高性能固态盘的多级并行性及算法研究;胡洋;《中国博士学位论文全文数据库 信息科技辑》;20120915;第2012卷(第9期);第2章 * |
Also Published As
Publication number | Publication date |
---|---|
CN104090847A (en) | 2014-10-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104090847B (en) | Address distribution method of solid-state storage device | |
US9652379B1 (en) | System and method for reducing contentions in solid-state memory access | |
CN109154917B (en) | Storage system and solid state disk | |
CN107885456B (en) | Reducing conflicts for IO command access to NVM | |
US10049040B2 (en) | Just in time garbage collection | |
CN102193872B (en) | Memory system | |
CN103902474B (en) | Mixed storage system and method for supporting solid-state disk cache dynamic distribution | |
JP3962368B2 (en) | System and method for dynamically allocating shared resources | |
US9058208B2 (en) | Method of scheduling tasks for memories and memory system thereof | |
CN109388590B (en) | Dynamic cache block management method and device for improving multichannel DMA (direct memory access) access performance | |
US20110252215A1 (en) | Computer memory with dynamic cell density | |
US20070274303A1 (en) | Buffer management method based on a bitmap table | |
US9769081B2 (en) | Buffer manager and methods for managing memory | |
CN103902475B (en) | Solid state disk concurrent access method and device based on queue management mechanism | |
CN101499956B (en) | Hierarchical buffer zone management system and method | |
CN114185818B (en) | GPU (graphics processing Unit) memory access self-adaptive optimization method and device based on extended page table | |
US20190004968A1 (en) | Cache management method, storage system and computer program product | |
CN103345451A (en) | Data buffering method in multi-core processor | |
CN101706760B (en) | Matrix transposition automatic control circuit system and matrix transposition method | |
US20180004409A1 (en) | Method and apparatus for managing storage device | |
US20130061009A1 (en) | High Performance Free Buffer Allocation and Deallocation | |
KR102471966B1 (en) | Data input and output method using storage node based key-value srotre | |
CN107885667B (en) | Method and apparatus for reducing read command processing delay | |
JPH11143779A (en) | Paging processing system for virtual storage device | |
US20230222058A1 (en) | Zoned namespaces for computing device main memory |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |