CN104058305A - Integration intelligent elevator control system - Google Patents

Integration intelligent elevator control system Download PDF

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Publication number
CN104058305A
CN104058305A CN201410311688.5A CN201410311688A CN104058305A CN 104058305 A CN104058305 A CN 104058305A CN 201410311688 A CN201410311688 A CN 201410311688A CN 104058305 A CN104058305 A CN 104058305A
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circuit
signal
digital signal
signal processing
control
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沈达
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LUO DAOHONG
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LUO DAOHONG
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Abstract

The invention discloses an integration intelligent elevator control system which integrates motor drive and control. On one hand, an intelligent framework is used, a great amount of logic signals are preprocessed by an FPGA (Field Programmable Gate Array), the safety of the elevator control system is improved, the digital signal processing workload of a main control chip is reduced, and the occurrence of the elevator safety accident caused by the fault of a controller is prevented.

Description

A kind of integrated intelligent apparatus for controlling elevator
Technical field
The present invention relates to elevator drive and control field, relate in particular to a kind of integrated intelligent apparatus for controlling elevator.
Background technology
Along with scientific and technical development and the raising of living standards of the people, the use of elevator is more and more general.According to Chinese elevator association statistics, show, by China's elevator recoverable amount in 2012, reached 2,400,000, productive output and the consumption of elevator are the first in the world.Because elevator production installation, operating maintenance and supervision and management exist problems, whole nation elevator accident takes place frequently, elevator operation has become the new hidden danger of municipal public safety, how to improve the safety and reliability of elevator, and elevator signal is monitored in real time, be related to the development of whole elevator industry.
At present; quite a few elevator manufacturer adopts the micro controller system of single-chip digital signal processor digital signal processing or even lower level as the control chip of actuator; if control chip breaks down; elevator traction motor is easy in runaway condition; if there is no certain failure-free hardware automatic Protection; probably cause elevator accident, if service personnel can not arrive in time, certainly will impact passenger's physical and mental health.In addition, elevator is in operational process, the machinery of controlling for traction electric machine and electronic correlation parameter, damping coefficient, rotary inertia etc. can constantly change, elevator maintenance personnel often can not obtain and upgrade the needed parameters of control housing in time, make the controller performance of traction electric machine often not in optimum regime, the traveling comfort of elevator also is just difficult to obtain ensure.
In addition, development along with machine room and small room technology, actuator, control system etc. are proposed to miniaturization, integrated, circuit and low-power consumption requirement, so motor driving, control being development tendency with communicating by letter etc. integrated, integrated, is also an emphasis of elevator control technology.
Summary of the invention
The object of the invention is to be achieved through the following technical solutions.
According to the embodiment of the present invention, propose a kind of integrated intelligent apparatus for controlling elevator, comprising: system power supply power supply, AC-DC change-over circuit, circuit capacitance, DC-AC change-over circuit, the first self adaptation security circuit, the second self adaptation security circuit, traction electric machine circuit, intelligent control circuit and RS232 serial interface; Described traction electric machine circuit forms by excitation traction electric machine with the coaxial coder of excitation traction electric machine; Described Intelligent control electric route digital signal processing governor circuit, FPGA divide control circuit, acquisition of signal and pre-process circuit and intelligence electricity management circuit to form;
Described intelligent control circuit is connected with DC-AC change-over circuit, traction electric machine circuit, the first self adaptation security circuit, the second self adaptation security circuit, RS232 serial interface respectively; Circuit capacitance is serially connected with DC bus both sides; AC-DC change-over circuit is connected by the first self adaptation security Circuits and Systems power supply; DC-AC change-over circuit is connected with traction electric machine circuit by the second self adaptation security circuit; Digital signal processing chip in digital signal processing governor circuit divides the fpga chip in control circuit to be connected by IO port with FPGA;
Described AC-DC change-over circuit is converted to DC bus voltage for DC-AC change-over circuit by system power supply power supply, and between DC bus, is connected in series the stability that condenser network increases DC bus voltage; DC-AC change-over circuit receives that the backward FPGA of breakdown signal divides control circuit output alarm signal, halt system in time, and breakdown signal is fed back to digital signal processing governor circuit; The digital signal processing governor circuit of intelligent control circuit is responsible for processing the code device signal from bus current sampled signal, bus voltage sampled signal and the traction electric machine circuit of acquisition of signal and pre-process circuit, and 6 road pwm signals of DC-AC change-over circuit are controlled in output, FPGA divides control circuit to carrying out pretreatment from internal system and outside logical signal and breakdown signal, and pretreated signal is fed back to digital signal processing governor circuit in the mode of communicating by letter by IO port; Intelligent control circuit communicates by RS232 serial interface and external control unit and monitoring unit.
The method of work of integrated intelligent apparatus for controlling elevator of the present invention, comprises the following steps:
S1, initialized while of digital signal processing governor circuit, and divide control circuit to carry out initialization to FPGA;
S2, in system operational process, digital signal processing governor circuit and FPGA divide control circuit to work simultaneously, working process is respectively as follows:
The control flow of S2-1, digital signal processing governor circuit comprises:
Digital signal processing chip capturing and coding device signal in S2-1-1, digital signal processing governor circuit, DC bus voltage signal, DC bus current signal, and calculate the running velocity of elevator reality and DC bus voltage value, DC bus current value;
S2-1-2, judge that whether the current DC bus voltage value obtaining surpasses maximum voltage, the DC bus current value set and whether surpass the lowest high-current value of setting, if surpass, think the system failure, termination system operation immediately, if do not surpass, proceeds to S2-1-3;
S2-1-3, judge current elevator reality running velocity whether in the speed range of setting, if exceed the speed range of setting, think the system failure, termination system operation immediately, if do not exceed the speed range of setting, proceeds to S3;
S2-2, FPGA divide the control flow of control circuit to comprise:
S2-2-1, FPGA divide control circuit to obtain internal system logical signal, comprise breakdown signal, operating state signal;
S2-2-2, judge whether system breaks down, if break down signal, FPGA divides control circuit, by IO port, breakdown signal is fed back to digital signal processing governor circuit, digital signal processing governor circuit is received the breakdown signal that divides control circuit from FPGA, termination system operation immediately, and fault cause is fed back to outer monitoring equipment by RS232 serial interface; If FPGA divides control circuit not receive breakdown signal, proceed to S2-2-3;
S2-2-3, FPGA divide control circuit to continue to receive external logic signal, it is the command signal of elevator simulation control desk, and external logic signal is carried out to analyzing and processing, draw external control instruction, by IO port by gained external control instruction feedback to digital signal processing governor circuit, then proceed to S3;
Digital signal processing chip in S3, digital signal processing governor circuit divides the control circuit external control instruction that feedback is come to carry out comprehensive treatment, analysis the code device signal collecting, DC bus voltage signal, DC bus current signal and FPGA, if decision-making system breaks down, termination system operation immediately; If decision-making system does not break down, proceed to S4;
S4, digital signal processing governor circuit adopt two closed loops vector control policies to draw the control signal of 6 road pwm control signals and voltage, electric current, rotative speed; 6 road pwm control signals are exported to DC-AC change-over circuit, and then control traction electric machine circuit, the control signal of voltage, electric current, rotative speed is fed back to outer monitoring equipment by RS232 serial interface simultaneously.
The method of work of integrated intelligent apparatus for controlling elevator of the present invention, in S4, two closed loop vectors are controlled and are comprised speed ring and electric current loop, and described speed ring control algorithm specifically comprises:
The default rotative speed w of A1, computation speed ring *deviation with real time rotation speed w: default rotative speed w *given by electric life controller, real time rotation speed w is tested the speed and tries to achieve according to M/T method by digital signal processing chip capturing and coding device signal, and deviation is default rotative speed w *difference with real time rotation speed w;
A2, the controlling quantity output of calculating proportioning element expression formula is as follows:
k wherein pfor proportioning element parameter, k represents the k time sampling;
The compensation rate of A3, calculation perturbation monitor expression formula is as follows:
d ‾ ( k ) = 1 / τ { ( τ - T ) d ‾ ( k - 1 ) + 1 / b 0 [ w ( k ) - w ( k - 1 ) ] - Ti q * ( k - 1 ) }
B wherein 0for reference model parameter, the time constant filter that τ is low-pass filter, T is the sampling period, for electric current loop setting value;
A4, calculate final needed current value u (k) is the output of speed ring controller.
The method of work of integrated intelligent apparatus for controlling elevator of the present invention, the current loop control algorithm described in S4 is selected PID increment type control algorithm of the prior art.
The present invention compared with prior art, there is following beneficial effect: the present invention collects traction electric machine and drives, is controlled in one, use on the one hand intelligent architecture, FPGA carries out pretreatment to a large amount of logical signals, improved the safety of apparatus for controlling elevator, reduce the work capacity of main control chip digital signal processing, prevented the generation of the elevator safety accident that causes because of controller failure.
Accompanying drawing explanation
By reading below detailed description of the preferred embodiment, various other advantage and benefits will become cheer and bright for those of ordinary skills.Accompanying drawing is only for the object of preferred implementation is shown, and do not think limitation of the present invention.And in whole accompanying drawing, by identical reference symbol, represent identical parts.In the accompanying drawings:
Accompanying drawing 1 shows the integrated intelligent apparatus for controlling elevator structural representation according to embodiment of the present invention;
Accompanying drawing 2 shows according to the method for work diagram of circuit of the integrated intelligent apparatus for controlling elevator of embodiment of the present invention.
The specific embodiment
Illustrative embodiments of the present disclosure is described below with reference to accompanying drawings in more detail.Although shown illustrative embodiments of the present disclosure in accompanying drawing, yet should be appreciated that and can realize the disclosure and the embodiment that should do not set forth limits here with various forms.On the contrary, it is in order more thoroughly to understand the disclosure that these embodiments are provided, and can by the scope of the present disclosure complete convey to those skilled in the art.
According to the embodiment of the present invention, a kind of integrated intelligent apparatus for controlling elevator is proposed, as shown in Figure 1, comprising: system power supply power supply, AC-DC change-over circuit, circuit capacitance, DC-AC change-over circuit, the first self adaptation security circuit, the second self adaptation security circuit, traction electric machine circuit, intelligent control circuit and RS232 serial interface; Described traction electric machine circuit forms by excitation traction electric machine with the coaxial coder of excitation traction electric machine; Described Intelligent control electric route digital signal processing governor circuit, FPGA divide control circuit, acquisition of signal and pre-process circuit and intelligence electricity management circuit to form;
Described intelligent control circuit is connected with DC-AC change-over circuit, traction electric machine circuit, the first self adaptation security circuit, the second self adaptation security circuit, RS232 serial interface respectively; Circuit capacitance is serially connected with DC bus both sides; AC-DC change-over circuit is connected by the first self adaptation security Circuits and Systems power supply; DC-AC change-over circuit is connected with traction electric machine circuit by the second self adaptation security circuit; Digital signal processing chip in digital signal processing governor circuit divides the fpga chip in control circuit to be connected by IO port with FPGA;
Described AC-DC change-over circuit is converted to DC bus voltage for DC-AC change-over circuit by system power supply power supply, and between DC bus, is connected in series the stability that condenser network increases DC bus voltage; DC-AC change-over circuit receives that the backward FPGA of breakdown signal divides control circuit output alarm signal, halt system in time, and breakdown signal is fed back to digital signal processing governor circuit; The digital signal processing governor circuit of intelligent control circuit is responsible for processing the code device signal from bus current sampled signal, bus voltage sampled signal and the traction electric machine circuit of acquisition of signal and pre-process circuit, and 6 road pwm signals of DC-AC change-over circuit are controlled in output, FPGA divides control circuit to carrying out pretreatment from internal system and outside logical signal and breakdown signal, and pretreated signal is fed back to digital signal processing governor circuit in the mode of communicating by letter by IO port; Intelligent control circuit communicates by RS232 serial interface and external control unit and monitoring unit.
According to another embodiment of the present invention, a kind of method of work of described integrated intelligent apparatus for controlling elevator is also proposed, as shown in Figure 2, comprise the following steps:
S1, initialized while of digital signal processing governor circuit, and divide control circuit to carry out initialization to FPGA;
S2, in system operational process, digital signal processing governor circuit and FPGA divide control circuit to work simultaneously, working process is respectively as follows:
The control flow of S2-1, digital signal processing governor circuit comprises:
Digital signal processing chip capturing and coding device signal in S2-1-1, digital signal processing governor circuit, DC bus voltage signal, DC bus current signal, and calculate the running velocity of elevator reality and DC bus voltage value, DC bus current value;
S2-1-2, judge that whether the current DC bus voltage value obtaining surpasses maximum voltage, the DC bus current value set and whether surpass the lowest high-current value of setting, if surpass, think the system failure, termination system operation immediately, if do not surpass, proceeds to S2-1-3;
S2-1-3, judge current elevator reality running velocity whether in the speed range of setting, if exceed the speed range of setting, think the system failure, termination system operation immediately, if do not exceed the speed range of setting, proceeds to S3;
S2-2, FPGA divide the control flow of control circuit to comprise:
S2-2-1, FPGA divide control circuit to obtain internal system logical signal, comprise breakdown signal, operating state signal;
S2-2-2, judge whether system breaks down, if break down signal, FPGA divides control circuit, by IO port, breakdown signal is fed back to digital signal processing governor circuit, digital signal processing governor circuit is received the breakdown signal that divides control circuit from FPGA, termination system operation immediately, and fault cause is fed back to outer monitoring equipment by RS232 serial interface; If FPGA divides control circuit not receive breakdown signal, proceed to S2-2-3;
S2-2-3, FPGA divide control circuit to continue to receive external logic signal, it is the command signal of elevator simulation control desk, and external logic signal is carried out to analyzing and processing, draw external control instruction, by IO port by gained external control instruction feedback to digital signal processing governor circuit, then proceed to S3;
Digital signal processing chip in S3, digital signal processing governor circuit divides the control circuit external control instruction that feedback is come to carry out comprehensive treatment, analysis the code device signal collecting, DC bus voltage signal, DC bus current signal and FPGA, if decision-making system breaks down, termination system operation immediately; If decision-making system does not break down, proceed to S4;
S4, digital signal processing governor circuit adopt two closed loops vector control policies to draw the control signal of 6 road pwm control signals and voltage, electric current, rotative speed; 6 road pwm control signals are exported to DC-AC change-over circuit, and then control traction electric machine circuit, the control signal of voltage, electric current, rotative speed is fed back to outer monitoring equipment by RS232 serial interface simultaneously.
The method of work of integrated intelligent apparatus for controlling elevator of the present invention, in S4, two closed loop vectors are controlled and are comprised speed ring and electric current loop, and described speed ring control algorithm specifically comprises:
The default rotative speed w of A1, computation speed ring *deviation with real time rotation speed w: default rotative speed w *given by electric life controller, real time rotation speed w is tested the speed and tries to achieve according to M/T method by digital signal processing chip capturing and coding device signal, and deviation is default rotative speed w *difference with real time rotation speed w;
A2, the controlling quantity output of calculating proportioning element expression formula is as follows:
k wherein pfor proportioning element parameter, k represents the k time sampling;
The compensation rate of A3, calculation perturbation monitor expression formula is as follows:
d ‾ ( k ) = 1 / τ { ( τ - T ) d ‾ ( k - 1 ) + 1 / b 0 [ w ( k ) - w ( k - 1 ) ] - Ti q * ( k - 1 ) }
B wherein 0for reference model parameter, the time constant filter that τ is low-pass filter, T is the sampling period, for electric current loop setting value;
A4, calculate final needed current value u (k) is the output of speed ring controller.
The method of work of integrated intelligent apparatus for controlling elevator of the present invention, the current loop control algorithm described in S4 is selected PID increment type control algorithm of the prior art.
The above; be only the present invention's specific embodiment preferably, but protection scope of the present invention is not limited to this, is anyly familiar with in technical scope that those skilled in the art disclose in the present invention; the variation that can expect easily or replacement, within all should being encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion by the described protection domain with claim.

Claims (3)

1. an integrated intelligent apparatus for controlling elevator, comprising: system power supply power supply, AC-DC change-over circuit, circuit capacitance, DC-AC change-over circuit, the first self adaptation security circuit, the second self adaptation security circuit, traction electric machine circuit, intelligent control circuit and RS232 serial interface; Described traction electric machine circuit forms by excitation traction electric machine with the coaxial coder of excitation traction electric machine; Described Intelligent control electric route digital signal processing governor circuit, FPGA divide control circuit, acquisition of signal and pre-process circuit and intelligence electricity management circuit to form;
Described intelligent control circuit is connected with DC-AC change-over circuit, traction electric machine circuit, the first self adaptation security circuit, the second self adaptation security circuit, RS232 serial interface respectively; Circuit capacitance is serially connected with DC bus both sides; AC-DC change-over circuit is connected by the first self adaptation security Circuits and Systems power supply; DC-AC change-over circuit is connected with traction electric machine circuit by the second self adaptation security circuit; Digital signal processing chip in digital signal processing governor circuit divides the fpga chip in control circuit to be connected by IO port with FPGA;
Described AC-DC change-over circuit is converted to DC bus voltage for DC-AC change-over circuit by system power supply power supply, and between DC bus, is connected in series the stability that condenser network increases DC bus voltage; DC-AC change-over circuit receives that the backward FPGA of breakdown signal divides control circuit output alarm signal, halt system in time, and breakdown signal is fed back to digital signal processing governor circuit; The digital signal processing governor circuit of intelligent control circuit is responsible for processing the code device signal from bus current sampled signal, bus voltage sampled signal and the traction electric machine circuit of acquisition of signal and pre-process circuit, and 6 road pwm signals of DC-AC change-over circuit are controlled in output, FPGA divides control circuit to carrying out pretreatment from internal system and outside logical signal and breakdown signal, and pretreated signal is fed back to digital signal processing governor circuit in the mode of communicating by letter by IO port; Intelligent control circuit communicates by RS232 serial interface and external control unit and monitoring unit.
2. a method of work for integrated intelligent apparatus for controlling elevator as claimed in claim 1, comprises the following steps:
S1, initialized while of digital signal processing governor circuit, and divide control circuit to carry out initialization to FPGA;
S2, in system operational process, digital signal processing governor circuit and FPGA divide control circuit to work simultaneously, working process is respectively as follows:
The control flow of S2-1, digital signal processing governor circuit comprises:
Digital signal processing chip capturing and coding device signal in S2-1-1, digital signal processing governor circuit, DC bus voltage signal, DC bus current signal, and calculate the running velocity of elevator reality and DC bus voltage value, DC bus current value;
S2-1-2, judge that whether the current DC bus voltage value obtaining surpasses maximum voltage, the DC bus current value set and whether surpass the lowest high-current value of setting, if surpass, think the system failure, termination system operation immediately, if do not surpass, proceeds to S2-1-3;
S2-1-3, judge current elevator reality running velocity whether in the speed range of setting, if exceed the speed range of setting, think the system failure, termination system operation immediately, if do not exceed the speed range of setting, proceeds to S3;
S2-2, FPGA divide the control flow of control circuit to comprise:
S2-2-1, FPGA divide control circuit to obtain internal system logical signal, comprise breakdown signal, operating state signal;
S2-2-2, judge whether system breaks down, if break down signal, FPGA divides control circuit, by IO port, breakdown signal is fed back to digital signal processing governor circuit, digital signal processing governor circuit is received the breakdown signal that divides control circuit from FPGA, termination system operation immediately, and fault cause is fed back to outer monitoring equipment by RS232 serial interface; If FPGA divides control circuit not receive breakdown signal, proceed to S2-2-3;
S2-2-3, FPGA divide control circuit to continue to receive external logic signal, it is the command signal of elevator simulation control desk, and external logic signal is carried out to analyzing and processing, draw external control instruction, by IO port by gained external control instruction feedback to digital signal processing governor circuit, then proceed to S3;
Digital signal processing chip in S3, digital signal processing governor circuit divides the control circuit external control instruction that feedback is come to carry out comprehensive treatment, analysis the code device signal collecting, DC bus voltage signal, DC bus current signal and FPGA, if decision-making system breaks down, termination system operation immediately; If decision-making system does not break down, proceed to S4;
S4, digital signal processing governor circuit adopt two closed loops vector control policies to draw the control signal of 6 road pwm control signals and voltage, electric current, rotative speed; 6 road pwm control signals are exported to DC-AC change-over circuit, and then control traction electric machine circuit, the control signal of voltage, electric current, rotative speed is fed back to outer monitoring equipment by RS232 serial interface simultaneously.
3. a method as claimed in claim 2, in S4, two closed loops vectors are controlled and are comprised speed ring and electric current loop, and described speed ring control algorithm specifically comprises:
The default rotative speed w of A1, computation speed ring *deviation with real time rotation speed w: default rotative speed w *given by electric life controller, real time rotation speed w is tested the speed and tries to achieve according to M/T method by digital signal processing chip capturing and coding device signal, and deviation is default rotative speed w *difference with real time rotation speed w;
A2, the controlling quantity output of calculating proportioning element expression formula is as follows:
k wherein pfor proportioning element parameter, k represents the k time sampling;
The compensation rate of A3, calculation perturbation monitor expression formula is as follows:
d ‾ ( k ) = 1 / τ { ( τ - T ) d ‾ ( k - 1 ) + 1 / b 0 [ w ( k ) - w ( k - 1 ) ] - Ti q * ( k - 1 ) }
B wherein 0for reference model parameter, the time constant filter that τ is low-pass filter, T is the sampling period, for electric current loop setting value;
A4, calculate final needed current value u (k) is the output of speed ring controller.
CN201410311688.5A 2014-07-02 2014-07-02 Integration intelligent elevator control system Pending CN104058305A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106081752A (en) * 2016-08-13 2016-11-09 上海新时达电气股份有限公司 Elevator control panel, black box and control functional module based on FPGA
CN108100828A (en) * 2017-12-19 2018-06-01 浙江西子富沃德电机有限公司 A kind of elevator traction machine and control method and elevator

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001008459A (en) * 1999-06-18 2001-01-12 Hitachi Ltd Controller for elevator
CN201580862U (en) * 2009-12-21 2010-09-15 江门市蒙德电气有限公司 Elevator driving electrical device
CN102963784A (en) * 2012-11-28 2013-03-13 南京理工大学 Drive and control integration system for tractor of elevator
CN203095359U (en) * 2013-01-08 2013-07-31 科比传动技术(上海)有限公司 Elevator system
JP2013256343A (en) * 2012-06-11 2013-12-26 Panasonic Home Elevator Co Ltd Elevator driving control device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001008459A (en) * 1999-06-18 2001-01-12 Hitachi Ltd Controller for elevator
CN201580862U (en) * 2009-12-21 2010-09-15 江门市蒙德电气有限公司 Elevator driving electrical device
JP2013256343A (en) * 2012-06-11 2013-12-26 Panasonic Home Elevator Co Ltd Elevator driving control device
CN102963784A (en) * 2012-11-28 2013-03-13 南京理工大学 Drive and control integration system for tractor of elevator
CN203095359U (en) * 2013-01-08 2013-07-31 科比传动技术(上海)有限公司 Elevator system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106081752A (en) * 2016-08-13 2016-11-09 上海新时达电气股份有限公司 Elevator control panel, black box and control functional module based on FPGA
CN106081752B (en) * 2016-08-13 2019-06-21 上海新时达电气股份有限公司 Elevator control panel, black box and the control function module based on FPGA
CN108100828A (en) * 2017-12-19 2018-06-01 浙江西子富沃德电机有限公司 A kind of elevator traction machine and control method and elevator
CN108100828B (en) * 2017-12-19 2024-04-23 浙江西子富沃德电机有限公司 Elevator traction machine, control method and elevator

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Application publication date: 20140924