CN104051214B - The ion energy for determining to associate with plasma system using model - Google Patents

The ion energy for determining to associate with plasma system using model Download PDF

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Publication number
CN104051214B
CN104051214B CN201410097194.1A CN201410097194A CN104051214B CN 104051214 B CN104051214 B CN 104051214B CN 201410097194 A CN201410097194 A CN 201410097194A CN 104051214 B CN104051214 B CN 104051214B
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voltage
impedance matching
electric current
generators
model
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CN104051214A (en
Inventor
约翰·C·小瓦尔考
布拉德福德·J·林达克
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Lam Research Corp
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Lam Research Corp
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Priority claimed from US14/184,639 external-priority patent/US9842725B2/en
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Priority to CN201810106696.4A priority Critical patent/CN108447759B/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32174Circuits specially adapted for controlling the RF discharge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/321Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02043Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02046Dry cleaning only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H01L21/67213Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one ion or electron beam chamber

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma Technology (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The present invention relates to the ion energy for determining to associate with plasma system using model, the system and method for determining ion energy have been described in detail.One kind in these methods includes:The output of generator is detected to identify generator output complex voltage and electric current (V & I).The generator is coupled to impedance matching circuit, and the impedance matching circuit is coupled to electrostatic chuck(ESC).This method further comprises:Multiple V & I of the multiple V & I determinations along the projection at the point in the path between the output of model of the impedance matching circuit and the model of the ESC is exported from the generator.At least part of model operated with the path of the multiple V & I of projection determination performs.This method includes applying the input of the multiple V & I of the projection as function so that the multiple V & I of the projection to be mapped to the wafer bias value at the ESC models, and determines ion energy from the wafer bias value.

Description

The ion energy for determining to associate with plasma system using model
Technical field
The present invention relates to the ion energy for determining to associate with plasma system using model.
Background technology
In the system based on plasma, plasma is produced in plasma room to perform various behaviour on chip Make, for example, etching, cleaning, deposition etc..Plasma is monitored and controlled, so as to control the execution of various operations.Example Such as, biased and by using impedance matching electricity by using bias compensation equipment to measure the electrostatic chuck in plasma room Voltage probe at the output on road measures radio frequency (RF) voltage, so as to monitor plasma.Plasma is supplied to by control The amount of the radio-frequency power of body room controls plasma.
However, made us using bias compensation equipment and voltage probe the performance of operation is monitored and controlled and possibly can not provide Satisfied result.In addition, the monitoring of wafer bias and RF voltages is probably costly and time consuming operation.
Under this background, it is proposed that the embodiment described in the disclosure.
The content of the invention
Embodiment of the present disclosure provides the ion energy for determining to associate with plasma system using model Device, method and computer program.It should be appreciated that embodiments of the present invention can be realized in many ways, for example, with technique, Method on device, system, hardware or computer-readable medium is realized.Some embodiments are described below.
In some embodiments, the method for determining ion energy is described.This method includes:Identification is in radio frequency (RF) outgoing position of generator measure when the RF generators are coupled to plasma chamber via impedance matching circuit First complex voltage and electric current.The impedance matching circuit has the input and coupling for the output for being coupled to the RF generators To the output of RF transmission lines.Methods described is still further comprised based on the electric component life defined in the impedance matching circuit Into impedance matching model, the impedance matching model has input and output.The input of the impedance matching model receives First complex voltage and electric current, the impedance matching model have one or more elements.Methods described also includes transmission institute The first complex voltage and electric current are stated by the element of the impedance matching model to determine the second complex voltage and electric current.The side Method also includes obtaining crest voltage;Wafer bias is determined based on second complex voltage and electric current;It is and inclined based on the chip Put and determine the ion energy with the crest voltage.
In various embodiments, the plasma system for determining ion energy is described.The plasma system Including:For producing the RF generators of radio frequency (RF) signal.The RF generators are associated with voltage and current probe.The electricity Pressure and current probe are configured to first complex voltage and electric current of the measurement in the outgoing position of the RF generators.The plasma System system also includes being coupled to the impedance matching circuit of the RF generators and via RF transmission line couplings to the impedance matching The plasma chamber of circuit.The impedance matching circuit has the input and coupling for the output for being coupled to the RF generators To the output of the RF transmission lines.The plasma system includes the processor for being coupled to the RF generators.The processing Device is configured to:Identify first complex voltage and electric current and based on the electric component defined in the impedance matching circuit Generate impedance matching model.The impedance matching model has input and output, and the input of the impedance matching model connects Receive first complex voltage and electric current.The impedance matching model has one or more elements.The processor is further matched somebody with somebody Be set to transmission first complex voltage and electric current by the element of the impedance matching model with determine the second complex voltage and Electric current;Obtain crest voltage;Wafer bias is determined based on second complex voltage and electric current;And based on the wafer bias and The crest voltage determines the ion energy.
Describe a kind of computer system for being used to determine ion energy.The computer system includes:Processor, its by with Be set to identification radio frequency (RF) generator outgoing position measure when the RF generators are coupled to via impedance matching circuit The first complex voltage and electric current during plasma chamber.The impedance matching circuit, which has, is coupled to the described defeated of the RF generators The input that goes out and the output for being coupled to RF transmission lines.The processor is additionally configured to be based on to determine in the impedance matching circuit The electric component generation impedance matching model of justice.The impedance matching model has input and output.The impedance matching model The input receive first complex voltage and electric current.The impedance matching model has one or more elements.The place Reason device is additionally configured to transmit first complex voltage and electric current by the element of the impedance matching model to determine the Two complex voltages and electric current;Obtain crest voltage;Wafer bias is determined based on second complex voltage and electric current;And based on described Wafer bias and the crest voltage determine the ion energy.The computer system also includes being coupled to the processor Storage device, the storage device are configured to store the ion energy.
Some advantages of above-mentioned embodiment include:Determine ion energy without voltage probe is coupled into impedance Output with circuit, and wafer bias need not be measured using bias compensation equipment.Obtain voltage probe and bias compensation Circuit can be high cost.Comparatively speaking, voltage probe need not be coupled to the output of impedance matching circuit and not Ion energy is determined in the case of needing to use bias compensation circuit.Without using voltage probe and bias compensation circuit can save with The cost and time and energy of voltage probe and bias compensation circuit correlation.
In addition, voltage probe and bias compensation circuit are likely to occur failure during manufacture, processing, cleaning of substrate etc. Or possibly it can not operate.Voltage and current probe meets preset formula and more more reliable than voltage probe and more accurate, voltage and Precircuit is used in combination to determine radio frequency (RF) voltage in current probe, and determines wafer bias using the RF voltages.It is based on The wafer bias and the RF voltages determine ion energy.Use the RF voltages and wafer bias measured by voltage and current probe Biased than the electrostatic chuck based on determined by the voltage measured as voltage probe, more preferable precision is provided to ion energy.
According to ensuing detailed description, with reference to accompanying drawing, other side can become apparent.
Brief description of the drawings
By reference to following description, with reference to accompanying drawing, these embodiments can be best understood by.
Fig. 1 be according to the embodiment described in the disclosure be used for determine the outgoing position in impedance matching model , outgoing position and in electrostatic chuck (ESC) model the outgoing position of part in radio frequency (RF) mode The block diagram of the system of variable.
Fig. 2 be according to the embodiment described in the disclosure be used for determine the outgoing position in RF modes part Complex voltage and electric current method flow chart.
Fig. 3 A are according to the block diagram of the system of the embodiment described in the disclosure, and it is used to illustrate impedance matching electricity Road.
Fig. 3 B are the circuit diagrams according to the impedance matching model of the embodiment described in the disclosure.
Fig. 4 is that it is used to illustrate RF transmission lines according to the figure of the system of the embodiment described in the disclosure.
Fig. 5 A are that it is used for the electricity for illustrating RF transmission lines according to the block diagram of the system of the embodiment described in the disclosure Road model.
Fig. 5 B are that it is used to illustrate RF modes according to the figure of the circuit of the embodiment described in the disclosure Tunnel and band (strap) model.
Fig. 5 C are that it is used to illustrate tunnel and band according to the figure of the circuit of the embodiment described in the disclosure (strap) model.
Fig. 6 is that it is used to illustrate cylinder and ESC moulds according to the figure of the circuit of the embodiment described in the disclosure Type.
Fig. 7 is the plasma for being used for determining variable for including wave filter according to the embodiment described in the disclosure The block diagram of system.
Fig. 8 A are according to the figure of the system of the embodiment described in the disclosure, and it is used to illustrate the essence for improving variable The model of the wave filter of degree.
Fig. 8 B are that it is used for the mould for illustrating wave filter according to the figure of the system of the embodiment described in the disclosure Type.
Fig. 9 is to be used to measure in Fig. 1 using voltage and current probe according to the embodiment described in the disclosure System RF generators outgoing position variable system block diagram.
Figure 10 be according to the block diagram of the system of the embodiment described in the disclosure, wherein voltage and current probe and Communication equipment is located at the outside of RF generators.
Figure 11 is according to the block diagram of the system of the embodiment described in the disclosure, which uses and is using Fig. 1 The value for the variable that system determines.
Figure 12 A be according to the diagram of the embodiment described in the disclosure when x MHz RF generators open (on) Between the variable measured by using node location of the probe in Fig. 1 system and the variable using Fig. 2 method determination The figure of correlation.
Figure 12 B are to be passed through according to the diagram of the embodiment described in the disclosure when y MHz RF generators are opened Correlation between the variable measured using node location of the probe in Fig. 1 system and the variable for utilizing Fig. 2 method to determine The figure of property.
Figure 12 C are to be passed through according to the diagram of the embodiment described in the disclosure when z MHz RF generators are opened Correlation between the variable measured using node location of the probe in Fig. 1 system and the variable for utilizing Fig. 2 method to determine The figure of property.
Figure 13 be according to the embodiment described in the disclosure be used for determine impedance matching model, RF modes Or ESC models model node position wafer bias method flow chart.
Figure 14 is to be used to generate the wafer bias of wafer bias according to the diagram of the embodiment described in the disclosure to send out The state diagram of raw device.
Figure 15 is to be used to determine along impedance matching model and ESC models according to the embodiment described in the disclosure Between path certain point at wafer bias method flow chart.
Figure 16 is inclined according to the chip being used to determine in the node location of model of the embodiment described in the disclosure The block diagram for the system put.
Figure 17 is to be used to determine in the model node position of Fig. 1 system according to the embodiment described in the disclosure Wafer bias method flow chart.
Figure 18 be according to the embodiment described in the disclosure be used to illustrate be not by using voltage probe but The block diagram of the system of the advantages of by using Figure 13, Figure 15 or Figure 17 method to determine wafer bias.
Figure 19 A are to be led to according to the diagram of the embodiment described in the disclosure when y and z MHz RF generators are opened Cross the variable measured using voltage probe in the node location of Fig. 1 plasma system and the side using Fig. 2,13,15 or 17 The embodiment of the figure for the correlation between the variable at corresponding model node output that method determines.
Figure 19 B are to be led to according to the diagram of the embodiment described in the disclosure when x and z MHz RF generators are opened Cross the variable measured using voltage probe in the node location of Fig. 1 plasma system and the side using Fig. 2,13,15 or 17 The embodiment of the figure for the correlation between the variable at corresponding model node output that method determines.
Figure 19 C are to be led to according to the diagram of the embodiment described in the disclosure when x and y MHz RF generators are opened Cross the variable measured using voltage probe in the node location of Fig. 1 plasma system and the side using Fig. 2,13,15 or 17 The embodiment of the figure for the correlation between the variable at corresponding model node output that method determines.
Figure 20 A are being used to illustrate when x MHz RF generators are opened according to the embodiment described in the disclosure, In the wired wafer bias (wired wafer bias), true using the method for Figure 13,15 or 17 measured using sensor tool The figure of the correlation between error in fixed model wafer bias and model biasing.
Figure 20 B are being used to illustrate when y MHz RF generators are opened according to the embodiment described in the disclosure, In the wired wafer bias measured using sensor tool, the model biasing determined using the method for Figure 13,15 or 17 and the mould The figure of the correlation between error in type biasing.
Figure 20 C are being used to illustrate when z MHz RF generators are opened according to the embodiment described in the disclosure, In the wired wafer bias measured using sensor tool, the model biasing determined using the method for Figure 13,15 or 17 and the mould The figure of the correlation between error in type biasing.
Figure 20 D are to be used to illustrate when x and y MHz RF generators are open-minded according to the embodiment described in the disclosure When, the wired wafer bias measured using sensor tool, using Figure 13,15 or 17 method determine model biasing and The figure of the correlation between error in model biasing.
Figure 20 E are to be used to illustrate when x and z MHz RF generators are open-minded according to the embodiment described in the disclosure When, the wired wafer bias measured using sensor tool, using Figure 13,15 or 17 method determine model biasing and The figure of the correlation between error in model biasing.
Figure 20 F are to be used to illustrate when y and z MHz RF generators are open-minded according to the embodiment described in the disclosure When, the wired wafer bias measured using sensor tool, using Figure 13,15 or 17 method determine model biasing and The figure of the correlation between error in model biasing.
Figure 20 G are to be used to illustrate when x, y and z MHz RF generators are opened according to the embodiment described in the disclosure When logical, biased in the wired wafer bias measured using sensor tool, the model determined using the method for Figure 13,15 or 17 The figure of correlation between the error in model biasing.
Figure 21 is the block diagram according to the host computer system of Fig. 1 of the embodiment described in disclosure system.
Figure 22 is the function graft for determining ion energy from wafer bias and peak amplitude for illustrating.
Embodiment
The system that following embodiments describe the ion energy for determining to associate with plasma system using model And method.It is clear that these embodiments can be implemented in the case of some or all of these no details.Separately On the one hand, known technological operation is not described in detail in order to avoid unnecessarily making these embodiment indigestions.
Fig. 1 be for determine impedance matching model 104 it is outgoing position, in the part 173 of RF modes 161 Export (for example, model node N1m) position and electrostatic chuck (ESC) model 125 output (for example, model node N6m) the block diagram of the embodiment of the system 126 of the variable of position, RF modes 161 are the models of RF transmission lines 113.Variable Example include complex voltage, telegram in reply stream, complex voltage and electric current, complex power, ion energy, wafer bias etc..RF transmission lines 113 have There are output, such as node N2.Voltage and current (VI) probe 110 measures the output in x MHz RF generators (for example, node N3) complex voltage of position and electric current VxMHz、IxMHzWithFor example, the first complex voltage and electric current.It should be noted that VxMHzRepresent Voltage magnitude, IxMHzCurrent amplitude is represented, andRepresent VxMHzAnd IxMHzBetween phase.Impedance matching model 104 has There is output, for example, model node N4m.
In addition, the outgoing position (for example, node N5) that voltage and current probe 111 measures in y MHz RF generators is answered Voltage and current VyMHz、IyMHzWithIt should be noted that VyMHzRepresent voltage magnitude, IyMHzCurrent amplitude is represented, andRepresent VyMHzAnd IyMHzBetween phase.
In some embodiments, node is the point in the input point of equipment, the output point of equipment or equipment.Retouch below State equipment as used herein.
In various embodiments, voltage magnitude includes zero-peak amplitude or peak-peak amplitude or root mean square (RMS) amplitude, It belongs to one or more radio frequency values of RF signals.In some embodiments, current amplitude includes zero-peak amplitude or peak-peak Amplitude or RMS amplitude, it belongs to one or more radio frequency values of RF signals.In some embodiments, power magnitude is voltage The product of phase between amplitude, current amplitude, the current amplitude and the voltage magnitude.
X MHz example includes 2MHz, 27MHz and 60MHz.Y MHz example includes 2MHz, 27MHz and 60MHz.x MHz is different from y MHz.For example, when x MHz are 2MHz, y MHz are 27MHz or 60MHz.When x MHz are 27MHz, y MHz is 60MHz.
The example of each VI probes 110 and 111 includes meeting the VI probes of preset formula.The example of preset formula include by Develop the standard that the association of the standard for sensor is followed.Another example of preset formula includes American National Standard technology Research institute (NIST) standard.Shown voltage and current probe 110 or 111 is calibrated according to NIST standards.In this illustration, it is electric Pressure and current probe 110 or 111 are with opening a way, short-circuit or known load couple with calibration voltage and current probe 110 or 111 from And meet NIST standards.Voltage and current probe 110 or 111 can couple with open circuit first, then be coupled with short-circuit, then with Load coupling is known so as to be based on NIST standard calibration voltage and currents probe 110.Voltage and current probe 110 or 111 can by appoint Meaning is coupled sequentially to known load, open circuit and short circuit so as to according to NIST standard calibration voltage and currents probe 110 or 111. Know that the example of load is negative including 50 ohm of load, 100 ohm of load, 200 ohm of load, static load, direct current (DC) Load, resistor, etc..Shown each voltage and current probe 110 and 111 can trace standard according to NIST- and be calibrated.
Voltage and current probe 110 is coupled to the output of x MHz RF generators, such as node N3.X MHz RF generators Output, such as node N3, the input 153 of impedance matching circuit 114 is coupled to via cable 150.In addition, voltage and current is visited Pin 111 is coupled to the output of y MHz RF generators, such as node N5.Output (such as the node N5) warp of y MHz RF generators It is coupled to another input 155 of impedance matching circuit 114 by cable 152.
The input of RF transmission lines 113 is coupled in the output (such as node N4) of impedance matching circuit 114.RF transmission lines 113 Including part 169 and another part 195.The input of part 169 is the input of RF transmission lines 113.Part 169 output (such as Node N1) it is coupled to the input of part 195.Plasma chamber 175 is coupled in the output (such as node N2) of part 195.Part 195 output is the output of RF transmission lines 113.The example of part 169 includes RF cylinders and RF bands (strap).RF cylinders couple To RF bands.The example of part 195 includes RF bars and/or the support member for supporting plasma chamber 175, such as cylinder etc..
Plasma chamber 175 includes electrostatic chuck (ESC) 177, Top electrode 179 and other parts (not shown), other portions Upper dielectric collar of the part for example around Top electrode 179, Top electrode extension of dielectric collar, the lower electricity around ESC 177 on this The lower dielectric collar of pole, the bottom electrode extension around the lower dielectric collar, plasma forbidden zone (PEZ) ring, lower PEZ rings, etc.. Top electrode 179 is located at ESC 177 opposite and towards ESC 177.Workpiece 131, such as semiconductor wafer etc., it is supported on ESC On 177 upper surface 183.Upper surface 183 includes ESC 177 output N6.Workpiece 131 is placed on output N6.Producing During, perform various techniques on workpiece 131, such as chemical vapor deposition, cleaning, deposition, sputtering, etching, ion implanting, Resist stripping etc..Integrated circuit, such as application specific integrated circuit (ASIC), PLD are developed on workpiece 131 (PLD) etc., and the integrated circuit is used in various electronic products, such as cell phone, tablet computer, intelligence electricity Words, computer, notebook computer, network equipment, etc..In bottom electrode and Top electrode 179 each by metal (such as Aluminium, aluminium alloy, copper etc.) it is made.
In one embodiment, Top electrode 179 includes being coupled to the hole of center gas feed arrangement (not shown).Central gas Body feed arrangement receives one or more process gas from gas supply source (not shown).The example of process gas includes oxygen-containing Gas, such as O2.The other examples of process gas include fluoro-gas, such as tetrafluoromethane (CF4), sulfur hexafluoride (SF6), six Fluoroethane (C2F6) etc..Top electrode 179 is grounded.ESC 177 is coupled to x MHz RF generators and y via impedance matching circuit 114 MHz RF generators.
When process gas is supplied between Top electrode 179 and ESC 177 and works as x MHz RF generators and/or y MHz When RF generators provide RF signals to ESC 177 via impedance matching circuit 114 and RF transmission lines 113, the process gas quilt Light to produce plasma in plasma chamber 175.
When x MHz RF generators produce RF signals and will via node N3, impedance matching circuit 114 and RF transmission lines 113 RF signals are supplied to ESC 177 and when y MHz generators produce RF signals and via node N5, impedance matching circuit 114 and RF When RF signals are supplied to ESC 177 by transmission line 113, complex voltage and electric current at the measuring node N3 of voltage and current probe 110 And complex voltage and electric current at the measuring node N5 of voltage and current probe 111.
The complex voltage and electric current measured by voltage and current probe 110 and 111 is from the corresponding He of voltage and current probe 110 111 are provided to the storage hardware unit (HU) for being used to store of host computer system 130 via corresponding communication equipment 185 and 189. For example, the complex voltage and electric current that are measured by voltage and current probe 110 are supplied to main frame via communication equipment 185 and cable 191 System 130 and the complex voltage and electric current that are measured by voltage and current probe 111 are supplied to via communication equipment 189 and cable 193 Host computer system 130.The example of communication equipment includes converting the data into Ethernet data bag and being converted into Ethernet data bag The ethernet device of data, the equipment of Ethernet auto-control technology (EtherCAT), the serial line interface of serially-transmitted data Equipment, the parallel interface equipment of transmitting data in parallel, USB (USB) interface equipment, etc..
The example of host computer system 130 includes computer, such as desktop computer, notebook computer, tablet computer, etc.. Shown host computer system 130 includes processor and storage HU 162.Processor as used herein can be CPU (CPU), microprocessor, application specific integrated circuit (ASIC), PLD (PLD) etc..HU example is stored including read-only Memory (ROM), random access storage device (RAM) or combinations thereof.It can be flash memory, storage disk redundancy battle array to store HU Arrange (RAID), hard disk, etc..
Impedance matching model 104 is stored in storage HU 162.Impedance matching model 104 has and impedance matching circuit The similar feature of 114 feature, for example, electric capacity, inductance, complex power, complex voltage and electric current, etc..For example, impedance matching model 104 have with the capacitor in impedance matching circuit 114 and/or inductor number identical capacitor and/or inductor, and should Capacitor and/or inductor by with impedance matching circuit 114 in a manner of identical mode (such as series, parallel etc.) connect each other Connect.For example, when impedance matching circuit 114 includes the capacitor with inductor series coupled, impedance matching model 104 Including the capacitor with inductor series coupled.
As an example, impedance matching circuit 114 includes one or more electric components and impedance matching model 104 includes The design of impedance matching circuit 114, such as the model of computer generation.The model of computer generation can be based on passing through by processor Input signal that input hardware unit receives at user and generate.The input signal include with which electric component (such as Capacitor, inductor etc.) by electric component model coupled to each other and in a manner of (such as series, parallel etc.) be included relevant letter Number.As another example, the hardware that impedance matching circuit 114 is included between hardware electric component and the electric component connects Connect and the software register of impedance matching model 104 including hardware electric component reaches and the software register of hardware connection reaches.As another Individual example, impedance matching model 104 is designed using software program and impedance matching circuit 114 is made on printed circuit board (PCB) On.Electric component as used herein may include resistor, capacitor, inductor, the connector between resistor, inductor it Between connector, the connector between capacitor, and/or the connector between the combination of resistor, inductor and capacitor.
Similarly, cable model 163 has similar feature to cable 150, and cable model 165 has with cable 152 Similar feature.As an example, the inductance of cable model 163 is identical with the inductance of cable 150.As another example, Cable model 163 be cable 150 computer generation model and cable model 165 be cable 152 computer generation mould Type.
Similarly, RF modes 161 have similar feature to RF transmission lines 113.For example, RF modes 161 have Have and the resistor in RF transmission lines 113, capacitor and/or inductor number identical resistor, capacitor and/or inductance Device, and the resistor, capacitor and/or inductor by with RF transmission lines 113 in a manner of identical mode (such as connect, Parallel connection etc.) it is connected to each other.In order to further illustrate, when RF transmission lines 113 include the capacitor with inductor parallel coupled, RF Mode 161 also includes the capacitor with inductor parallel coupled.In another example RF transmission lines 113 include one or more electricity Gas part and RF modes 161 include the design of RF transmission lines 113, such as the model of computer generation.
In some embodiments, RF modes 161 be related to element (such as capacitor, inductor, resistor, it Combination etc.) feature (for example, electric capacity, resistance, inductance, combinations thereof etc.) computing and be related to and determine these yuan The impedance conversion of the computer generation of connection (such as series, parallel etc.) between part.
Based on the complex voltage and electric current that are received via cable 191 from voltage and current probe 110 and in impedance matching mould The features such as the electric capacity of the elements such as inductor, capacitor in type 104, inductance, the processor of host computer system 130 calculate Output (such as model node N4m) position of impedance matching model 104 complex voltage and electric current V, I andSuch as second is multiple Voltage and current.Complex voltage and electric current at model node N4m be stored in host computer system 130 storage HU 162 and/or In another storage HU, such as in CD, flash memory etc..Multiple V, I andIncluding voltage magnitude V, current amplitude I and the voltage and electricity Phase between stream
The output of impedance matching model 104 is coupled to the input of RF modes 161, and RF modes 161 are stored In storage hardware unit 162.Impedance matching model 104 also has input, such as node N3m, and it be used to receive in node The complex voltage and electric current measured at N3.
RF modes 161 include part 173, another part 197 and output N2m, output N2m by ESC models 125 with Model node N6m is coupled.ESC models 125 are ESC 177 models.For example, ESC models 125 have the feature with ESC 177 Similar feature.For example, ESC models 125 have and ESC 177 inductance, electric capacity, resistance or combinations thereof identical electricity Sense, electric capacity, resistance or combinations thereof.
The input of part 173 is the input of RF modes 161.Input of the output coupling of part 173 to part 197. Part 172 has the feature similar to the feature of part 169, and part 197 has the feature similar to the feature of part 195.
Based on the complex voltage and electric current measured at model node N4m, the processor of host computer system 130 calculates to be transmitted in RF The complex voltage and electric current V, I of output (for example, model node N1m) position of the part 173 of model 161 andSuch as the 3rd is multiple Voltage and current.The complex voltage and electric current determined at model node N1m is stored in the storage HU 162 of host computer system 130 And/or in another storage HU (such as CD, flash memory etc.).
In some embodiments, the 3rd complex voltage and electricity are determined instead of determining the 3rd complex voltage and electric current or being additional to Stream, complex voltage and electric current of the processor of host computer system 130 based on the outgoing position in impedance matching model 104 and is passed in RF Point (such as node etc.) of the feature calculation of the element between point in the input and part 173 of defeated model 161 in part 173 The complex voltage and electric current at place, for example, among complex voltage and electric current V, I and
In various embodiments, instead of determining the 3rd complex voltage and electric current or being additional to determine the 3rd complex voltage and electricity Stream, complex voltage and electric current of the processor of host computer system 130 based on the outgoing position in impedance matching model 104 and is passed in RF Point (such as node etc.) of the feature calculation of the element between point in the input and part 197 of defeated model 161 in part 197 The complex voltage and electric current at place, for example, among complex voltage and electric current V, I and
It should be noted that in some embodiments, complex voltage and electricity based on the outgoing position in x MHz RF generators Stream, cable model 163 element feature and impedance matching model 104 feature calculation in the defeated of impedance matching model 104 The complex voltage and electric current of out position.
It shall also be noted that though it is shown that two generators are coupled to impedance matching circuit 114, but in an embodiment In, any number of RF generators (for example, single generator, three generators etc.) via impedance matching circuit be coupled to etc. from Daughter room 175.For example, 2MHz generators, 27MHz generators and 60MHz generators can be coupled to via impedance matching circuit Gas ions room 175.For example, although the contact of above-mentioned embodiment is retouched using the complex voltage and electric current measured at node N3 State, but in various embodiments, above-mentioned embodiment also may be used at the complex voltage and electric current measured at node N5.
Fig. 2 is to be used to determine the method in the complex voltage and electric current of the outgoing position of RF modes part 173 (Fig. 1) The flow chart of 102 embodiment.Method 102 by host computer system 130 (Fig. 1) computing device.In operation 106, from depositing The complex voltage and electric current that identification measures at node N3 in storage HU 162 (Fig. 1), such as the first complex voltage and electric current.Citing comes Say, be to determine from voltage and current probe 110 (Fig. 1) the first complex voltage of reception and electric current.As another example, based on electricity The homogeneity (identity) being stored in storage HU 162 (Fig. 1) of pressure and current probe 110, the first complex voltage and electric current with The homogeneity is associated what is be to determine.
Further, in operation 107, the electric component generation impedance matching model based on impedance matching circuit 114 (Fig. 1) 104 (Fig. 1).For example, between the electric component of impedance matching circuit 114 connection and the electric component feature via with master The input hardware unit that machine system 130 couples is supplied to the processor of host computer system 130 by user.Receiving the connection and institute On the basis of stating feature, processor generation is with the member with the feature identical feature of the electric component of impedance matching circuit 114 Part simultaneously generates connection between the element with the connection identical connection between the electric component.
The input of impedance matching model 163, such as node N3m, receive the first complex voltage and electric current.For example, host computer system 130 processor accesses (such as reading etc.) the first complex voltage and electric current from storage HU 162 and carries the first complex voltage and electric current The input of impedance matching model 104 is supplied to handle the first complex voltage and electric current.
In operation 116, by the first complex voltage and electric current from the input of impedance matching model 104 (such as node N3m (figures 1)) transport through impedance matching model 104 (Fig. 1) one or more elements reach impedance matching model 104 output (such as Node N4m (Fig. 1)) to determine the second complex voltage and electric current, the second complex voltage and electric current are located at the output of impedance matching model 104 Position.For example, with reference to figure 3B, when 2MHz RF generators be open (such as operation, it is connecting, be coupled to such as example The equipment of the impedance matching circuit 104 of such as plasma system 126 etc) when, the electric capacity based on capacitor 253, based on electricity Container C5 electric capacity and determined based on the first complex voltage for being received at input 255 and electric current in (such as the middle node of node 251 Point) place complex voltage and electric current Vx1, Ix1 andComplex voltage and electric current among such as, it includes voltage magnitude Vx1, electric current Phase between amplitude Ix1 and the complex voltage and electric currentIn addition, based on complex voltage and electric current Vx1, Ix1 andWith And inductance based on inductor L3 determine complex voltage at node 257 and electric current Vx2, Ix2 andComplex voltage and electric current Vx2, Ix2 andIncluding the phase between voltage magnitude Vx2, current amplitude Ix2 and the voltage and currentWhen 27MHz RF generators and 60MHz RF generators be close (for instance in non-operating state, power-off, with impedance matching electricity Decoupling of road 104 etc.) when, complex voltage and electric current V2, I2 andThe second complex voltage and electric current being determined to be at output 259, it is defeated Go out 259 examples for being impedance matching model 104 (Fig. 1) output (such as model node N4m (Fig. 1)).Complex voltage and electric current V2, I2 andBased on complex voltage and electric current Vx2, Ix2 andAnd the inductance based on inductor L2 is determined.Complex voltage and Electric current V2, I2 andIncluding the phase between voltage magnitude V2, current amplitude I2 and the voltage and current
Similarly, when 27MHz RF generators be open and 2MHz and 60MHz RF generators be close when, defeated The complex voltage and electric current V27, I27 that go out at 259 andBased on the complex voltage and electric current that are received at node 261 and electricity Sensor LPF2, capacitor C3, capacitor C4 and inductor L2 feature are determined.Complex voltage and electric current V27, I27 and Including the phase between voltage magnitude V27, current amplitude I27 and the voltage and currentReceived at node 261 Complex voltage and electric current it is identical with the complex voltage and electric current measured at node N5 (Fig. 1) place.When 2MHz and 27MHz RF generators The two be open and 60MHz RF generators are when closing, complex voltage and electric current V2, I2,V27, I27 and It is the example of the second complex voltage and electric current.In addition, similarly, when 60MHz RF generators be open and 2MHz and 27MHz RF Generator be close when, output 259 at complex voltage and electric current V60, I60 andBased on being received at node 265 Complex voltage and electric current and inductor LPF1, capacitor C1, capacitor C2, inductor L4, capacitor 269 and inductor L1 Feature is determined.Complex voltage and electric current V60, I60 andIncluding voltage magnitude V60, current amplitude I60 and the voltage Phase between electric currentWhen 2MHz, 27MHz and 60MHz RF generators are all to open, complex voltage and electric current V2、I2、V27、I27、V60, I60 andIt is the example of the second complex voltage and electric current.
In operation 117, the electric component generation RF modes 161 (Fig. 1) based on RF transmission lines 113 (Fig. 1).Example Such as, the feature of the connection between the electric component of RF transmission lines 113 and the electric component is via coupling with host computer system 130 Input equipment is supplied to the processor of host computer system 130 by user.On the basis of the connection and the feature is received, processing Device generation with the element of the feature identical feature of the electric component of RF transmission lines 113 and between the element generation with Connection identical connection between the electric component.
In operation 119, the input of the second complex voltage and electric current from RF modes 113 is transported through into RF modes One or more elements of part 173 reach the output (such as model node N1m (Fig. 1)) of RF modes part 173 with determination In the 3rd complex voltage and electric current of the outgoing position of RF modes part 173.For example, with reference to figure 5B, when 2MHz RF are sent out Raw device be open and 27 and 60MHz RF generators are when closing, the inductance based on inductor Ltunnel, based on capacitor Ctunnel electric capacity and based on the complex voltage as the second complex voltage and the example of electric current and electric current V2, I2 and(Fig. 3 B) is true Be scheduled on node 293 (such as intermediate node) place complex voltage and electric current Vx4, Ix4 andComplex voltage and electric current among such as. It should be noted that Ltunnel be the inductance of the computer-generated model in RF tunnels and Ctunnel be RF tunnel models electric capacity.This Outside, based on complex voltage and electric current Vx4, Ix4 andAnd the inductance based on inductor Lstrap is determined in tunnel and band model Complex voltage and electric current V21, I21 at 210 output 297 andOutput 297 is part 173 (Fig. 1) output (such as mould Type node N1m (Fig. 1)) example.It should be noted that Lstrap is the inductance of the computer-generated model of RF bands.When 2MHz RF are sent out Raw device be open and 27 and 60MHz RF generators are when closing, complex voltage and electric current V21, I21 andIt is confirmed as The 3rd complex voltage and electric current at output 297.
Similarly, when 27MHz RF generators be open and 2 and 60MHz RF generators be close when, exporting Complex voltage and electric current V271, I271 at 297 andBased on output 259 at complex voltage and electric current V27, I27 and(Fig. 3 B) and inductor Ltunnel, capacitor Ctunnel and inductor Lstrap feature are determined.Work as 2MHz With both 27MHz RF generators be open and 60MHz RF generators are when closing, complex voltage and electric current V21, I21,V271, I271 andIt is the example of the 3rd complex voltage and electric current.
In addition, similarly, when 60MHz RF generators are opened and 2 and 27MHz RF generators power off, at output 297 Complex voltage and electric current V601, I601 andBased on the complex voltage and electric current V60, I60 received at node 259 and(Fig. 3 B) and inductor Ltunnel, capacitor Ctunnel and inductor Lstrap feature are determined.When 2MHz, 27MHz and 60MHz RF generators be open when, complex voltage and electric current V21, I21,V271、I271、V601, I601 andIt is the example of the 3rd complex voltage and electric current.Method 102 terminates after operation 119.
Fig. 3 A are the block diagrams of the embodiment of system 123, and it is used to illustrate impedance matching circuit 122.Impedance matching circuit 122 be impedance matching circuit 114 (Fig. 1) example.Impedance matching circuit 122 include electric component between being connected in series and/ Or being connected in parallel between electric component.
Fig. 3 B are the circuit diagrams of the embodiment of impedance matching model 172.Impedance matching model 172 is impedance matching model 104 (Fig. 1) example.As illustrated, impedance matching model 172 include with electric capacity C1 to C9 capacitor, have LPF1, The inductor of LPF2 and L1 to L4 inductance.It should be noted that in figure 3b, inductor and/or capacitor side coupled to each other Formula is exemplary.For example, inductor shown in Fig. 3 B and/or capacitor can be coupled to each other in series and/or in parallel. In addition, in some embodiments, impedance matching model 172 is included with capacitor and/or inductor number shown in Fig. 3 B not Same capacitor and/or inductor.
Fig. 4 is the figure of the embodiment of system 178, and it is used to illustrate RF transmission lines 181, and RF transmission lines 181 are that RF is passed The example of defeated line 113 (Fig. 1).RF transmission lines 181 include cylinder 148, such as tunnel.Insulated in hollow interior be provided with of cylinder 148 Body 151 and RF bars 142.The combination of cylinder 148 and RF bars 142 is the example of the part 169 (Fig. 1) of RF transmission lines 113 (Fig. 1). By bolt B 1, B2, B3 and B4, RF transmission lines 181 arrive impedance matching circuit 114 by fixation (bolt).In one embodiment, RF transmission lines 181 are fixed (bolt) by any number of bolt and arrive impedance matching circuit 114.In some embodiments, Instead of bolt or in addition to bolt, the connector (for example, glue, screw etc.) of any other form is used for RF transmission lines 181 are connected to impedance matching circuit 114.
The output coupling of RF transmission poles 142 and impedance matching circuit 114.In addition, RF bands 144 (also referred to as RF spoons) and RF bars 142 and RF bars 199 couple, and a part for RF bars 199 is located in support member 146 (for example, cylinder).Include the support of RF bars 199 Part 146 is part 195 (Fig. 1) example.In one embodiment, cylinder 148, RF bars 142, RF bands 144, the and of support member 146 The combination of RF bars 199 forms RF transmission lines 181, and RF transmission lines 181 are RF transmission lines 113 (Fig. 1) examples.Support member 146 is Plasma chamber provides support.Support member 146 is connected to the ESC 177 of plasma chamber.RF signals from x MHz generators via Cable 150, impedance matching circuit 114, RF bars 142, RF bands 144 and RF bars 199 are provided to ESC 177.
In one embodiment, ESC 177 includes heating element heater and the electrode on the top of the heating element heater.It is real one Apply in mode, ESC 177 includes heating element heater and bottom electrode.In one embodiment, ESC 177 includes bottom electrode and embedded in shape Into the heating element heater in the hole in bottom electrode, such as coil line etc..In some embodiments, electrode by metal (such as aluminium, Copper etc.) it is made.It should be noted that RF transmission lines 181 provide bottom electrode of the RF signals to ESC 177.
Fig. 5 A are the block diagrams of the embodiment of system 171, and it is used for the circuit model for illustrating RF transmission lines 113 (Fig. 1) 176.For example, circuit model 176 includes the company between the connection between inductor and/or capacitor, inductor, capacitor Connect, and/or the connection between inductor and capacitor.The example of connection includes series connection and/or is connected in parallel.Circuit model 176 It is RF modes 161 (Fig. 1) example.
Fig. 5 B are the figures of the embodiment of circuit 180, and it is used to illustrate tunnel and band model 210, tunnel and band model 210 be the example of the part 173 (Fig. 1) of RF transmission line models 161 (Fig. 1).Circuit 180 include impedance matching model 172 and Tunnel and band model 210.Tunnel and band model 210 include inductor Ltunnel and Lstrap and capacitor Ctunnel.Should Work as attention, inductor Ltunnel represents the inductance of cylinder 148 (Fig. 4) and RF bars 142 and capacitor Ctunnel represents cylinder 148 With the electric capacity of RF bars 142.In addition, inductor Lstrap represents RF bands 144 (Fig. 4) inductance.
In one embodiment, tunnel and band model 210 include any number of inductor and/or any number of electric capacity Device.In this embodiment, tunnel and band model 210 coupled including a capacitor with another capacitor, inductor and capacitor Any mode (such as series, parallel etc.) that coupling, and/or an inductor couple with another inductor.
Fig. 5 C are the figures of the embodiment of circuit 300, and it is used to illustrate tunnel and band model 302, tunnel and band model 302 be the example of the part 173 (Fig. 1) of RF transmission line models 161 (Fig. 1).Tunnel and band model 302 are via the coupling of output 259 To impedance matching model 172.Tunnel and band model 302 include the inductor of 20 nanohenrys (NH) inductance and have 15 pico farads (pF), the capacitor of 31pF, 15.5pF and 18.5pF electric capacity.Tunnel and band model 302 are coupled to RF cylinders via node 304, RF cylinders are coupled to ESC 177 (Fig. 1).RF cylinders are part 195 (Fig. 1) examples.
It should be noted that in some embodiments, the inductor and capacitor of tunnel and band model 302 have other values. For example, 20nH inductors have scope between 15 and 20nH or the inductance between 20 and 25nH.As another example Two or more in the inductor of son, tunnel and band model 302 have different induction.As another example, 15pF electric capacity Utensil has electric capacity of the scope between electric capacity 8pF and 25pF, and 31pF capacitors have scope between 15pF and 45pF Electric capacity, 15.5pF capacitors have electric capacity of the scope between 9pF and 20pF, and 18.5pF capacitors have scope between Electric capacity between 10pF and 27pF.
In various embodiments, any amount of inductor is included in tunnel and band model 302 and in tunnel and Band model 302 includes any number of capacitor.
Fig. 6 is the schematic diagram for illustrating an embodiment of the circuit 310 of cylinder and ESC models 312, cylinder and ESC Model 312 is the combination of inductor 313 and capacitor 316.Cylinder and ESC models 312 include type cylinder models and ESC models, ESC Model is ESC models 125 (Fig. 1) example.Type cylinder models are the examples of the part 197 (Fig. 1) of RF modes 161 (Fig. 1). Cylinder and ESC models 312 have the feature similar with the feature of part 195 and ESC 177 (Fig. 1) combination.For example, cylinder and ESC models 312 have the resistance identical resistance with part 195 and ESC 177 combination.As another example, cylinder and ESC Model 312 has the inductance identical inductance with part 195 and ESC 177 combination.As another example, cylinder and ESC moulds Type 312 has the electric capacity identical electric capacity with part 195 and ESC 177 combination.As another example, cylinder and ESC moulds Type 312 has and the inductance of part 195 and ESC 177 combination, resistance, electric capacity or combinations thereof identical inductance, electricity Resistance, electric capacity or combinations thereof.
Cylinder and ESC models 312 are coupled to tunnel and band model 302 by node 318.Node 318 is model node N1m The example of (Fig. 1).
It should be noted that in some embodiments, using not being 44 milihenry (mH with inductance in cylinder and ESC models 312 ) inductor.For example, using has inductor of the inductance range from 35mH to 43.9mH or from 45.1mH to 55mH.Each In kind embodiment, the capacitor for electric capacity not being 550pF is used.For example, 550pF capacitors are substituted, using with electric capacity Capacitor of the scope between 250 and 550pF or between 550 and 600pF.
Processor computation model 172, tunnel and the band model 302 and cylinder and ESC models of host computer system 130 (Fig. 1) The combined impedance of 312 combination, for example, total impedance etc..By combined impedance and the complex voltage and electricity that are determined at model node 318 Stream is used as inputting to calculate complex voltage and the impedance at node N6m by the processor of host computer system 130.It should be noted that post The output of body and ESC models 312 is model node N6m.
Fig. 7 is the block diagram for determining the embodiment of the system 200 of variable.System 200 includes plasma chamber 135, Plasma chamber 135 further comprises ESC 201 and with input 285.Plasma chamber 135 is plasma chamber 175 (Fig. 1) Example and ESC 201 be ESC 177 (Fig. 1) example.ESC 201 includes heating element heater 198.In addition, ESC 201 is by edge Ring (ER) 194 is surround.ER 194 includes heating element heater 196.In one embodiment, ER 194 contributes to uniform etch-rate With the etch rate drift of the adjacent edges in the workpiece 131 supported by ESC 201 of reduction.
Power source 206 via wave filter 208 supplies power to heating element heater 196 to heat heating element heater 196 and power source 204 supply power to heating element heater 198 to heat heating element heater 198 via wave filter 202.In one embodiment, single work( Rate source supplies power to both heating element heaters 196 and 198.Wave filter 208 filters out the preset frequency received from power source 206 Power signal and wave filter 202 filter out the power signal of the preset frequency received from power source 204.
Heating element heater 198 is heated by the power signal received from power source 204 so that ESC 201 electrode is maintained into hope Temperature so that the environment in plasma chamber 135 further is maintained into desired temperature.In addition, heating element heater 196 is by connecing Receive and heated from the power signal of power source 206 so that ER 194 is maintained into desired temperature so as to further by plasma chamber Environment in 135 maintains desired temperature.
It should be noted that in one embodiment, ER 194 and ESC 201 include any number of heating element heater and any class The heating element heater of type.For example, ESC 201 includes electrical induction heating element or metallic plate.In one embodiment, ESC 201 and ER Each of 194 include one or more cooling elements that permission cold water etc. passes through, such as one or more pipes, by plasma Body room 135 maintains desired temperature.
Further, it is to be noted that in one embodiment, system 200 includes any number of wave filter.For example, work( It is coupled to ESC 201 and ER 194 via single wave filter in rate source 204 and 206.
Fig. 8 A are the figures of the embodiment of system 217, and it is used to illustrate the model of wave filter 202 and 208 (Fig. 7) to carry The precision of high variable.System 217 includes being coupled to the tunnel and band model 210 of model 216, model 216 via type cylinder models 211 Capacitor and/or inductor including wave filter 202 and 208 and the connection between them.Model 216 is stored in storage HU In 162 (Fig. 1) and/or other storage HU.The capacitor and/or inductor of model 216 with such as parallel way, series system or The modes such as its combination are coupled to each other.Model 216 represents the electric capacity and/or inductance of wave filter 202 and 208.
In addition, system 217 includes type cylinder models 211, type cylinder models 211 are RF bars 199 (Fig. 4) and support member 146 (Fig. 4) Computer-generated model.Type cylinder models 211 have the spy similar with the feature of RF bars 199 and the electric component of support member 146 Sign.Type cylinder models 211 are including between the connection between one or more capacitors, one or more inductors, inductor, capacitor Connection, and/or the connection between capacitor and the combination of inductor.
Processor computation model 216, tunnel and the band model 210 of host computer system 130 (Fig. 1) and type cylinder models 211 Combined impedance, such as total impedance etc..Combined impedance provides the complex voltage and impedance at node N2m.By it is determined that in node Include model 216 during variable at N2m and tunnel and band model 210, the precision of the variable are enhanced.It should be noted that mould The output of type 216 is model node N2m.
Fig. 8 B are the figures of the embodiment of system 219, and it is used to illustrate the model of wave filter 202 and 208 (Fig. 7) to carry The precision of high variable.System 219 includes tunnel and band model 210 and model 218, model 218 are coupled in parallel to tunnel and band Model 210.Model 218 is model 216 (Fig. 8 A) example.Model 218 includes inductor Lfilter, inductor Lfilter generations The combination inductance of table wave filter 202 and 208.Model 218 also includes capacitor Cfilter, and capacitor Cfilter represents wave filter 202 and 208 direct combination capacitor.
Fig. 9 is the system 236 for measuring the variable at the output 231 of RF generators 220 using VI probes 238 The block diagram of embodiment.Output 231 is node N3 (Fig. 1) or node N5 (Fig. 1) example.RF generators 220 are x MHz hairs The example of raw device or y MHz generators (Fig. 1).Host computer system 130 produces the digital pulse signal 213 with two or more states And provide it to digital signal processor (DSP) 226.In one embodiment, digital pulse signal 213 is transistor-crystalline substance Body pipe logic (TTL) signal.The state and numerical value that the example of the state is 1 including conducting state and cut-off state, numerical value are 0 State, high state and low state, etc..
In another embodiment, it is used to produce instead of host computer system 130, clock oscillator (such as crystal oscillator) Clock signal is simulated, the simulation clock signal is converted into the data signal similar to digital pulse signal 213 by analog-digital converter.
Digital pulse signal 213 is sent to DSP 226.DSP 226 receives digital pulse signal 213 and identifies digital arteries and veins Rush the state of signal 213.For example, DSP 226 determines that digital pulse signal 213 has the first amount during first group of period Level, such as value 1, high state magnitude etc., and there is the second magnitude during second group of period, such as value 0, low state magnitude etc..DSP 226 determine digital pulse signal 213 during first group of period with state S1 and with shape during second group of period State S0.The state and cut-off state that state S0 example includes low state, value is 0.State S1 example includes high state, value is 1 State and conducting state.In another example DSP 226 by the magnitude of digital pulse signal 213 compared with pre-stored value To determine that the magnitude of the digital pulse signal 213 during first group of period is more than pre-stored value and in second group of period Magnitude of the period digital pulse signal 213 during state S0 is no more than pre-stored value.The implementation of clock oscillator when in use In mode, DSP 226 receives simulation clock signal from clock oscillator, and the analog signal is converted into digital form, Ran Houshi Other two states S0 and S1.
When state is identified as S1, DSP 226 provides performance number P1 and/or frequency value F 1 to parameter controller 222.This Outside, when state is identified as S0, DSP 226 provides performance number P0 and/or frequency value F 0 to parameter controller 224.For adjusting The example of the parameter controller of harmonics rate includes automatic-frequency tuner (AFT).
It should be noted that parameter controller 222, parameter controller 224 and DSP 226 are the parts of control system 187.Example Such as, parameter controller 222 and parameter controller 224 are the logical blocks as the part of the computer program performed by DSP 226, Such as resonant tank etc..In some embodiments, computer program is embodied in non-volatile computer-readable medium (example Such as store HU) in.
In one embodiment, instead of parameter controller, the controller such as hardware control, ASIC, PLD is used.Example Such as, parameter controller 222 is replaced using hardware control, parameter controller 224 is replaced using another hardware control.
In received power value P1 and/or frequency value F 1, parameter controller 222 carries performance number P1 and/or frequency value F 1 The driver 228 of supply actuator and amplifier system (DAS) 232.The example of driver includes analog line driver, electric current drives Device, voltage driver, transistor, etc..Driver 228 produces the RF signals with performance number P1 and/or frequency value F 1 and will The RF signals are supplied to DAS 232 amplifier 230.
In one embodiment, driver 228 produce with function the driving power value as performance number P1 and/or The RF signals of driving frequency value with the function as frequency value F 1.For example, driving power value is in some (such as 1 to 5 etc.) Watt performance number P1 in the range of and driving frequency value in the range of some (such as 1 to 5 etc.) Hz frequency value F 1.
RF signal of the amplification of amplifier 230 with performance number P1 and/or frequency value F 1 simultaneously produces self-driven corresponding to receiving The RF signals 215 of the RF signals of device 228.For example, the quantity of power that amount of the RF signals 215 with specific power values P1 is high.In another example RF Signal 215 has the amount identical quantity of power with performance number P1.RF signals 215 pass via cable 217 and impedance matching circuit 114 Give ESC 177 (Fig. 1).
Cable 217 is the example of cable 150 or cable 152 (Fig. 1).For example, when RF generators 220 are that x MHz RF occur During the example of device (Fig. 1), cable 217 is the example of cable 150, and when RF generators 220 are y MHz RF generators (Fig. 1) During example, cable 217 is the example of cable 152.
As performance number P1 and/or frequency value F 1 is supplied to DAS 232 by parameter controller 222 and RF signals 215 are generated When, VI probes 238 measure the value of the variable at the output 231 coupled with cable 217.VI probes 238 are VI probes 110 or VI The example of probe 111 (Fig. 1).The value of variable is sent to host computer system 130 by VI probes 238 via communication equipment 233, for leading Machine system 130 performs method 102 (Fig. 2) and method described herein 340,351 and 363 (Figure 13,15 and 17).Communication equipment 233 be communication equipment 185 or 189 (Fig. 1) example.Communication equipment 233 using such as Ethernet, EtherCAT, USB, it is serial, Parallel, data are sent to by package (packetization), agreements such as (depacketization) of unpacking from VI probes 238 Host computer system 130.In various embodiments, host computer system 130 includes the communication using agreement used by communication equipment 233 Equipment.For example, when communication equipment 233 is using packetizing protocol, the communication equipment of host computer system 130 uses shrinkwrap agreement.Example again Such as, when communication equipment 233 is using serial transmission protocol, the communication equipment of host computer system 130 uses serial transmission protocol.
Similarly, as received power value P0 and/or frequency value F 0, parameter controller 224 is by performance number P0 and/or frequency Value F0 is supplied to driver 228.Driver 228 produces the RF signals with performance number P0 and/or frequency value F 0 and believes the RF Number it is supplied to amplifier 230.
In one embodiment, driver 228 produce with function the driving power value as performance number P0 and/or The RF signals of driving frequency value with the function as frequency value F 0.For example, driving power value is in some (such as 1 to 5) watt In the range of special performance number P0 and driving frequency value in the range of some (such as 1 to 5) Hz frequency value F 0.
RF signal of the amplification of amplifier 230 with performance number P0 and/or frequency value F 0 simultaneously produces self-driven corresponding to receiving The RF signals 221 of the RF signals of device 228.For example, the quantity of power that amount of the RF signals 221 with specific power values P0 is high.In another example RF Signal 221 has the amount identical quantity of power with performance number P0.RF signals 221 pass via cable 217 and impedance matching circuit 114 Give known load 112 (Fig. 2).
As performance number P0 and/or frequency value F 0 is supplied to DAS 232 by parameter controller 222 and RF signals 221 are generated When, VI probes 238 measure the value of the variable at output 231.The value of variable is sent to host computer system 130 by VI probes 238, is used Method 102 (Fig. 2), method 340 (Figure 13), method 351 (Figure 15) or method 363 (Figure 17) are performed in host computer system 130.
It should be noted that in one embodiment, VI probes 238 and DSP 226 is decoupled.In some embodiments, VI is visited Pin 238 is coupled to DSP 226.Further, it is to be noted that the caused RF signals 215 and in state S0 during state S1 RF signals 221 caused by period are the parts for combining RF signals.For example, RF signals 215 are that have the work(higher than RF signal 221 A part for the combination RF signals of rate amount, RF signals 221 are the another part for combining RF signals.
Figure 10 is that the block diagram of the embodiment of system 250, wherein VI probes 238 and communication equipment 233 are located at RF generators 220 outside.In Fig. 1, VI probes 110 are located in x MHz RF generators to measure the carry-out bit in x MHz RF generators The variable put.VI probes 238 are located at the outsides of RF generators 220 to measure the variable at the output 231 of RF generators 220. VI probes 238 are associated with the output 231 of RF generators 220 (for example, coupling).
Figure 11 is the block diagram of the embodiment of system 128, wherein the value quilt using variable determined by Fig. 1 system 126 Use.System 128 includes m MHz RF generators, n MHz RF generators, impedance matching circuit 115, RF transmission lines 287 and waited Gas ions room 134.Plasma chamber 134 can be similar to plasma chamber 175.
It should be noted that in one embodiment, Fig. 2 x MHz RF generators are similar to m MHz RF generators and Fig. 2 Y MHz RF generators be similar to n MHz RF generators.For example, x MHz be equal to m MHz and y MHz are equal to n MHz.Example again Such as, x MHz generators and m MHz generators are with similar frequency and y MHz generators and n MHz generators are with similar Frequency.The example of similar frequencies is when x MHz are in the window (window) of m MHz frequencies (for example, in the range of kHz or Hz) When.In some embodiments, Fig. 2 x MHz RF generators y MHz RF not similar with m MHz RF generators and Fig. 2 Generator is not similar with n MHz RF generators.
It is further noted that in various embodiments, with used in x MHz and y MHz RF generators each In the different sensor of sensor type be used in each of m MHz and n MHz RF generators.For example, do not follow The sensor of NIST standards is used in m MHz RF generators.In another example only the voltage sensor of measurement voltage is used in m In MHz RF generators.
Further, it is to be noted that in one embodiment, impedance matching circuit 115 is similar to impedance matching circuit 114 (Fig. 1).For example, the impedance of impedance matching circuit 114 is identical with the impedance of impedance matching circuit 115.In another example impedance matching is electric The impedance on road 115 is in the window of the impedance of impedance matching circuit 114 (for example, the 10- of the impedance in impedance matching circuit 114 In 20%).In some embodiments, impedance matching circuit 115 is not similar with impedance matching circuit 114.
Impedance matching circuit 115 includes electric component (such as inductor, capacitor etc.) so as to be coupled in impedance matching electricity The matches impedances of load of the impedance of the power source on road 115 with being coupled in circuit 115.For example, impedance matching circuit 114 makes coupling Together in source (such as m MHz generators, the n MHz RF generators and by m MHz generators and n MHz of impedance matching circuit 114 The combination of the cable of RF generators coupling) impedance and load (such as combination of plasma chamber 134 and the grade of RF transmission lines 287) Impedance matching.
It should be noted that in one embodiment, RF transmission lines 287 are similar to RF transmission lines 113 (Fig. 1).For example, RF is transmitted The impedance of line 287 is identical with the impedance of RF transmission lines 113.In another example resistance of the impedance of RF transmission lines 287 in RF transmission lines 113 In anti-window (for example, in 10-20% of the impedance of RF transmission lines 113).In various embodiments, RF transmission lines 287 are not It is similar with RF transmission lines 113.
Plasma chamber 134 includes ESC 192, Top electrode 264 and other parts (not shown), other parts and for example enclosed Upper dielectric collar around Top electrode 264, the Top electrode extension around upper dielectric collar, the lower dielectric of the bottom electrode around ESC 192 Ring, the bottom electrode extension around lower dielectric collar, plasma forbidden zone (PEZ) ring, lower PEZ rings, etc..Top electrode 264 In ESC 192 opposite and towards ESC 192.Workpiece 262, such as semiconductor wafer etc., it is supported on ESC 192 upper surface On 263.Each in Top electrode 264 and ESC 192 bottom electrode is made by metal (such as aluminium, aluminium alloy, copper etc.).
In one embodiment, Top electrode 264 includes being coupled to the hole of center gas feed arrangement (not shown).Central gas Body feed arrangement receives one or more process gas from gas supply source (not shown).Top electrode 264 is grounded.ESC 192 It is coupled to m MHz RF generators and n MHz RF generators via impedance matching circuit 115.
When process gas is supplied between Top electrode 264 and ESC 192 and works as m MHz RF generators and/or n MHz When RF generators supply power to ESC 192 via impedance matching circuit 115, the process gas is combusted in plasma Plasma is produced in room 134.
It should be noted that system 128 is measured in impedance without probe (for example, metering outfit, VI probes, voltage probe etc.) At point at the output 283 of match circuit 115, on RF transmission lines 287 or the variable at ESC 192.In model node Variate-value at N1m, N2m, N4m and N6m is used to determine whether system 128 is run as desired.
In various embodiments, system 128 does not have wafer bias sensor (for example, direct current in situ (DC) probe pins (pick-up pin)) and it is used to measure the related hardware of wafer bias at ESC 192.Sensed without using wafer bias Device and related hardware save cost.
It shall also be noted that in embodiments, system 128 includes any number of RF hairs for being coupled to impedance matching circuit Raw device.
Figure 12 A, 12B and 12C are to be illustrated in the impedance matching circuit by using voltage probe in system 126 (Fig. 1) The voltage (such as RMS-voltage, crest voltage etc.) and Application way 102 that 114 (Fig. 1) output (such as node N4) place measures The correlation between the voltage (such as crest voltage etc.) at corresponding model node output (such as node N4m) place that (Fig. 2) is determined The figure of the embodiment of the figure 268,272 and 275 of property.In addition, Figure 12 A, 12B and 12C are illustrated in by using electric current The electric current (such as root mean square (RMS) electric current etc.) and utilize that probe measures at output (such as node N4) place of system 126 (Fig. 1) The correlation between the electric current (such as RMS current etc.) at corresponding output (such as node N4m) place that method 102 (Fig. 2) determines Figure 270,274 and 277 embodiment figure.
Voltage probe is utilized in the x-axis that the voltage that Application way 102 determines is plotted in each figure 268,272 and 275 The voltage measured is plotted in the y-axis in each figure 268,272 and 275.Similarly, the electric current that Application way 102 determines is drawn The electric current measured in x-axis in each figure 270,274 and 277 using current probe is plotted in each figure 270,274 and 277 In y-axis on.
When x MHz RF generators open and y MHz RF generators and z MHz RF generators (such as 60MHz RF occur Device) close when, voltage is plotted in figure 268.In addition, when y MHz RF generators are opened and x and z MHz RF generators pass When closing, voltage is plotted in figure 272.In addition, when z MHz RF generators are opened and x and y MHz RF generators are closed, Voltage is plotted in figure 275.
Similarly, when x MHz RF generators are opened and y MHz RF generators and z MHz RF generators are closed, electricity Stream is plotted in figure 270.In addition, when y MHz RF generators are opened and x and z MHz RF generators are closed, electric current is drawn In figure 274.In addition, when z MHz RF generators are opened and x and y MHz RF generators are closed, electric current is plotted in figure In 277.
It is visible in each figure 268,272 and 275, the voltage being plotted in figure in y-axis and the electricity being plotted in figure in x-axis Near-linear dependency between pressure be present.Similarly, it is visible in each figure 270,274 and 277, drawing electric current on the y axis And it is plotted between the electric current in x-axis and near-linear dependency is present.
Figure 13 is to be used to determine the model node in plasma system 126 (Fig. 1) (for example, model node N4m, model Node N1m, model node N2m, model node N6m etc.) place biasing method 340 embodiment flow chart.It should note Meaning, in some embodiments, wafer bias are straight as caused by the caused plasma in plasma chamber 175 (Fig. 1) Flow (DC) voltage.In these embodiments, wafer bias is present on ESC177 (Fig. 1) surface (for example, upper surface 183) And/or on the surface (for example, upper surface) of workpiece 131 (Fig. 1).
It shall also be noted that model node N1m and N2m be on RF modes 161 (Fig. 1) and model node N6m be On ESC models 125 (Fig. 1).Method 340 is by host computer system 130 (Fig. 1) computing device.In method 340, behaviour is performed Make 106.
In addition, in operation 341, corresponding one or more devices are generated (for example, impedance matching circuit 114, RF transmission lines 113rd, ESC 177, combinations thereof etc.) one or more models, for example, impedance matching model 104, RF modes 161, ESC models 125 (Fig. 1), combinations thereof etc..For example, generation ESC models 125, make it have to ESC 177 (Fig. 1) similar Feature.
In operation 343, the complex voltage identified in operation 106 and electric current are transported through into one or more of models One or more elements, to determine complex voltage and electric current at the output of one or more of models.For example, from first Complex voltage and electric current determine the second complex voltage and electric current.In another example determine the second complex voltage and electricity from the first complex voltage and electric current Flow and determine the 3rd complex voltage and electric current from the second complex voltage and electric current.It is true from the first complex voltage and electric current as another example Fixed second complex voltage and electric current, the 3rd complex voltage and electric current are determined from the second complex voltage and electric current, and by the 3rd complex voltage and Electric current transports through the parts 197 of RF modes 161 (Fig. 1) to determine the 4th complex voltage and the electricity at model node N2m Stream.In this example, the 4th complex voltage and electric current are the elements by the way that the 3rd complex voltage and electric current to be transported through to part 197 Impedance determines.As another example, RF modes 161 provide the generation of the computing device by host computer system 130 Logarithmic transfer function so as to the complex voltage that will be measured at one or more outputs of one or more RF generators and electric current along RF modes 161 are transferred to electrical node, for example, model node N1m, model node N2m etc..
As another example of operation 343, the second complex voltage and electric current are determined from the first complex voltage and electric current, from second Complex voltage and electric current determine the 3rd complex voltage and electric current, and the 4th complex voltage and electric current are determined from the 3rd complex voltage and electric current, and 4th complex voltage and electric current are transported through into ESC models 125 to determine the 5th complex voltage and the electric current at model node N6m. In this example, the 5th complex voltage and electric current are the elements by the way that the 4th complex voltage and electric current to be transported through to ESC models 125 The impedance of (for example, electric capacity, inductance etc.) determines.
In operation 342, based on the complex voltage at the output of one or more models and the voltage magnitude of electric current, at this The current amplitude of complex voltage and electric current at output and the complex voltage at the output and the power magnitude of electric current, to determine Wafer bias at the output.For example, wafer bias is the voltage magnitude based on the second complex voltage and electric current, the second complex voltage Determined with the current amplitude of electric current and the power magnitude of the second complex voltage and electric current.In order to further illustrate, in x MHz RF generators are open-minded, and during the closing of y MHz and z MHz RF generators, the processor of host computer system 130 (Fig. 1) is determined in mould Being accumulated as first of type node N4m (Fig. 1) place, the second product, the wafer bias of the summation of the 3rd product and constant.In the explanation, First product is the product of the first coefficient and the voltage magnitude of the second complex voltage and electric current, and the second product is the second coefficient and the second complex voltage With the product of the current amplitude of electric current, and the 3rd product be the 3rd coefficient square root and the power magnitude of the second complex voltage and electric current Subduplicate product.
As an example, power magnitude is the power magnitude of transmitted power, the power transmitted is by host computer system 130 Processor is determined as the difference between forward power and reflection power.Forward power is by system 126 (Fig. 1) one or more RF generators are supplied to plasma chamber 175 (Fig. 1) power.Reflection power is to reflect back into system from plasma chamber 175 The power of 126 (Fig. 1) one or more RF generators.As an example, the power magnitude of complex voltage and electric current is by host computer system 130 processor is determined as the product of the current amplitude and complex voltage and the voltage magnitude of electric current of complex voltage and electric current.In addition, with To determine that in the coefficient and constant of wafer bias be each positive number or negative.As another example for determining wafer bias, work as x MHz RF generators are open-minded, and during the closing of y and z MHz RF generators, the wafer bias at model node is expressed as ax*Vx+ Bx*Ix+cx*sqrt (Px)+dx, wherein " ax " is the first coefficient, " bx " is the second coefficient, and " dx " is constant, and " Vx " is in mould The voltage magnitude of complex voltage and electric current at type node, " Ix " are the current amplitudes of the complex voltage and electric current at model node, And " Px " is the power magnitude of the complex voltage and electric current at model node.It should be noted that " sqrt " is square root calculation, its By the computing device of host computer system 130.In some embodiments, power magnitude Px is current amplitude Ix and voltage magnitude Vx Product.
In various embodiments, for determining that the coefficient of wafer bias is based on by the processor of host computer system 130 (Fig. 1) Projective techniques determine.In projective techniques, wafer bias sensor, for example, wafer bias pin etc., measurement for the first time exists Wafer bias on ESC 177 surface (for example, upper surface 183 (Fig. 1), etc.).In addition, in projective techniques, based in RF The complex voltage and electric current measured at the output of generator, determine voltage magnitude at the model node in plasma system 126, Current amplitude and power magnitude.For example, it will be answered for the first time what node N3 (Fig. 1) was measured by the processor of host computer system 130 Voltage and current is sent to model node (for example, model node N4m, model node N1m, model node N2m or model node N6m (Fig. 1) etc.), to determine the complex voltage and electric current at model node of first time.Voltage magnitude and current amplitude are by main frame The processor of system 130 is obtained according to complex voltage of the first time at model node and electric current.In addition, power magnitude is as Current amplitude and the product of voltage magnitude once is calculated by the processor of host computer system 130.
Similarly, in this example, it is extra to complex voltage and current measurement one or many at node N3, and by institute Complex voltage and the electric current transmission of measurement, with determine this it is extra it is one or many in the model node (for example, model node N4m, model node N1m, model node N2m or model node N6m etc.) place complex voltage and electric current.It is in addition, extra according to this One or many determinations complex voltage and electric current obtain extra one or many voltage magnitudes, current amplitude and the power Amplitude.Mathematical function (for example, PLS, linear regression etc.) is applied to first by the processor of host computer system 130 Voltage magnitude, current amplitude, power magnitude and the measured wafer bias of secondary and extra one or many acquisitions, with Determine coefficient ax, bx, cx and constant dx.
As operation 342 another example, when y MHz RF generators open and x and z MHz RF generators close when, Wafer bias is defined as ay*Vy+by*Iy+cy*sqrt (Py)+dy, wherein " ay " is coefficient, " by " is coefficient, and " dy " is normal Number, " Vy " are the voltage magnitudes of the second complex voltage and electric current, and " Iy " is the current amplitude of the second complex voltage and electric current, and " Px " It is the power magnitude of the second complex voltage and electric current.Power magnitude Py is current amplitude Iy and voltage magnitude Vy product.As operation 342 another example, when z MHz RF generators are open-minded, and x and y MHz RF generators are closed, wafer bias is confirmed as Az*Vz+bz*Iz+cz*sqrt (Pz)+dz, wherein " az " is coefficient, " bz " is coefficient, and " dz " is constant, and " Vz " is second multiple The voltage magnitude of voltage and current, " Iz " are the current amplitudes of the second complex voltage and electric current, and " Pz " be the second complex voltage and The power magnitude of electric current.Power magnitude Pz is current amplitude Iz and voltage magnitude Vz product.
As another example of operation 342, when x and y MHz RF generators are open-minded, and when z MHz RF generators are closed, Wafer bias is confirmed as the summation of the first product, the second product, the 3rd product, the 4th product, the 5th product, the 6th product and constant.First product It is the first coefficient and voltage magnitude Vx product, the second product is the second coefficient and current amplitude Ix product, and the 3rd product is the 3rd coefficient With power magnitude Px subduplicate product, the 4th product is the 4th coefficient and voltage magnitude Vy product, the 5th product be the 5th coefficient and Current amplitude Iy product, and the 6th product is the 6th coefficient and power magnitude Py subduplicate product.When x and y MHz RF occur Device is open-minded, and during the closing of z MHz RF generators, wafer bias is expressed as axy*Vx+bxy*Ix+cxy*sqrt (Px)+dxy*Vy + exy*Iy+fxy*sqrt (Py)+gxy, wherein " axy ", " bxy ", " cxy ", " dxy ", " exy ", " fxy ", " dxy ", " exy " And " fxy " is coefficient, and " gxy " is constant.
As another example of operation 342, when y and z MHz RF generators are open-minded, and x MHz RF generators are closed When, wafer bias is confirmed as ayz*Vy+byz*Iy+cyz*sqrt (Py)+dyz*Vz+eyz*Iz+fyz*sqrt (Pz)+gyz, Wherein " ayz ", " byz ", " cyz ", " dyz ", " eyz " and " fyz " is coefficient, and " gyz " is constant.As operation 342 Another example, when x and z MHz RF generators are open-minded, and y MHz RF generators are closed, wafer bias is confirmed as Axz*Vx+bxz*Ix+cxz*sqrt (Px)+dxz*Vz+exz*Iz+fxz*sqrt (Pz)+gxz, wherein " axz ", " bxz ", " Cxz ", " dxz ", " exz " and " fxz " is coefficient, and gxz is constant.
As another example of operation 342, when x, y and z MHz RF generators are opened, wafer bias is confirmed as the One accumulates, second accumulates, the 3rd accumulates, the 4th accumulates, the 5th accumulates, the 6th accumulates, the 7th accumulates, the 8th accumulates, the 9th accumulates and the summation of constant.First Product is the first coefficient and voltage magnitude Vx product, and the second product is the second coefficient and current amplitude Ix product, and the 3rd product is the 3rd system The subduplicate product of number and power magnitude Px, the 4th product are the 4th coefficient and voltage magnitude Vy product, and the 5th product is the 5th coefficient With current amplitude Iy product, the 6th product is the 6th coefficient and power magnitude Py subduplicate product, the 7th product be the 7th coefficient and Voltage magnitude Vz product, the 8th product is the 8th coefficient and current amplitude Iz product, and the 9th product is the 9th coefficient and power width Value Pz subduplicate product.When being opened in x, y and z MHz RF generators, wafer bias is expressed as axyz*Vx+bxyz*Ix+ cxyz*sqrt(Px)+dxyz*Vy+exyz*Iy+fxyz*sqrt(Py)+gxyz*Vz+hxyz*Iz+ixyz*sqrt(Pz)+ Jxyz, wherein " axyz ", " bxyz ", " cxyz ", " dxyz ", " exyz ", " fxyz ", " gxyz ", " hxyz " and " ixyz " is Coefficient, and " jxyz " is constant.
As another example for determining the wafer bias at the output of one or more models, in model node N1m The wafer bias at place is determined based on the voltage and current amplitude determined at model node N1m by the processor of host computer system 130. In order to further illustrate, the second complex voltage and electric current transmit along part 173 (Fig. 1), to determine answering at model node N1m Voltage and current.Come in the way of in a manner of similar to the second complex voltage and electric current is determined from the first complex voltage and electric current from second Complex voltage and electric current determine the complex voltage and electric current at model node N1m.For example, the second complex voltage and electric current are based on part The feature of 173 element transmits along part 173, to determine complex voltage and electric current at model node N1m.
Based on the complex voltage and electric current determined at model node N1m, wafer bias is existed by the processor of host computer system 130 Determined at model node N1m.For example, to determine that the chip at model node N4m is inclined similar to from the second complex voltage and electric current The mode for the mode put, the wafer bias at model node N1m is determined from the complex voltage at model node N1m and electric current. For example, when x MHz RF generators are opened and y MHz and z MHz RF generators are closed, host computer system 130 (Fig. 1) Processor determines the summation that the wafer bias at model node N1m is the first product, the second product, the 3rd product and constant.Show at this In example, the first product is the first coefficient and complex voltage and the product of the voltage magnitude of electric current model node N1m at, and second to accumulate be the Two coefficients and complex voltage and the product of the current amplitude of electric current at model node N1m, and the 3rd product is square of the 3rd coefficient Root and complex voltage and the subduplicate product of the power magnitude of electric current at model node N1m.When x MHz RF generators are open-minded And during the closing of y and z MHz RF generators, the wafer bias at model node N1m is expressed as ax*Vx+bx*Ix+cx*sqrt (Px)+dx, wherein ax are the first coefficients, and bx is the second coefficient, and cx is the 3rd coefficient, and dx is constant, and Vx is in model node N1m The voltage magnitude at place, Ix are the current amplitudes at model node N1m, and Px is the power magnitude at model node N1m.
Similarly, based on the complex voltage at model node N1m and electric current and in based on x, y and zMHzRF generator The generator opened, determine wafer bias ay*Vy+by*Iy+cy*sqrt (Py)+dy, az*Vz+bz*Iz+cz*sqrt (Pz) +dz、axy*Vx+bxy*Ix+cxy*sqrt(Px)+dxy*Vy+exy*Iy+fxy*sqrt(Py)+gxy、axz*Vx+bxz*Ix+ cxz*sqrt(Px)+dxz*Vz+exz*Iz+fxz*sqrt(Pz)+gxz、ayz*Vy+byz*Iy+cyz*sqrt(Py)+dyz*Vz + eyz*Iz+fyz*sqrt (Pz)+gyz and axyz*Vx+bxyz*Ix+cxyz*sqrt (Px)+dxyz*Vy+exyz*Iy+ fxyz*sqrt(Py)+gxyz*Vz+hxyz*Iz+ixyz*sqrt(Pz)+jxyz。
As the another example for determining wafer bias at the output of one or more models, with based in model section The voltage and current amplitude determined at point N1m determines the mode similar mode of the wafer bias at model node N1m, is based on The voltage and current amplitude determined at model node N2m is determined at model node N2m by the processor of host computer system 130 Wafer bias.In order to further illustrate, at model node N2m determine wafer bias ax*Vx+bx*Ix+cx*sqrt (Px)+ dx、ay*Vy+by*Iy+cy*sqrt(Py)+dy、az*Vz+bz*Iz+cz*sqrt(Pz)+dz、axy*Vx+bxy*Ix+cxy* sqrt(Px)+dxy*Vy+exy*Iy+fxy*sqrt(Py)+gxy、axz*Vx+bxz*Ix+cxz*sqrt(Px)+dxz*Vz+ exz*Iz+fxz*sqrt(Pz)+gxz、ayz*Vy+byz*Iy+cyz*sqrt(Py)+dyz*Vz+eyz*Iz+fyz*sqrt(Pz) + gyz and axyz*Vx+bxyz*Ix+cxyz*sqrt (Px)+dxyz*Vy+exyz*Iy+fxyz*sqrt (Py)+gxyz*Vz+ hxyz*Iz+ixyz*sqrt(Pz)+jxyz。
As the another example for determining wafer bias at the output of one or more models, with based in model section The voltage and current amplitude determined at point N2m determines the mode similar mode of the wafer bias at model node N2m, is based on The voltage and current amplitude determined at model node N6m is determined at model node N6m by the processor of host computer system 130 Wafer bias.In order to further illustrate, at model node N6m determine wafer bias ax*Vx+bx*Ix+cx*sqrt (Px)+ dx、ay*Vy+by*Iy+cy*sqrt(Py)+dy、az*Vz+bz*Iz+cz*sqrt(Pz)+dz、axy*Vx+bxy*Ix+cxy* sqrt(Px)+dxy*Vy+exy*Iy+fxy*sqrt(Py)+gxy、axz*Vx+bxz*Ix+cxz*sqrt(Px)+dxz*Vz+ exz*Iz+fxz*sqrt(Pz)+gxz、ayz*Vy+byz*Iy+cyz*sqrt(Py)+dyz*Vz+eyz*Iz+fyz*sqrt(Pz) + gyz and axyz*Vx+bxyz*Ix+cxyz*sqrt (Px)+dxyz*Vy+exyz*Iy+fxyz*sqrt (Py)+gxyz*Vz+ hxyz*Iz+ixyz*sqrt(Pz)+jxyz。
It should be noted that in some embodiments, wafer bias is stored in storage HU 162 (Fig. 1).
Figure 14 is the state for the embodiment for being illustrated in the wafer bias generator 340 realized in host computer system 130 (Fig. 1) Figure.When all x, y and z MHz RF generators are closed, wafer bias is zero at model node or minimum, model node Such as, model node N4m, N1m, N2m, N6m (Fig. 1), etc..When x, y or z MHz RF generators are open-minded, and remaining x, y and z MHz RF generators close when, wafer bias generator 340 determine model node (for example, model node N4m, N1m, N2m, N6m, etc.) wafer bias at place is the first product a*V, the second product b*I, the 3rd product c*sqrt (P) and constant d summation, its Middle V is the voltage magnitude of the complex voltage and electric current at model node, and I is the current amplitude of complex voltage and electric current, and P is complex voltage With the power magnitude of electric current, a is coefficient, and b is coefficient, and c is coefficient, and d is constant.In various embodiments, in model node The power magnitude at place is the product of the current amplitude at the model node and the voltage magnitude at the model node.In some realities Apply in mode, power magnitude is the amplitude of transmitted power.
When two in x, y and z MHz RF generators are open-minded, and remaining in x, y and z MHz RF generators is closed, Wafer bias generator 340 determines wafer bias at model node (e.g., model node N4m, N1m, N2m, N6m etc.) place for the One product a12*V1, the second product b12*I1, the 3rd product c12*sqrt (P1), the 4th product d12*V2, the 5th product e12*I2, the 6th product F12*sqrt (P2) and constant g12 summation, wherein " V1 " is sent out by the first RF opened being transmitted in RF generators The voltage that is measured at the output of raw device and the complex voltage at model node and the voltage magnitude of electric current determined, " I1 " is to pass through Be transmitted in the electric current measured at the output for the first RF generators opened and the complex voltage and the current amplitude of electric current that determine, " P1 " The complex voltage of V1 and I1 product and the power magnitude of electric current are determined as, " V2 " is by being transmitted in opening in RF generators The voltage measured at the output of 2nd RF generators and the complex voltage at model node and the voltage magnitude of electric current that determine, " I2 " is the electric current measured at the output for the 2nd RF generators opened by being transmitted in and the complex voltage determined and the electricity of electric current Flow amplitude, " P2 " is determined as the power magnitude of V2 and I2 product, " a12 ", " b12 ", " c12 ", " d12 ", " e12 " and " Each in f12 " is coefficient, and " g12 " is constant.
When all x, y and z MHz RF generators are all opened, wafer bias generator 340 is determined in model node The wafer bias at (for example, model node N4m, N1m, N2m, N6m etc.) place as first product a123*V1, second product b123*I1, 3rd product c123*sqrt (P1), the 4th product d123*V2, the 5th product e123*I2, the 6th product f123*sqrt (P2), the 7th product G123*V3, the 8th product h123*I3, the 9th product i123*sqrt (P3) and constant j123 summation, wherein " V1 " is to pass through transmission The voltage measured at the output of the first RF generators in RF generators and the complex voltage and electricity at model node determined The voltage magnitude of stream, " I1 " are by being transmitted in the electric current measured at the output of the first RF generators the complex voltage and electricity that determine The current amplitude of stream, " P1 " are determined as the complex voltage of V1 and I1 product and the power magnitude of electric current, and " V2 " is by being transmitted in The voltage measured at the output of the 2nd RF generators in RF generators and the complex voltage and electric current at model node determined Voltage magnitude, " I2 " is by being transmitted in the electric current measured at the output of the 2nd RF generators the complex voltage and electric current that determine Current amplitude, " P2 " is determined as the complex voltage of V2 and I2 product and the power magnitude of electric current, and " V3 " is by being transmitted in RF The voltage measured at the output of the 3rd RF generators in generator and the complex voltage at model node that determines and electric current Voltage magnitude, " I3 " are by being transmitted in the electric current measured at the output of the 3rd RF generators the complex voltage and electric current that determine Current amplitude, " P3 " are determined as the complex voltage of V3 and I3 product and the power magnitude of electric current, " a123 ", " b123 ", " Each in c123 ", " d123 ", " e123 ", " f123 ", " g123 ", " h123 " and " i123 " is coefficient, and " j123 " is Constant.
Figure 15 is to be used to determine along the path between model node N4m (Figure 16) and ESC models 125 (Figure 16) The flow chart of the embodiment of the method 351 of the wafer bias at 353 point (Figure 16) place.Figure 15 is that reference picture 16 describes, figure 16 be the block diagram for determining the embodiment of the system 355 of the wafer bias at the output of model.
In operation 357, the output of x, y or z MHz RF generators is detected, to identify generator output complex voltage and electricity Stream.For example, complex voltage and electric current of voltage and current probe 110 (Fig. 1) measurement at node N3 (Fig. 1) place.In this example, by Host computer system 130 (Fig. 1) receives complex voltage and electric current by communicator 185 (Fig. 1) from voltage and current probe 110, to deposit Store up in storage HU 162 (Fig. 1).In addition, in this example, the processor of host computer system 130 identifies again from storage HU 162 Voltage and current.
In operation 359, the processor of host computer system 130 using generator output complex voltage and electric current, with determine along The complex voltage and electric current of projection at the point in the path 353 between model node N4m and model node N6m.Path 161 is from model Node N4m extends to model node N6m.For example, the 5th complex voltage and electric current are according in x MHz RF generators, y MHz RF The complex voltage and electric current that are measured at the output of generator or z MHz RF generators determines.As another example, saving The complex voltage and electric current measured at point N3 or node N5 transmits via impedance matching model 104, to determine in model node N4m The complex voltage and electric current at (Fig. 1) place.In this example, the complex voltage at model node N4m and electric current are via RF modes 161 (Figure 16) one or more elements and/or transmit and determine via one or more elements of ESC models 125 (Figure 16) Complex voltage and electric current at certain point in path 353.
In operation 361, the processor of host computer system 130 by the complex voltage of the projection determined at the point on path 353 and Electric current is as the input of function so that the complex voltage of projection and electric current are mapped at the node N6m of ESC models 125 (Figure 15) Wafer bias value.For example, when x, y or z MHz RF generators are opened, the wafer bias at model node N6m is defined as First product a*V, the second product b*I, the 3rd product c*sqrt (P) and constant d summation, wherein, V is at model node N6m The complex voltage of projection and the voltage magnitude of electric current, I are the complex voltage of the projection at model node N6m and the electric current width of electric current Value, P is the complex voltage of the projection at model node N6m and the power magnitude of electric current, and a, b and c are coefficients, and d is constant.
As another example, when two RF generators in x, y and z MHz RF generators are open-minded, and x, y and z MHz When remaining RF generator in RF generators is closed, by the wafer bias at model node N6m be defined as the first product a12*V1, Second product b12*I1, the 3rd product c12*sqrt (P1), the 4th product d12*V2, the 5th product e12*I2, the 6th product f12*sqrt (P2) With constant g12 summation, wherein V1 is the result opened as the first RF generators in described two RF generators in mould Voltage magnitude at type node N6m, I1 are the electric current width at model node N6m for the result opened as the first RF generators Value, P1 is the power magnitude at model node N6m for the result opened as the first RF generators, and V2 is as described two The voltage magnitude at model node N6m for the result that the 2nd RF generators in RF generators are opened, I2 are as the 2nd RF The current amplitude at model node N6m for the result that generator is opened, and P2 is the result opened as the 2nd RF generators The power magnitude at model node N6m, a12, b12, c12, d12, e12 and f12 are coefficients, and g12 is constant.
As another example, when all x, y and z MHz RF generators are all opened, by model node N6m Wafer bias be defined as the first product a123*V1, second product b123*I1, the 3rd product c123*sqrt (P1), the 4th product d123*V2, 5th product e123*I2, the 6th product f123*sqrt (P2), the 7th product g123*V3, the 8th product h123*I3, the 9th product i123*sqrt (P3) and constant j123 summation, wherein as described in first example above, V3 is conduct by V1, I1, P1, V2, I2 and P2 The voltage magnitude at model node N6m for the result that the 3rd RF generators in RF generators are opened, I3 are as the 3rd RF The current amplitude at model node N6m for the result that generator is opened, and P3 is the result opened as the 3rd RF generators The power magnitude at model node N6m, a123, b123, c123, d123, e123, f123, g123, h123 and i123 are to be Number, and j123 is constant.
As another example, the function for determining wafer bias be characteristic value and constant and.Characteristic value includes amplitude, For example, amplitude V, I, P, V1, I1, P1, V2, I2, P2, V3, I3, P3 etc..Characteristic value also includes coefficient, for example, coefficient a, b, c, A12, b12, c12, d12, e12, f12, a123, b123, c123, d123, e123, f123, g123, h123, i123 etc..Constant Example includes constant d, constant g12, constant j123 etc..
It should be noted that the constant in coefficient and characteristic value in characteristic value includes empirical model data.For example, wafer bias Using wafer bias sensor, at ESC177 (Fig. 1) place, measurement repeatedly obtains.In addition, in this example, it is brilliant for measurement Piece biasing number, by by complex voltage and electric current from one or more RF generators (for example, x MHz RF generators, y MHz RF generators, z MHz RF generators etc.) one or more nodes (such as node N3, N5 etc.) transmit via one or more Model (for example, impedance matching model 104, model part 173, RF modes 161, ESC models 125 (Fig. 1)) is to reach road Point on footpath 353 (Figure 16), so that it is determined that along complex voltage and electric current at the point of path 353 (Figure 16).In addition, in the example In, statistical method (for example, PLS, Return Law etc.) is applied to by the processor of host computer system 130 measured Wafer bias and it is applied to according to complex voltage at this point and electric current voltage magnitude, current amplitude and the power width obtained Value, to determine the constant in coefficient and characteristic value in characteristic value.
In various embodiments, for determining that the function of wafer bias is characterized in that:To the physics of delegated path 353 The summation of the value of attribute.The physical attribute in path 353 is the value drawn from test data (for example, empirical model data etc.).Road The example of the physical attribute in footpath 353 includes electric capacity, inductance and combinations thereof of element on path 353 etc..As above institute State, along the element in path 353 electric capacity and/or inductive impact using projective techniques empirically determine on path 353 Voltage and current at point, and the then constant in the coefficient and characteristic value in effect characteristicses value.
In some embodiments, for determining that the function of wafer bias is multinomial.
Figure 17 is the embodiment for being used to determine the wafer bias at system 126 (Fig. 1) model node of method 363 Flow chart.Figure 17 illustrates with reference to figure 1 and Figure 16.Method 363 by host computer system 130 (Fig. 1) computing device. In operation 365, one or more complex voltages and electric current are set by host computer system 130 from the communication of one or more of generator system Standby to receive, the generator system includes one in x MHz RF generators, y MHz RF generators and z MHz RF generators It is or multiple.For example, the complex voltage and electric current measured at node N3 is received from communication equipment 185 (Fig. 1).Show as another Example, the complex voltage and electric current measured at node N5 is received from communication equipment 189 (Fig. 1).As another example, receive and saving The complex voltage and electric current that are measured at point N3 and the complex voltage and electric current that are measured at node N5.It should be noted that generator system Output include one or more of output node of node N3, N5 and z MHz RF generators.
In operation 367, based on the one or more complex voltages and electric current at the output of the generator system, along The point in the path 353 (Figure 16) (such as on path 353) between impedance matching model 104 and ESC models 125 (Figure 16) determines The complex voltage and electric current of projection.For example, the complex voltage and electric current at the output of the generator system are via impedance matching mould Type 104 (Figure 16) is projected to determine the complex voltage and electric current at model node N4m.As another example, in the generator Complex voltage and electric current at the output of system are thrown via the part 173 (Fig. 1) of impedance matching model 104 and RF modes 161 Penetrate, to determine complex voltage and electric current at model node N1m (Fig. 1) place.As another example, in the defeated of the generator system The complex voltage and electric current in source project via impedance matching model 104 and RF modes 161, to determine in model node N2m The complex voltage and electric current at (Fig. 1) place.As another example, complex voltage and electric current at the output of the generator system via Impedance matching model 104, RF modes 161 and ESC models 125 project, to determine at model node N6m (Fig. 1) place Complex voltage and electric current.
In operation 369, chip of the calculating at the point along path 353 is inputted as function by using the multiple V&I of projection Biasing.For example, it is open-minded in x, y or z MHz RF generators, and remaining RF generator in x, y and z MHz RF generators is closed When, wafer bias at this point is determined by function, the function be first product a*V, second product b*I, the 3rd product c*sqrt (P) with And constant d summation, wherein, V is the complex voltage of projection at this point and the voltage magnitude of electric current, and I is throwing at this point The complex voltage and the current amplitude of electric current penetrated, P are the complex voltage of projection at this point and the power magnitude of electric current, and a, b and c are Coefficient, d are constants.
As another example, when two RF generators in x, y and z MHz RF generators are open-minded, and x, y and z MHz When remaining RF generator in RF generators is closed, wafer bias at this point is defined as the first product a12*V1, the second product B12*I1, the 3rd product c12*sqrt (P1), the 4th product d12*V2, the 5th product e12*I2, the 6th product f12*sqrt (P2) and constant G12 summation, wherein V1 be the result opened as the first RF generators in described two RF generators at this point Voltage magnitude, I1 are the current amplitudes at this point for the result opened as the first RF generators, and P1 is sent out as the first RF The power magnitude at this point for the result that raw device is opened, V2 is opened as the 2nd RF generators in described two RF generators The voltage magnitude at this point of logical result, I2 are the electric current width at this point for the result opened as the 2nd RF generators Value, and P2 is the power magnitude at this point for the result opened as the 2nd RF generators, a12, b12, c12, d12, e12, And f12 is coefficient, g12 is constant.
As another example, when all x, y and z MHz RF generators are all opened, by wafer bias at this point It is defined as the first product a123*V1, the second product b123*I1, the 3rd product c123*sqrt (P1), the 4th product d123*V2, the 5th product E123*I2, the 6th product f123*sqrt (P2), the 7th product g123*V3, the 8th product h123*I3, the 9th product i123*sqrt (P3) and As described in first example above, V3 is occurred as RF for constant j123 summation, wherein V1, I1, P1, V2, I2 and P2 The voltage magnitude at this point for the result that the 3rd RF generators in device are opened, I3 are the knots opened as the 3rd RF generators The current amplitude at this point of fruit, and P3 is the power magnitude at this point for the result opened as the 3rd RF generators, A123, b123, c123, d123, e123, f123, g123, h123 and i123 are coefficients, and j123 is constant.
Figure 18 be used to illustrate be not by using voltage probe 332, for example, voltage sensor etc., but by using The reality of the system 330 for the advantages of method 340 (Figure 13), method 351 (Figure 15) or method 363 (Figure 17) are to determine wafer bias Apply the block diagram of mode.
Voltage probe 332 is coupled to node N1, to determine the voltage at node N1.In some embodiments, voltage Probe 332 is coupled to another node, for example, node N2, N4 etc., to determine the voltage at another node.Voltage probe 332 Including multiple circuits, such as RF shunts (splitter) circuit, filter circuit 1, filter circuit 2, filter circuit 3 etc..
In addition, x and y MHz RF generators are coupled to host computer system 334, it is true that host computer system 334 includes noise or signal Cover half block 336.It should be noted that the module can be processor, ASIC, PLD, software or their group by computing device Close.
Voltage probe 332 measures voltage magnitude, and host computer system 334 uses the voltage magnitude, to determine wafer bias.Module 336 voltage magnitudes for determining to be measured by voltage detector 332 are signal or noise.When it is determined that being measured by voltage detector 332 Voltage magnitude when being signal, host computer system 334 determines wafer bias.
System 126 (Fig. 1) relative to system 330 be have it is cost-benefit, and relative to system 330 save the time and Energy.System 330 includes voltage probe 332, and voltage probe 332 need not be simultaneously included in system 126.It is not necessary to by electricity Wafer bias is determined at node N4, N1 or N2 that pressure probe is coupling in system 126.In system 126, wafer bias is base In impedance matching model 104, RF modes 161 and/or ESC models 125 (Fig. 1) come what is determined.In addition, system 330 includes Module 336, module 336 also and need not be included in system 126.It is not necessary to take time with energy come judge complex voltage and Electric current is signal or noise.Such judgement need not be made by host computer system 130 (Fig. 1).
Figure 19 A, 19B and Figure 19 C show the embodiment of figure 328,332 and 336, to illustrate by using voltage The voltage (for example, crest voltage etc.) at output (for example, the node N1) place of part 195 (Fig. 1) that probe measures with by making Determine to export the voltage at (for example, node N1m) place (for example, peak value is electric in corresponding model node with method 102 (Fig. 2) Pressure etc.) between correlation, for example, linear relationship etc..In each figure 328,332 and 336, measured voltage is drawn On the y axis, and application method 102 determine voltage be plotted in x-axis.
In addition, Figure 19 A, 19B and Figure 19 C show the embodiment of figure 330,334 and 338, to illustrate by making With the wafer bias that wafer bias probe measures at output N6 (Fig. 1) place with (being schemed by using method 340 (Figure 13), method 351 15) or between the wafer bias for exporting (for example, node N6m) place in corresponding model node of method 363 (Figure 17) determination Correlation, for example, linear relationship etc..In each figure 330,334 and 338, the chip that is measured using wafer bias probe Biasing is drawn on the y axis, and the wafer bias that application method 340, method 351 or method 363 determine is plotted in x-axis On.
When y and z MHz RF generators are opened and x MHz RF generators are closed, voltage and wafer bias are plotted in figure In shape 328 and 330.In addition, when x and z MHz RF generators are opened and y MHz RF generators are closed, voltage and chip are inclined Put and be plotted in figure 332 and 334.In addition, when x and y MHz RF generators are opened and z MHz RF generators are closed, electricity Pressure and wafer bias are plotted in figure 336 and 338.
Figure 20 A are shown using sensor tool (such as metering outfit, probe, sensor, wafer bias probe etc.) The wired wafer bias measured, the mould that Application way 340 (Figure 13), method 351 (Figure 15) or method 363 (Figure 17) determine There is the figure of the embodiment of the figure 276 and 278 of correlation between error in type wafer bias and model biasing.Draw Wired wafer bias in figure 276 is in point (such as node on RF transmission lines 113, ESC177 upper surface 183 (Fig. 1) On node etc.) place measures, the model being plotted in figure 276 is biased in the corresponding model points (example on path 353 (Figure 16) Such as model node N4m, model node N1m, model node N2m, model node N6m (Fig. 1)) place is determined.Wired chip is inclined Put along the y-axis in figure 276 and draw, model biasing is drawn along the x-axis in figure 276.
When x MHz RF generators are opened and y and z MHz RF generators are closed, wired wafer bias and model biasing It is plotted in figure 276.In addition, the model biasing of figure 276 is true using equation a2*V2+b2*I2+c2*sqrt (P2)+d2 It is fixed, multiply wherein " * " is represented, " sqrt " represents square root, and " V2 " is represented along the voltage at the point of path 353 (Figure 16), I2 The electric current at the point is represented, P2 represents the power at the point, and " a2 " is coefficient, and " b2 " is coefficient, and " c2 " is coefficient, and " d2 " is Constant value.
Figure 278 depicts error on the y axis, and the error is the error in model biasing at this point, and in x-axis On depict at this point model biasing.Model error is the error in model biasing, such as variance, standard deviation etc..Work as x MHz RF generators open and y and z MHz RF generators close when, model error and model biasing be plotted in figure 278.
Figure 20 B are shown in wired wafer bias, Application way 340 (Figure 13), method 351 (Figure 15) or method 363 There is the embodiment of the figure 280 and 282 of correlation between error in model biasing and model biasing that (Figure 17) is determined Figure.Figure 280 and 282 to be drawn with figure 276 and 278 (Figure 20 A) similar mode, unlike, figure 280 With 282 y MHz RF generators open and x and z MHz RF generators close when draw.In addition, figure 280 and 282 Model biasing determined using equation a27*V27+b27*I27+c27*sqrt (P27)+d27, wherein " V27 " is represented along road Voltage magnitude at the point in footpath 353 (Figure 16), " I27 " represent current amplitude at this point, and " P27 " represents work(at this point Rate amplitude, " a27 " are coefficients, and " b27 " is coefficient, and " c27 " is coefficient, and " d27 " is constant value.
Figure 20 C are shown in wired wafer bias, Application way 340 (Figure 13), method 351 (Figure 15) or method 363 There is the embodiment of the figure 284 and 286 of correlation between error in model biasing and model biasing that (Figure 17) is determined Figure.Figure 284 and 286 is drawn in a manner of similar to figure 276 and 278 (Figure 20 A), unlike, figure 284 With 286 z MHz RF generators open and x and y MHz RF generators close when draw.In addition, figure 284 and 286 Model biasing determined using equation a60*V60+b60*I60+c60*sqrt (P60)+d60, wherein " V60 " is represented along road Voltage magnitude at the point in footpath 353 (Figure 16), " I60 " represent current amplitude at this point, and " P60 " represents work(at this point Rate amplitude, " a60 " are coefficients, and " b60 " is coefficient, and " c60 " is coefficient, and " d60 " is constant value.
Figure 20 D are shown in wired wafer bias, Application way 340 (Figure 13), method 351 (Figure 15) or method 363 There is the embodiment of the figure 288 and 290 of correlation between error in model biasing and model biasing that (Figure 17) is determined Figure.Figure 288 and 290 is drawn in a manner of similar to figure 276 and 278 (Figure 20 A), unlike, figure 288 With 290 x and y MHz RF generators open and z MHz RF generators close when draw.In addition, figure 288 and 290 Model biasing utilize equation a227*V2+b227*I2+c227*sqrt (P2)+d227*V27+e227*I27+f227*sqrt (P27)+g227 is determined, wherein " a227 ", " b227 ", " c227 ", " d227 ", " e227 " and " f227 " is coefficient, and " G227 " is constant value.
Figure 20 E are shown in wired wafer bias, Application way 340 (Figure 13), method 351 (Figure 15) or method 363 There is the embodiment of the figure 292 and 294 of correlation between error in model biasing and model biasing that (Figure 17) is determined Figure.Figure 292 and 294 is drawn in a manner of similar to figure 276 and 278 (Figure 20 A), unlike, figure 292 With 294 be x and z MHz RF generators open and y MHz RF generators close when draw.In addition, figure 292 and 294 Model biasing utilizes equation a260*V2+b260*I2+c260*sqrt (P2)+d20*V60+e260*I60+f260*sqrt (P60)+g260 is determined, wherein " a260 ", " b260 ", " c260 ", " d260 ", " e260 " and " f260 " is coefficient, and " g260 " It is constant value.
Figure 20 F are shown in wired wafer bias, Application way 340 (Figure 13), method 351 (Figure 15) or method 363 There is the embodiment of the figure 296 and 298 of correlation between error in model biasing and model biasing that (Figure 17) is determined Figure.Figure 296 and 298 is drawn in a manner of similar to figure 276 and 278 (Figure 20 A), unlike, figure 296 With 298 y and z MHz RF generators open and x MHz RF generators close when draw.In addition, figure 296 and 298 Model biasing utilize equation a2760*V27+b2760*I27+c2760*sqrt (P27)+d2760*V60+e2760*I60+ F2760*sqrt (P60)+g2760 determine, wherein " a2760 ", " b2760 ", " c2760 ", " d2760 ", " e2760 " and " F2760 " is coefficient, and " g2760 " is constant value.
Figure 20 G are shown in wired wafer bias, Application way 340 (Figure 13), method 351 (Figure 15) or method 363 There is the embodiment of the figure 302 and 304 of correlation between error in model biasing and model biasing that (Figure 17) is determined Figure.Figure 302 and 304 is drawn in a manner of similar to figure 276 and 278 (Figure 20 A), unlike, figure 302 Drawn with 304 when x, y and z MHz RF generators are opened.In addition, the model biasing of figure 302 and 304 utilizes equation Formula a22760*V2+b22760*I2+c22760*sqrt (P2)+d22760*V60+e22760*I60+f22760*sqrt (P60)+ G22760*V27+h22760*I27+i22760*sqrt (P27)+j22760 determine, wherein " a22760 ", " b22760 ", " C22760 ", " d22760 ", " e22760 ", " f22760 " " g22760 ", " h22760 " and " i22760 " is coefficient, and " j22760 " is constant value.
Figure 21 is the block diagram of the embodiment of host computer system 130.Host computer system 130 includes processor 168, storage HU 162nd, HU 380, output HU 382, input/output (I/O) interface 384, I/O interfaces 386, network interface controller are inputted (NIC) 388 and bus 392.Processor 168, storage HU 162, input HU 380, output HU 382, I/O interfaces 384, I/O connect Mouth 386 and NIC 388 is intercoupled by bus 392.Inputting HU 380 example includes mouse, keyboard, instruction pen etc..Output HU 382 example includes display, loudspeaker or combinations thereof.Display can be liquid crystal display, light emitting diode Display, cathode-ray tube, plasma scope, etc..NIC 388 example includes NIC, network adapter Deng.
The example of I/O interfaces includes providing the compatible interface between the hardware of the interface is coupled to.For example, I/O Signal received from input HU 380 is converted into the form compatible with bus 392, amplitude and/or speed by interface 384.Example again Such as, the signal received from bus 392 is converted into form, amplitude and/or the speed compatible with output HU 382 by I/O interfaces 386.
It should be noted that in some embodiments, wafer bias is used to determine is clamped to ESC by workpiece 131 (Fig. 1) 177 (Fig. 1) clamp voltage.For example, when wafer bias is not present in plasma chamber 175 (Fig. 1), inside ESC 177 Two electrodes have opposite polarity matching voltage, and workpiece 131 is clamped into ESC 177.In this example, wafer bias is worked as When being present in plasma chamber 175, there is provided the voltage to two electrodes has different amplitudes, inclined with the chip for compensating existing Put.In various embodiments, wafer bias is used to compensate the biasing at ESC 177 (Fig. 1) place.
It should also be noted that compared to using voltage, using three parameters (for example, current amplitude, voltage magnitude, with And phase between electric current and voltage etc.) come determine can be preferably for compensating the wafer bias of biasing at ESC 177 Determine wafer bias.For example, compared with the relation between RF voltages and nonlinear plasma state (regime), three are used The wafer bias that parameter calculates has stronger correlation with nonlinear plasma state (regime).Show as another Example is more accurate than the wafer bias determined using voltage probe using the wafer bias that three parameters calculate.
Figure 22 is the schematic diagram for illustrating the embodiment for the function that ion energy is determined from wafer bias and peak amplitude. The determination of ion energy is performed by the processor 168 (Figure 21) of host computer system 130.For example, the ion energy is calculated as The wafer bias (for example, biasing of modelling etc.) that coefficient " C1 " is multiplied by model node N6m is multiplied by one with coefficient " C2 " Or the sum of the peak amplitude of the voltage of multiple RF generators.The example of coefficient " C1 " includes negative real number, and the example bag of coefficient " C2 " Include arithmetic number.
In various embodiments, coefficient " C1 " is arithmetic number.In various embodiments, coefficient " C2 " is negative real number. Coefficient " C1 " and " C2 ", wafer bias and peak amplitude are stored in storage HU 162 (Figure 21).The example of peak amplitude include peak- Peak amplitude and zero-peak amplitude.
In some embodiments, for determine the peak amplitude of ion energy by host computer system 130 processor 168 from The complex voltage and electric current at model node N6m (Fig. 1) place are obtained.In various embodiments, for determining the acrometron of ion energy Value is the processor 168 by host computer system 130 from model node N2m or model node N1m or model node N4m (Fig. 1) The complex voltage and electric current at place are obtained.
In various embodiments, node N1, node N2 (figures are coupled to by one end for calculating the peak amplitude of ion energy 1) or node N6 (Fig. 1) and the other end are coupled to the voltage and current probe measurement of processor 168.It is coupled to node N1, section Point N2 or node N6 voltage and current probe can make a distinction between the frequency of x and y MHz RF generators.
In some embodiments, for determine ion energy peak amplitude and wafer bias be all at model node. For example, the peak amplitude for determining ion energy is obtained from the complex voltage at model node N6m and electric current, for determine from The wafer bias of sub- energy calculates at model node N6m.In another example the peak amplitude for determining ion energy is from mould Complex voltage and electric current at type node N2m are obtained, for determining that the wafer bias of ion energy calculates at model node N2m Go out.
In various embodiments, for determine the peak amplitude of ion energy be from the complex voltage at the first model node and What electric current was obtained, for determining that the wafer bias of ion energy determines at the second model node, rather than in the first model section Determined at point.For example, the peak amplitude for determining ion energy is obtained from the complex voltage at model node N6m and electric current, For determining that the wafer bias of ion energy calculates at model node N2m.In another example the acrometron for determining ion energy Value is obtained from the complex voltage at model node N2m and electric current, for determining the wafer bias of ion energy in model node Calculated at N6m.
In some embodiments, the peak amplitude for calculating ion energy is sent out in one or more x and y MHz RF The voltage at one or more output (for example, node N3, node N5 etc. (Fig. 1)) places of raw device.Using multiple RF generators In embodiment, for example, in the embodiment that x and y MHz RF generators both use, by being coupled to node N3 and processing The voltage and current probe measurement crest voltage of device 168, surveyed by the voltage and current probe for being coupled to node N5 and processor 168 Measure crest voltage, and processor 168 calculate the crest voltage measured at output algebraic combination (for example, and, average value Deng), to calculate the peak amplitude for being used for calculating ion energy.Any one the voltage and current probe being coupled in node N3 and N5 Example include NIST probes.
In some embodiments, it is not to use peak amplitude, but uses root-mean-square amplitude.
In various embodiments, ion energy is determined as wafer bias and use by the processor 168 of host computer system 130 To calculate the function of the RF voltages (such as Vx, Vy, Vz) of wafer bias.For example, the processor of host computer system 130 determines ion energy Measure and be:
Ei=(- 1/2) Vdc+ (1/2) Vpeak
Wherein Ei is ion energy, and Vdc is wafer bias current potential, and Vpeak is zero-peak for calculating wafer bias current potential Threshold voltage.Vpeak is crest voltage, for example, voltage Vx, Vy or Vz.
In various embodiments, ion energy is the energy of the ion formed in the plasma of plasma chamber.
In some embodiments, it is all for calculating the Vpeak of wafer bias when multiple RF generators are opened RF generators in have low-limit frequency RF generators.For example, Vpeak is equal to Vx.In various embodiments, as multiple RF It is the RF generators that have highest frequency for calculating the Vpeak of wafer bias when generator is opened.For example, Vpeak is equal to Vz.In various embodiments, it is with lowest frequency for calculating the Vpeak of wafer bias when multiple RF generators are opened The RF generators of frequency between rate and highest frequency.For example, Vpeak is equal to Vy.In some embodiments, Vpeak is out The crest voltage of the statistical value (for example, intermediate value, average value etc.) of the peak RF voltage of logical RF generators.Calculate by this way The ion energy gone out need not measure Vpeak using the voltage probe equipment of costliness, it is not required that use bias compensation circuit To measure wafer bias.Voltage probe for measuring Vpeak may be inaccurate.One example of bias compensation circuit includes carbon SiClx pin.The ion energy determined using the various embodiments of the disclosure causes low measurement time between failures (MTBF)。
It should be noted that in some embodiments, the value of ion energy is stored in storage HU162.
It is also noted that although aforementioned operation is with reference to parallel-plate plasma room (such as capacitance coupling plasma room Deng) be described, but in some embodiments, aforementioned operation can be applied to other types of plasma chamber, such as wrap Include inductively coupled plasma (ICP) reactor, transformer coupled plasma (TCP) reactor, conductor instrument, dielectric instrument Plasma chamber, including plasma chamber of electron cyclotron resonace (ECR) reactor, etc..For example, x MHz RF generators The inductor being coupled in y MHz RF generators in ICP plasmas room.
It shall also be noted that although operation above is described as by host computer system 130 (Fig. 1) computing device, In some embodiments, operation can be performed or by multiple main frames system by the one or more processors of host computer system 130 Multiple computing devices.
Although it should be noted that aforementioned embodiments be related to provide RF signals to ESC 177 (Fig. 1 and 18) bottom electrode and ESC 192 (Figure 11) bottom electrode and being related to is grounded Top electrode 179 and 264 (Fig. 1 and 11), but in some embodiments, RF signals are provided in Top electrode 179 and 264, while ESC 177 and 163 bottom electrode ground connection.
Embodiment described herein can be implemented with various computer system configurations, and computer system configurations include hand Hold formula hardware cell, microprocessor system, based on microprocessor or programmable consumption electronic product, microcomputer, big Type computer, etc..The embodiment can also be implemented in a distributed computing environment, in a distributed computing environment, task By being performed by network and the remote processing hardware unit linked.
On the basis of above-mentioned embodiment, it will be appreciated that the embodiment, which can use to be related to, is stored in department of computer science The various computer implemented operations of data in system.These operations are the operations for the physical manipulation for needing physical quantity.This paper institutes Any one in the operation of a part for the composition embodiment of description is useful machine operation.The embodiment It is directed to the hardware cell or device for performing these operations.Described device can be special-purpose computer special configuration.Work as quilt When being defined as special-purpose computer, it is not other processing of private part that the computer, which also can perform, program performs or routine, simultaneously Remain able to carry out dedicated operations.In some embodiments, the operation can be by general-purpose computer processes, the all-purpose computer Computer storage, caching or one or more computer programs by network acquisition are stored in optionally to activate or match somebody with somebody Put.When data are obtained by network, the data can be carried out by other computers (such as cloud computing resources) on the network Reason.
One or more embodiments can also be made as the computer-readable generation in non-transitory computer-readable medium Code.Non-transitory computer-readable medium is data-storable arbitrary data storage hardware unit, and the data later can Read by computer system.The example of non-transitory computer-readable medium includes hard disk drive, network attached storage (NAS), ROM, RAM, CD ROM (CD-ROM), recordable CD (CD-R), erasable CD (CD-RW), tape and other optics and Non-optical data storage hardware unit.Non-transitory computer-readable medium may include to be distributed in network coupled computer system Computer-readable tangible medium so that computer-readable code is stored and performed in a distributed fashion.
Although above figure 2, Figure 13, Figure 15 and Figure 17 flow chart in method operation be described with particular order, It should be understood that other house-keepings can perform between operations, or operation may be adjusted so that they occur slightly different Time, or permission can be distributed in the system that processing operation occurs for the various time intervals related to processing, as long as folded The processing of add operation is performed in the way you want.
One or more features of any embodiment can be with one or more combinations of features of any other embodiment but not Away from the scope described in various embodiments described in the disclosure.
Although aforementioned embodiments are described in detail to a certain extent for clearness of understanding, obviously , some changes and modification can be implemented within the scope of the appended claims.Therefore, embodiments of the present invention should be considered as It is exemplary rather than restricted, and these embodiments are not only restricted to details given herein, but can be in appended power Modified in the scope and equivalent that profit requires.

Claims (23)

1. a kind of method for determining ion energy, this method includes:
The voltage and electricity are passed through in the outgoing position of radio frequency generator from the reception of voltage and current probe by host computer system The first complex voltage and electric current that stream probe measures, wherein the output of the RF generators is coupled to impedance via RF cables Input with circuit, wherein the execution institute when the RF generators are coupled to plasma chamber via the impedance matching circuit Reception is stated, the impedance matching circuit has the output for being coupled to RF transmission lines;
Impedance matching model is generated based on the electric component defined in the impedance matching circuit, the impedance matching model is The model of computer generation, the impedance matching model have input and output, and the input of the impedance matching model connects First complex voltage and electric current are received, the impedance matching model has one or more elements;
Transmit first complex voltage and electric current by the element of the impedance matching model with determine the second complex voltage and Electric current;
Obtain crest voltage;
Wafer bias is determined based on second complex voltage and electric current;And
The ion energy is determined based on the wafer bias and the crest voltage.
2. according to the method for claim 1, wherein voltage of the wafer bias based on second complex voltage and electric current Amplitude, the current amplitude of second complex voltage and electric current and the power magnitude of second complex voltage and electric current,
Wherein determine that the wafer bias includes:
The power magnitude is calculated based on the voltage magnitude and the current amplitude;And
The sum of the first product, the second product, the 3rd product and constant is calculated, wherein first product is the voltage magnitude and the first coefficient Product, it is described second product be the current amplitude and the second coefficient product, it is described 3rd product be the power magnitude square root With the product of the 3rd coefficient.
3. according to the method for claim 1, wherein the RF generators include 2 megahertzs of RF generators, 27 megahertzs of RF Generator, or 60 megahertzs of RF generators.
4. according to the method for claim 1, it further comprises:
Based on defined in the RF transmission lines circuit block generate RF modes, the RF modes have input and Output, the input coupling of the RF modes is to the output of the impedance matching model, and the RF modes are with one Point, wherein the wafer bias determines at a part of output of the RF modes.
5. according to the method for claim 1, it further comprises:
Based on defined in the RF transmission lines electric component generate RF modes, the RF modes have input and Output, the output of the input coupling of the RF modes to the impedance matching model, wherein the wafer bias is described Determined at the output of RF modes.
6. according to the method for claim 5, wherein, the electric components of the RF transmission lines include capacitor, inductor or The combination of person's capacitor and inductor, the RF modes include one or more elements, wherein, the RF modes The element has the feature similar to the feature of the electric component of the RF transmission lines.
7. method according to claim 1, wherein the voltage and current probe is calibrated according to preset formula.
8. according to the method for claim 7, wherein the preset formula is standard.
9. the method according to claim 11, wherein, wherein the standard is USA National Institute of Standard and Technology (NIST) Standard, wherein the voltage and current probe with open circuit, short circuit or load couple with calibrate the voltage and current probe from And meet NIST standards.
10. according to the method for claim 1, wherein second complex voltage and electric current include magnitude of voltage, current value and be somebody's turn to do Phase between magnitude of voltage and the current value.
11. according to the method for claim 1, wherein the element of the impedance matching model includes capacitor, inductance The combination of device or capacitor and inductor, wherein the electric component of the impedance matching circuit include capacitor, inductor or The combination of person's capacitor and inductor, wherein the element of the impedance matching model has and the impedance matching circuit The similar feature of the feature of the electric component.
12. according to the method for claim 1, wherein the wafer bias is used in system, wherein the system bag RF transmission lines are included, but the voltage probe not being included on the RF transmission lines.
13. according to the method for claim 1, it also includes:
RF modes are generated based on the electric component that is limited in the RF transmission lines, the RF modes have input and Output, the output of the input coupling of the RF modes to the impedance matching model;And
The feature generation electrostatic chuck ESC models of electrostatic chuck based on the plasma chamber, the ESC models have defeated Enter, the output of the input coupling of the ESC models to the RF modes, wherein, the wafer bias is in institute State and determined at the output of ESC models.
14. according to the method for claim 1, wherein by first complex voltage and electric current from the impedance matching model The input transports through one or more of elements and reaches the output of the impedance matching model to determine that second is multiple Voltage and current includes:
The institute for being coupling in the impedance matching model based on first complex voltage and electric current and the impedance matching model The feature for stating one or more elements between input and intermediate node determines the middle node in the impedance matching model Middle complex voltage and electric current in point;And
The intermediate node and the resistance are coupling in based on the middle complex voltage and electric current and the impedance matching model The feature of one or more elements between the output of anti-Matching Model determines second complex voltage and electric current.
15. according to the method for claim 4, wherein the RF modes include RF tunnel models and RF band models, institute RF tunnel models are stated to couple with the RF band models.
16. according to the method for claim 1, wherein determining that the ion energy includes:
First product of design factor and the wafer bias;
Second product of design factor and the crest voltage;And
Calculate the sum of first product and the described second product.
17. according to the method for claim 1, wherein obtaining the crest voltage is included from second complex voltage and electric current Obtain the crest voltage.
18. according to the method for claim 17, wherein obtaining the crest voltage includes receiving the survey of the crest voltage Value.
19. a kind of plasma system for being used to determine ion energy, it includes:
For producing the RF generators of radio frequency (RF) signal, the RF generators are associated with voltage and current probe, wherein institute State voltage and current probe and be configured to first complex voltage and electric current of the measurement in the outgoing position of the RF generators;
Impedance matching circuit, the impedance matching circuit is with the output for being coupled to the RF generators via RF cables Input;
Plasma chamber via RF transmission line couplings to the impedance matching circuit, the impedance matching circuit, which has, to be coupled to The output of the RF transmission lines;And
It is coupled to the processor of the RF generators, the processor is configured to:
First complex voltage and electric current are received from the voltage and current probe;
Impedance matching model, the impedance matching model tool are generated based on the electric component defined in the impedance matching circuit There are input and output, the input of the impedance matching model receives first complex voltage and electric current, the impedance matching Model has one or more elements;
Transmit first complex voltage and electric current by the element of the impedance matching model with determine the second complex voltage and Electric current;
Obtain crest voltage;
Wafer bias is determined based on second complex voltage and electric current;And
The ion energy is determined based on the wafer bias and the crest voltage.
20. plasma system according to claim 19, wherein, the RF generators are configured as at 2 megahertzs or 27 Megahertz or 60 megahertzs of frequency under operate.
21. plasma system according to claim 19, wherein the processor is configured as:
First product of design factor and the wafer bias;
Second product of design factor and the crest voltage;And
Calculate the sum of first product and the described second product.
22. a kind of computer system for being used to determine ion energy, the computer system include:
Processor, it is configured to:
Measured from the reception of voltage and current probe in the outgoing position of radio frequency generator by the voltage and current probe First complex voltage and electric current, wherein the output of the RF generators is coupled to the defeated of impedance matching circuit via RF cables Enter, wherein the processor is configured to when the RF generators are coupled to plasma chamber via the impedance matching circuit First complex voltage and electric current are received, the impedance matching circuit has the output for being coupled to RF transmission lines;
Wherein described processor is further configured to:
Impedance matching model, the impedance matching model tool are generated based on the electric component defined in the impedance matching circuit There are input and output, the input of the impedance matching model receives first complex voltage and electric current, the impedance matching Model has one or more elements;
Transmit first complex voltage and electric current by the element of the impedance matching model with determine the second complex voltage and Electric current;
Obtain crest voltage;
Wafer bias is determined based on second complex voltage and electric current;And
The ion energy is determined based on the wafer bias and the crest voltage;With
It is coupled to the storage device of the processor, the storage device is configured to store the ion energy.
23. computer system according to claim 22, wherein the processor is configured as:
First product of design factor and the wafer bias;
Second product of design factor and the crest voltage;And
Calculate the sum of first product and the described second product.
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