CN104021103B - A kind of serial ports expansion device of embedded microprocessor - Google Patents
A kind of serial ports expansion device of embedded microprocessor Download PDFInfo
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Abstract
The invention discloses a kind of serial ports expansion device of embedded microprocessor, including microprocessor and PLD；Microprocessor includes M serial ports and N number of control port；PLD includes K universal input and output port；Wherein, K ＞ M ＞ 0, N ＞ 0；Microprocessor is used for the port communication pattern that the PLD is set by N number of control port；PLD is used to be programmed the PLD of device inside, the communication interconnected relationship of each universal input and output port on control PLD；Each universal input and output port of PLD is used to connect one or more ancillary equipment, realizes the transmission of the signal between ancillary equipment and microprocessor and/or realizes that the signal between ancillary equipment is transmitted.The serial ports expansion device for the embedded microprocessor that the present invention is provided, port number extension is convenient and simple, and switching is flexible, and cost ineffective rate is high, portable strong.
Description
Technical field
The present invention relates to the serial ports expansion dress of embedded system technology field, more particularly to a kind of embedded microprocessor
Put.
Background technology
General serial Asynchronous Reception/transmission interface (Universal Asynchronous Receiver/
Transmitter, abbreviation UART), also abbreviation serial ports.Serial ports is a kind of Universal Serial Bus for asynchronous communication, should
Bus two-way communication, it is possible to achieve full duplex transmission and reception.Serial ports is the most frequently used most simple and convenient in Embedded System Design
Interface, commonly used to PC (Personal Computer, personal computer) or other outer net equipment communications.
Existing embedded microprocessor generally has 1-6 serial ports, and quantity is very limited；And embedded microprocessor is made
Core for embedded system with the ancillary equipment of microprocessor communication, it is necessary to generally have a many kinds, or even considerably beyond Wei Chu
The serial ports quantity that reason device has in itself.For example：In GNSS, (Global Navigation Satellite System, the whole world is led
Navigate satellite system) in receiver, the microprocessor built in it has 6 serial ports, and with the ancillary equipment bag of microprocessor communication
Include GPS (Global Positioning System, global positioning system) mainboard, GPRS (General Packet Radio
Service, general packet radio service technology) module, bluetooth communication, station telecommunication module, outer PC etc., wherein,
GPS mainboards need to take 3 serial ports, and GPRS module needs 1 serial ports of occupancy, bluetooth communication to need to take 1 serial ports, electricity
Platform communication module needs to take 1 serial ports, further needs exist for 2 serial ports and PC or other external device communications.Therefore, institute
The ancillary equipment having with microprocessor communication needs 8 serial ports altogether, and microprocessor itself only has 6 serial ports, and this is occurred as soon as
The problem of microprocessor serial ports quantity is not enough, it is therefore desirable to which the serial ports quantity to microprocessor is extended.
The common technology means solved the above problems are, using special serial port extended chip to increase serial ports quantity；Or
Person, is time-multiplexed so that multiple ancillary equipment can divide by digital circuit or analog switch to the serial ports of microprocessor
The same microprocessor serial ports of Shi Fuyong.Wherein, using special serial port extended chip expand come serial ports allow periphery set
Standby work simultaneously, the problem of without time-sharing multiplex；But there is the defects such as cost height, driver complexity.In operation operation
Also need to develop corresponding chip drives journey when carrying out extended serial port using special serial port extended chip in the embedded design of system
Sequence, adds the difficulty and complexity of exploitation；And the problem of due to driver and operating system framework itself, is also possible to meeting
There is loss of data.
In addition, being also required to be in communication with each other in some cases between external equipment and without the switching of microprocessor
Processing.For example in above-mentioned GNSS receiver, under certain mode of operation, GPS mainboards need and GPRS module, Bluetooth communication
Module, station telecommunication module, PC direct communication, actually and need not move through the participation of microprocessor, but in the prior art
Each ancillary equipment carried out data transmission again by the serial ports switching of microprocessor processing, one side data transmission efficiency compared with
It is low, on the other hand unnecessarily take up the resource of microprocessor and reduce the overall performance of microprocessor, therefore this is not only
Only it is the problem of microprocessor serial ports quantity is not enough, also there is asking for the switching interconnection between the peripheral hardware for how solving microprocessor
Topic.
The problem of direct communication between peripheral hardware can not be solved using special serial port extended chip in the prior art, still needs
To be handled or be forwarded by microprocessor, thus add the work load of microprocessor.And use digital circuit or
Person's analog switch carries out the solution of serial ports switching peripheral hardware by the same microprocessor serial ports of multiple peripheral hardware time-sharing multiplexs, although
The problem of direct communication between peripheral hardware can be solved, but shortcoming is also it will be apparent that i.e.：Multiple peripheral hardwares can not simultaneously with it is micro-
Processor is communicated.This scheme also be can yet be regarded as a kind of simple and effective solution in specific application scenario, still
It is difficult to change again after determining due to the connection between circuit, therefore program flexibility and scalability are all poor.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of serial ports expansion device of embedded microprocessor, realize
How the serial ports quantity of embedded microprocessor is extended, reduction extension complexity and cost, improve microprocessor with it is outer
The flexibility of serial ports interconnection between portion's equipment or between external equipment and external equipment, and overcome of the prior art micro-
The defect that processor can not be communicated with multiple external equipments simultaneously by a serial ports.
To solve above technical problem, the embodiment of the present invention provides a kind of serial ports expansion device of embedded microprocessor,
Including microprocessor and PLD.
The microprocessor includes M serial ports and N number of control port；It is individual general defeated that the PLD includes K
Enter output port；Wherein, K ＞ M ＞ 0, N ＞ 0；
The microprocessor, the port communication for setting the PLD by N number of control port
Pattern；
The PLD, for according to the port communication pattern, to the FPGA electricity of device inside
Road is programmed, and controls the communication interconnected relationship of each universal input and output port on the PLD；
Each universal input and output port of the PLD, for according to the universal input and output port
Communication interconnected relationship, the one or more ancillary equipment of connection realize the letter between the ancillary equipment and the microprocessor
Number transmission, and/or, realize between the ancillary equipment signal transmission.
Preferably, the PLD is CPLD devices.
In a kind of achievable mode, N number of control port on the microprocessor is used to, by parallel communication fashion, refer to
Show and control the port communication pattern of the PLD.
Wherein, the microprocessor controls the output level of N number of control port, and described may be programmed is indicated for constituting
The N bits of the port communication pattern of logical device, the quantity of the port communication pattern is 2N.Or, micro- place
The level that device controls any P control port of N number of control port is managed, the PLD is indicated for constituting
Port communication pattern P bits, the quantity of the port communication pattern is 2P, 0 ＜ P ＜ N；The microprocessor control
The level of remaining (N-P) individual control port is made, the ancillary equipment of present port communication pattern is performed for gating.
Further, the PLD, is additionally operable to set up end one by one to port communication pattern each described
Mouth interconnection map relation, and according to the interconnection of the current level value of N number of control port and the universal input and output port
Mapping relations, are programmed to logical device internal circuit, gate corresponding with the level value that the control port is current lead to
Use input/output port.
In another can realize mode, N number of control port on the microprocessor is used for by serial communication mode,
Indicate and control the port communication pattern of the PLD.
The serial ports expansion device for the embedded microprocessor that the present invention is provided, using PLD as bridge,
To provide a kind of flexible port interconnection between the microprocessor and peripheral hardware in embedded system, and between peripheral hardware and peripheral hardware
Scheme.Microprocessor by PLD especially CPLD (Complex Programmable Logic Device,
CPLD) device connection, can be defeated by setting up the universal input of microprocessor itself serial ports and CPLD devices
The mapping relations of exit port (GPIO, General Purpose Input/Output), be by the serial ports expansion of microprocessor
The universal input and output port that CPLD devices possess, so that the universal input and output port and external equipment that pass through CPLD devices
Connection.The present invention only needs to control by the software to the internal logic circuit in PLD, you can realization pair can
The switching control of each universal input and output port of programmed logic device, without carrying out any modification to hardware circuit, therefore
Serial ports quantity extension to microprocessor is convenient and simple, and switching is flexible, and cost ineffective rate is high, portable strong.
Brief description of the drawings
Fig. 1 is that a kind of structure of one embodiment of the serial ports expansion device for embedded microprocessor that the present invention is provided is shown
It is intended to；
The structural representation that the serial ports expansion device for the embedded microprocessor that Fig. 2 provides for the present invention is connected with external equipment
Figure.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described.
It is a kind of one embodiment of the serial ports expansion device for embedded microprocessor that the present invention is provided referring to Fig. 1
Structural representation.
The serial ports expansion device of described embedded microprocessor includes microprocessor 100 and PLD 200.
When it is implemented, the microprocessor 100 includes M serial ports and N number of control port；The PLD
200 include K universal input and output port (General Purpose Input/Output, abbreviation GPIO)；Wherein, K ＞ M ＞
0, N ＞ 0.That is the universal input and output port quantity of PLD 200 is more than the quantity of microprocessor 100.
The microprocessor 100, the end for setting the PLD 200 by N number of control port
Port communications pattern.
The PLD 200, for according to the port communication pattern, to the FPGA of device inside
Circuit is programmed, and controls the communication interconnected relationship of each universal input and output port on the PLD 200.
Each universal input and output port of the PLD 200, for being exported according to the universal input
The communication interconnected relationship of port, the one or more ancillary equipment of connection, realize the ancillary equipment and the microprocessor 100 it
Between signal transmission, and/or, realize between the ancillary equipment signal transmission.
Wherein, the PLD 200 is preferably CPLD (Complex Programmable Logic
Device, CPLD) device.CPLD is that (Programmable Array Logic may be programmed battle array from PAL
Row logic) and the device that comes out of GAL (Generic Array Logic, GAL) device development, with respect to PAL and GAL
For device, CPLD scales are big, complicated, belong to large scale integrated circuit scope.
A kind of CPLD be user according to respective the need voluntarily digital integrated electronic circuits of constitutive logic function, its Basic Design
Method is, by Integrated Development software platform, using methods such as schematic diagram, hardware description languages, to generate corresponding file destination,
Code is sent in target CPLD chips by downloading cable, the digital display circuit of design function is realized.
It should be noted that the PLD that the present invention is provided can use the programmable logic device different from CPLD
Part, for example：FPGA (Field-Programmable Gate Array, field programmable gate array) device.Although using
The implementation of FPGA extension microprocessor serial ports quantities is relatively flexible, and scalability and portability are high, but are due to
The cost of FPGA device is higher, and power consumption is big, and the peripheral support circuit and driver required for it are compared to CPLD
Device is complicated, is not suitable for low cost, the application scenario of low-power consumption.And CPLD devices have flexible in programming, integrated level height, set
Count that the construction cycle is short, the scope of application is wide, developing instrument is advanced, design and manufacture cost is low, it is low to the hardware skill requirement of designer,
Standardized product is used as expansion without the series of advantages such as test, strong security, price be popular present invention preferably employs CPLD devices
Open up the PLD of microprocessor serial ports.
When it is implemented, CPLD devices 200 can also use hardware description language with ladder diagram come programmed logic function
To write, conventional language has Verilog HDL and VHDL.
Verilog HDL are a kind of hardware description language (Hardware Description Language, abbreviation HDL),
In the form of text come the language of the structure and behavior that describes digital display circuit hardware, logical circuitry, logical table can be represented with it
Up to formula, the logic function that digital logic system is completed also may indicate that.VHDL(Very-High-Speed Integrated
Circuit Hardware Description Language, VHSIC hardware description language) and Verilog
HDL is most popular two kinds of hardware description languages in the world.Therefore, in the present embodiment, both hardware descriptions can be used
Language, the annexation to each interface of CPLD devices 200 is described and programmed, and will describe the connection of each interface of CPLD
The code " programming " of relation is downloaded in CPLD devices 200.
As specific embodiment, as shown in figure 1, microprocessor 100 has six serial ports COMA~COMF, with
And five control port IO1~IO5.IO (Input-Output) input/output interface having on CPLD devices 200 is (as right
The ECP Extended Capabilities Port of microprocessor serial ports) quantity is much larger than the serial ports quantity on microprocessor 100.Especially, model as shown in Figure 1
CPLD devices 200 have 36 input/output interfaces.Wherein, six serial ports COMA~COMF and CPLD of microprocessor 100
Each serial ports on the physical connection of I/O interface 1~12 on device 200, microprocessor 100 corresponds respectively to CPLD devices 200
Two I/O interfaces；Microprocessor 100 passes through control port IO1~IO5 level value, the port communication of control CPLD devices 200
Pattern, that is, set up a kind of corresponding relation of port interconnection so that six serial ports COMA~COMF of microprocessor 100 can pass through
One or more I/O interfaces on CPLD devices 200 are communicated with external equipment.Microprocessor 100 and all serial ports of peripheral hardware are straight
On the I/O interface for attaching to CPLD devices 200, as long as the IO of CPLD devices 200 is enough, it is possible to access more ports and
External equipment, upgradability and diffusivity are that ordinary numbers logic chip is incomparable.
Control each serial ports and the signal of other universal input and output ports on CPLD devices 200 of microprocessor 100
Connected relation；Or, when one or more I/O interfaces on CPLD devices 200 are to be used to connect ancillary equipment, then CPLD devices
Part 200 can connect the ancillary equipment according to control port IO1~IO5 level value and is connected with the signal of microprocessor 100,
Or the signal connection between two kinds of ancillary equipment, need not move through the processing of microprocessor 100.Therefore CPLD devices 200 are at this
Connection-bridge beam action is served in invention.
For example, CPLD devices 200 are programmed control by following false code to the connected relation of each interface on chip
System：
Preferably, N number of control port on the microprocessor 100 is used for by parallel communication fashion, indicates and controls
The port communication pattern of the PLD 200.
In the present embodiment, alternatively, the microprocessor 100 controls the output level of N number of control port, is used for
Composition indicates the N bits of the port communication pattern of the PLD 200, the number of the port communication pattern
Measure as 2N.Specifically, can be by each control end when the microprocessor 100 in Fig. 1 has 5 control port IO1~IO5
The level value of mouth is as " 0 " or " 1 " for representing binary numeral, for example, low level represents binary numeral " 0 "；High level table
Show binary numeral " 1 "；Therefore, 5 control port IO1~IO5 of microprocessor 100 level value can constitute the two of 5
Binary value, its span be 00000~11111 (binary system), therefore microprocessor 100 5 control port IO1~
IO5 can combine output totally 25(i.e. 32) plant the control signal of form, so as to export 32 kinds of port communication pattern.
In addition, in the specific implementation, the level that can be often exported again only with one or more of control ports
Value represents the port communication pattern of PLD 200, and other control port is used to directly to control cutting for peripheral hardware
Change connection.Specifically, the microprocessor 100 controls the level of any P control port of N number of control port, is used for
Composition indicates the P bits of the port communication pattern of the PLD, the quantity of the port communication pattern
For 2P, 0 ＜ P ＜ N；The microprocessor 100 controls the level of remaining (N-P) individual control port, is performed currently for gating
The ancillary equipment of port communication pattern.
As shown in Fig. 2 what the serial ports expansion device of the embedded microprocessor provided for the present invention was connected with external equipment
Structural representation.
CPLD chips 200 in Fig. 2 are extended to the serial ports of microprocessor 100, and are connected with external equipment GPS moulds
Block, radio station module, bluetooth module, GPRS module and external interface 1 and external interface 2.
In the case where five control port IO1~IO5 of microprocessor 100 are parallel communication fashion, the control shown in Fig. 2
Port IO1 processed is used for the external interface 1 and external interface 2 for switching CPLD devices 200, and control port IO2 is used to switch GPRS moulds
Block or radio station module；And control port IO3~IO5 is then used for the port communication pattern for indicating CPLD devices 200, its indicating range
For 000~111 (binary system), totally 8 kinds of patterns, specific as shown in table 1.
The port communication pattern of the parallel communication fashion of table 1 is set
In practical operation, external equipment can be divided into command module and Data-Link module, for example, command module can
So that including external interface 1, external interface 2 and bluetooth module etc., Data-Link module can include GPRS module and radio station module.Cause
This, as shown in table 1, can gate different command channels by the port IO1 for controlling microprocessor 100 level value；Pass through
The port IO2 of microprocessor 100 level value is controlled, different Data-Links are gated；By the port for controlling microprocessor 100
IO3~IO5 level value, different switching CPLD port communication pattern or mode of operation.
In the application of GNSS receiver, the mechanism of the working condition adoption status machine of GNSS receiver is run,
The connecting object of microprocessor 100 and peripheral hardware and peripheral hardware and the interface of peripheral hardware is different from the state of difference.Therefore,
Each port communication pattern of CPLD devices 200 can also the mechanism of adoption status machine be configured.Wherein, a kind of state pair
Answer a kind of holotype.CPLD devices 200 carry out different soft according to different patterns to the PLD of device inside
Part is controlled, and port communication pattern is switched over according to control port IO3~state (level value) different IO5.
For example, microprocessor 100 controls 8 kinds of port communication patterns of CPLD devices 200 by control port IO3~IO5
Interconnected relationship it is as shown in table 2.
The port connection state of eight kinds of port communication patterns of table 2CPLD devices
In table 2 in addition to pattern 8 is used to carry out self-inspection for each serial ports of CPLD devices 200, remaining 7 pattern is normal
Mode of operation.Wherein, " COMA~COMF " represents 6 serial ports of microprocessor 100, and " COM1~COM3 " represents GPS module
Three serial ports, " Data-Link " represents the serial ports of peripheral hardware after Data-Link module gating, and " order " represents peripheral hardware after command module gating
Serial ports.
In the specific implementation, the mapping relations of the port communication pattern shown in table 2 are soft by being carried out in CPLD devices 200
Part is controlled and realized.Therefore, in the present embodiment, the PLD 200, is additionally operable to logical to port each described
Letter pattern sets up GPIO interconnection map relations one by one, and according to the current level value of N number of control port and the GPIO ends
Mouth interconnection map relation, is programmed to logical device internal circuit, gates relative with the level value that the control port is current
The GPIO port answered.And N number of control port on the microprocessor 100 is used for by serial communication mode, indicates and control
The port communication pattern of the PLD.
In the present embodiment, CPLD devices 200 actually play a part of a kind of port switch.Also, CPLD devices
200 each input/output port can pass through the different level of 0R (zero ohm) wire jumper resistance selections.The purpose so designed
It is for the peripheral port of compatible varying level.Electricity is carried out to each GPIO port of CPLD devices 200 using 0R wire jumpers resistance
When truncation is changed, then piecemeal can be carried out to the input/output port of CPLD devices 200 and powered, can be while compatible with COM S
(Complementary Metal Oxide Semiconductor, complementary metal oxide semiconductor) and TTL
(Transistor-Transistor Logic, logic gates) level standard.Different external equipments is connected to CPLD devices
When on 200, its serial ports level can be 3.3V or 5V.Therefore, if by the IO level designs of CPLD devices 200 into peripheral hardware
Serial ports level is consistent, without extra electrical level transferring chip, the system design complexity that can be effectively reduced and cost.
The core voltage of CPLD devices 200 can make power consumption by the different level of 0R wire jumper resistance selections, low level core voltage simultaneously
It is lower, and the chip price of high level core voltage is then relatively low, therefore power consumption and two factors of cost can be taken into account.
The serial ports expansion device for the embedded microprocessor that the present invention is provided, using PLD as bridge,
To provide a kind of flexible serial ports interconnection between the microprocessor and peripheral hardware in embedded system, and between peripheral hardware and peripheral hardware
Scheme.Microprocessor is connected by PLD especially CPLD devices, can be by setting up microprocessor itself serial ports
With the mapping relations of the GPIO port of CPLD devices, the serial ports of microprocessor is expanded to the GPIO ends possessed by CPLD devices
Mouthful, so as to be connected by the GPIO port of CPLD devices with external equipment.The present invention is only needed to by PLD
In internal logic circuit software control, you can realize the switching control to each GPIO port of PLD,
Without carrying out any modification to hardware circuit, thus it is convenient and simple to the extension of microprocessor serial ports quantity, and switching is flexible, and cost is low
Efficiency high is portable strong.
Described above is the preferred embodiment of the present invention, it is noted that for those skilled in the art
For, under the premise without departing from the principles of the invention, some improvements and modifications can also be made, these improvements and modifications are also considered as
Protection scope of the present invention.
Claims (3)
1. the serial ports expansion device of a kind of embedded microprocessor, it is characterised in that including microprocessor and programmable logic device
Part；
The microprocessor includes M serial ports and N number of control port；It is defeated that the PLD includes K universal input
Exit port；Wherein, K ＞ M ＞ 0, N ＞ 0；
The microprocessor, the port communication pattern for setting the PLD by N number of control port；
The PLD, for according to the port communication pattern, entering to the PLD of device inside
Row programming, controls the communication interconnected relationship of each universal input and output port on the PLD；
Each universal input and output port of the PLD, for according to the logical of the universal input and output port
Believe interconnected relationship, the one or more ancillary equipment of connection realize that the signal between the ancillary equipment and the microprocessor is passed
It is defeated, and/or, realize the signal transmission between the ancillary equipment；
The PLD is CPLD devices；
N number of control port on the microprocessor is used to, by parallel communication fashion, indicate and control the FPGA
The port communication pattern of device；
The PLD, is additionally operable to set up port communication pattern each described one by one serial ports interconnection map pass
System, and according to the current level value of N number of control port and the universal input and output port interconnection map relation, to logic
Device inside circuit is programmed, and gates the universal input and output port corresponding with the level value that the control port is current.
2. the serial ports expansion device of embedded microprocessor as claimed in claim 1, it is characterised in that the microprocessor control
The output level of N number of control port is made, the N positions for constituting the port communication pattern for indicating the PLD
Binary number, the quantity of the port communication pattern is 2N。
3. the serial ports expansion device of embedded microprocessor as claimed in claim 1, it is characterised in that
The microprocessor controls the level of any P control port of N number of control port, can described in instruction for constituting
The P bits of the port communication pattern of programmed logic device, the quantity of the port communication pattern is 2P, 0 ＜ P ＜ N；
The microprocessor controls the level of remaining (N-P) individual control port, and present port communication pattern is performed for gating
Ancillary equipment.
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| CN112199307A (en) * | 2020-10-26 | 2021-01-08 | 英业达科技有限公司 | Processing device with serial communication interface processing function and method thereof |
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| CN101860222A (en) * | 2010-04-03 | 2010-10-13 | 东方电子股份有限公司 | Unit serial connection type high-voltage frequency converter unit controller |
| CN103209431A (en) * | 2012-01-11 | 2013-07-17 | 中国科学院沈阳自动化研究所 | Wireless multi-channel data transceiver |
| CN103595607A (en) * | 2012-08-14 | 2014-02-19 | 成都思迈科技发展有限责任公司 | A multi-serial port network bridge with high reliability |
| CN203552057U (en) * | 2013-11-28 | 2014-04-16 | 国网河南省电力公司三门峡供电公司 | Transformer temperature controller check meter detection system |
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