CN103972344A - Semiconductor structure - Google Patents
Semiconductor structure Download PDFInfo
- Publication number
- CN103972344A CN103972344A CN201310028721.9A CN201310028721A CN103972344A CN 103972344 A CN103972344 A CN 103972344A CN 201310028721 A CN201310028721 A CN 201310028721A CN 103972344 A CN103972344 A CN 103972344A
- Authority
- CN
- China
- Prior art keywords
- gallium nitride
- indium gallium
- aluminum indium
- layers
- silicon substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 53
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 47
- 239000010703 silicon Substances 0.000 claims abstract description 47
- 230000007704 transition Effects 0.000 claims abstract description 43
- 239000000126 substance Substances 0.000 claims abstract description 39
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 38
- 229910002601 GaN Inorganic materials 0.000 claims description 50
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 50
- AJGDITRVXRPLBY-UHFFFAOYSA-N aluminum indium Chemical compound [Al].[In] AJGDITRVXRPLBY-UHFFFAOYSA-N 0.000 claims description 34
- 150000003376 silicon Chemical class 0.000 claims 9
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 abstract 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 7
- 229910052733 gallium Inorganic materials 0.000 description 7
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 239000004411 aluminium Substances 0.000 description 4
- 230000003247 decreasing effect Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention provides a semiconductor structure. The semiconductor structure comprises a silicon substrate, an aluminum nitride layer and a plurality of gradually-changed stress buffer layers. The aluminum nitride layer is arranged on the silicon substrate. The gradually-changed stress buffer layers are arranged on the aluminum nitride layer. Each gradually-changed stress buffer layer comprises a gradually-changed layer and a transition layer which are stacked in sequence. The general chemical formula of each gradually-changed layer is Al1-xGaxN, wherein the value of x is gradually increased from the side adjacent to the silicon substrate to the side far away from the silicon substrate, and x is greater than or equal to zero and less than or equal to one. Each transition layer and the surface of the side, farthest away from the silicon substrate, of the gradually-changed layer in the same gradually-changed stress buffer layer have the same general chemical formula. The general chemical formula of the transition layer in the gradually-changed stress buffer layer farthest away from the silicon substrate is GaN.
Description
Technical field
The present invention relates to a kind of semiconductor structure, relate in particular to a kind of semiconductor structure with gradual change type stress-buffer layer.
Background technology
Along with the progress of semiconductor science and technology, light-emitting diode has now possessed the output of high brightness, add that light-emitting diode has that power saving, volume are little, low voltage drive and the advantage such as not mercurous, therefore light-emitting diode has been widely used in the field such as display and illumination.Generally speaking, light-emitting diode chip for backlight unit adopts wide bandgap semiconductor materials, as materials such as gallium nitride (GaN), makes.But except the difference of thermal coefficient of expansion and chemical property, the lattice constant of gallium nitride and heterogeneous substrate (latticeconstant) also has the difference that cannot ignore.So the gallium nitride of growing on heterogeneous substrate can produce because lattice does not mate (lattice mismatch) the poor row's of lattice (dislocation) phenomenon, and the poor row of lattice can extend along the thickness direction of gallium nitride layer again.Moreover, also due to the unmatched reason of lattice of gallium nitride and heterogeneous substrate, gallium nitride material can produce great structural stress with respect to heterogeneous substrate, wherein along with growth thickness is when thicker, the stress of accumulating is just larger, when exceeding a certain critical value, material layer just cannot bear this stress, and must discharge stress with other forms.Thus, lattice is poor has got rid of the luminous efficiency reduction that can cause the defect in extension and make light-emitting diode, and outside causing shortening useful life, the very thick gallium nitride of also cannot growing.
Summary of the invention
The invention provides a kind of semiconductor structure, it can discharge existing lattice and not mate caused stress problem and can reduce the poor extension phenomenon coming on thickness direction of lattice.
The invention provides a kind of semiconductor structure, it comprises a silicon substrate, an aln layer and organizes gradual change type stress-buffer layer more.Aln layer is configured on silicon substrate.These group gradual change type stress-buffer layers are configured on aln layer.Each group gradual change type stress-buffer layer comprises a sequentially stacking graded bedding and a transition zone.The chemical general formula of these graded beddings is Al
1-xga
xn, wherein x value is from a side of adjacent silicon substrate toward increasing progressively gradually away from a side of silicon substrate, and 0≤x≤1.Each transition zone with on the same group in graded bedding in there is identical chemical general formula away from a side surface of silicon substrate, and be GaN away from chemical general formula of the transition zone in this group gradual change type stress-buffer layer of silicon substrate.
In one embodiment of this invention, the thickness of these graded beddings of above-mentioned these group gradual change type stress-buffer layers is increased progressively toward the side away from silicon substrate from a side of adjacent silicon substrate.
In one embodiment of this invention, the thickness of above-mentioned each graded bedding between 50 nanometers between 700 nanometers.
In one embodiment of this invention, the thickness of these transition zones of above-mentioned these group gradual change type stress-buffer layers is increased progressively toward the side away from silicon substrate from a side of adjacent silicon substrate.
In one embodiment of this invention, the thickness of above-mentioned each transition zone between 50 nanometers between 700 nanometers.
In one embodiment of this invention, the x value in the chemical general formula of above-mentioned transition zone increases progressively gradually with arithmetic series.
In one embodiment of this invention, above-mentioned gradual change type stress-buffer layer comprises the gradual change type stress-buffer layer of 2 groups to 10 groups.
In one embodiment of this invention, above-mentioned semiconductor structure also comprises a super lattice structure layers, is configured between aln layer and these group gradual change type stress-buffer layers.Super lattice structure layers comprises many group aluminum indium gallium nitride structure sheafs, and each group aluminum indium gallium nitride structure sheaf comprises stacking one first aluminum indium gallium nitride layer and one second aluminum indium gallium nitride layer mutually.The chemical general formula of these the first aluminum indium gallium nitride layers is Al
sga
tin
(1-s-t)n, wherein 0 < s < 1,0 < t < 1, and 0 < s+t≤1.The chemical general formula of these the second aluminum indium gallium nitride layers is Al
mga
nin
(1-m-n)n, wherein 0 < m < 1,0 < n < 1, and 0 < m+n≤1, in the time of m=s, n ≠ t; In the time of n=t, m ≠ s.
In one embodiment of this invention, the thickness of above-mentioned each group aluminum indium gallium nitride structure sheaf is between 5 nanometer to 500 nanometers.
In one embodiment of this invention, the thickness of above-mentioned super lattice structure layers is between 20 nanometer to 5000 nanometers.
In one embodiment of this invention, above-mentioned super lattice structure layers comprises more than 5 groups aluminum indium gallium nitride structure sheafs.
In one embodiment of this invention, above-mentioned semiconductor structure also comprises a super lattice structure layers, is configured between these group gradual change type stress-buffer layers.Super lattice structure layers comprises many group aluminum indium gallium nitride structure sheafs, and each group aluminum indium gallium nitride structure sheaf comprises stacking one first aluminum indium gallium nitride layer and one second aluminum indium gallium nitride layer mutually.The chemical general formula of these the first aluminum indium gallium nitride layers is Al
sga
tin
(1-s-t)n, wherein 0 < s < 1,0 < t < 1, and 0 < s+t≤1.The chemical general formula of these the second aluminum indium gallium nitride layers is Al
mga
nin
(1-m-n)n, wherein 0 < m < 1,0 < n < 1, and 0 < m+n≤1, in the time of m=s, n ≠ t; In the time of n=t, m ≠ s.
In one embodiment of this invention, the thickness of above-mentioned each group aluminum indium gallium nitride structure sheaf is between 5 nanometer to 500 nanometers.
In one embodiment of this invention, the thickness of above-mentioned super lattice structure layers is between 20 nanometer to 5000 nanometers.
In one embodiment of this invention, above-mentioned super lattice structure layers comprises more than 5 groups aluminum indium gallium nitride structure sheafs.
Based on above-mentioned, owing to disposing many group gradual change type stress-buffer layers on aln layer of the present invention, thereby improve gradually the content of gallium, finally obtain a gallium nitride layer.Thus, can effectively reduce the stress that the crystal lattice difference of gallium nitride layer and silicon substrate produces, and can effectively reduce the poor extension phenomenon coming on thickness direction of lattice, and then promote the quality of overall semiconductor structure.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate accompanying drawing to be described in detail below.
Brief description of the drawings
The generalized section of a kind of semiconductor structure that is one embodiment of the invention illustrated in fig. 1;
The generalized section of a kind of semiconductor structure that is another embodiment of the present invention illustrated in fig. 2;
The generalized section of a kind of semiconductor structure that is another embodiment of the present invention illustrated in fig. 3.
Description of reference numerals:
100a, 100b, 100c: semiconductor structure;
110: silicon substrate;
112,1422a, 1422b, 1422c, 1422d: surface;
120: aln layer;
140a, 140b, 140c, 140d: gradual change type stress-buffer layer;
142a, 142b, 142c, 142d: graded bedding;
144a, 144b, 144c, 144d: transition zone;
150a, 150b: super lattice structure layers;
151a1,151a2,151b1,151b2: the first aluminum indium gallium nitride layer;
153a1,153a2,153b1,153b2: the second aluminum indium gallium nitride layer;
152a1,152a2,152b1,152b2: aluminum indium gallium nitride structure sheaf;
H1, h1 ', h2, h2 ', h3, h3 ', h4, h4 ', t, t1, t2, t ', t1 ', t2 ': thickness.
Embodiment
First, in the description of following examples, be to be understood that when point out one deck (or film) or a structure be configured in another substrate, another layer (or film) or another structure " on " or when D score, it can be positioned at " directly " other substrates, layer (or film) or another structure, also or between the two there is more than one intermediate layer and configure in " indirectly " mode, can be with reference to the accompanying drawings of every one deck position.
The generalized section of a kind of semiconductor structure that is one embodiment of the invention illustrated in fig. 1.Please refer to Fig. 1, in the present embodiment, semiconductor structure 100a comprises a silicon substrate 110, an aln layer 120 and organizes gradual change type stress-buffer layer 140a, 140b, 140c, 140d (only schematically illustrating four groups in Fig. 1) more.Silicon substrate 110 has a upper surface 112.Aln layer 120 is configured on the upper surface 112 of silicon substrate 110.These group gradual change type stress-buffer layers 140a, 140b, 140c, 140d are configured on aln layer 120.Each group gradual change type stress-buffer layer 140a (or 140b, 140c, 140d) comprises a sequentially stacking graded bedding 142a (or 142b, 142c, 142d) and a transition zone 144a (or 144b, 144c, 144d).The chemical general formula of graded bedding 142a, 142b, 142c, 142d is Al
1-xga
xn, particularly, x value is from the upper surface 112 of adjacent silicon substrate 110 toward increasing progressively gradually away from the upper surface 112 of silicon substrate 110, and x value is 0≤x≤1.Each transition zone 144a (or 144b, 144c, 144d) with on the same group in graded bedding 142a (or 142b, 142c, 142d) in there is identical element composition away from a side surface 1422a of silicon substrate (or 1422b, 1422c, 1422d).
For instance, x value in the chemical general formula of the graded bedding 142a of the gradual change type stress-buffer layer 140a of the present embodiment is for example between 0 to 0.25, that is to say, the Al content of graded bedding 142a is successively decreased toward the side away from aln layer 120 gradually from a side of being close to aln layer 120, and Al content is decremented to 0.75 gradually by 1; And Ga content is increased progressively toward the side away from aln layer 120 gradually from a side of being close to aln layer 120, Ga content is incremented to 0.25 gradually by 0; And in transition zone 144a and graded bedding 142a, have identical element composition away from a side surface 1422a of silicon substrate, the chemical general formula of transition zone 144a is Al
0.75ga
0.25n.
In like manner, x value in the chemical general formula of the graded bedding 142b of the gradual change type stress-buffer layer 140b of the present embodiment is for example between 0.25 to 0.5, that is to say, the Al content of graded bedding 142b is successively decreased toward the side away from aln layer 120 gradually from a side of being close to aln layer 120, and Al content is decremented to 0.5 gradually by 0.75; And Ga content is increased progressively toward the side away from aln layer 120 gradually from a side of being close to aln layer 120, Ga content is incremented to 0.5 gradually by 0.25; And transition zone 144b and graded bedding 142b have identical element composition away from a side surface 1422b of silicon substrate, and the chemical general formula of transition zone 144b is Al
0.5ga
0.5n.
X value in the chemical general formula of the graded bedding 142c of gradual change type stress-buffer layer 140c is for example between 0.5 to 0.75, that is to say, the Al content of graded bedding 142c is successively decreased toward the side away from aln layer 120 gradually from a side of being close to aln layer 120, and Al content is decremented to 0.25 gradually by 0.5; And Ga content is increased progressively toward the side away from aln layer 120 gradually from a side of being close to aln layer 120, Ga content is incremented to 0.75 gradually by 0.5; And in transition zone 144c and graded bedding 142c, have identical element composition away from a side surface 1422c of silicon substrate, the chemical general formula of transition zone 144c is Al
0.25ga
0.75n.
X value in the chemical general formula of the graded bedding 142d of gradual change type stress-buffer layer 140d is for example between 0.75 to 1, that is to say, the Al content of graded bedding 142d is successively decreased toward the side away from aln layer 120 gradually from a side of being close to aln layer 120, and Al content is decremented to 0 gradually by 0.25; And Ga content is increased progressively toward the side away from aln layer 120 gradually from a side of being close to aln layer 120, Ga content is incremented to 1 gradually by 0.75.Particularly, away from having identical element composition away from a side surface 1422d of silicon substrate in the transition zone 144d in the gradual change type stress-buffer layer 140d of silicon substrate 110 and graded bedding 142d, the chemical general formula of last transition zone 144d is GaN.
That is to say, x value (being gallium content) in transition zone 144a, the 144b of these group gradual change type stress-buffer layers 140a, 140b, 140c, 140d, the chemical general formula of 144c, 144d is to increase progressively gradually with arithmetic series, and namely aluminium content is arithmetic series and reduces gradually.Certainly, in other embodiments, the x value in the chemical general formula of these transition zones 144a, 144b, 144c, 144d can be also non-arithmetic series and increase progressively gradually, is not limited at this.
Moreover these group gradual change type stress-buffer layers 140a, 140b, 140c, these graded beddings 142a of 140d, 142b, 142c, the thickness h 1 of 142d, h2, h3, h4 are increased progressively toward the upper surface 112 away from silicon substrate 110 gradually from the upper surface 112 of adjacent silicon substrate 110.That is to say, the thickness h 1 of graded bedding 142a is less than the thickness h 2 of graded bedding 142b, and the thickness h 2 of graded bedding 142b is less than the thickness h 3 of graded bedding 142c, and the thickness h 3 of graded bedding 142c is less than the thickness h 4 of graded bedding 142d.Herein, preferably, the thickness of the thickness h 1 of each graded bedding 142a (or 142b, 142c, 142d) (or h2, h3, h4) between 50 nanometers between 700 nanometers, wherein, it should be noted that, its extension quality of the graded bedding of thickness within the scope of this is stablized and the difficult defect that produces.
In addition, the thickness of these transition zones 144a of these group gradual change type stress-buffer layers 140a, 140b, 140c, 140d, 144b, 144c, 144d is increased progressively toward the upper surface 112 away from silicon substrate 110 gradually from the upper surface 112 of adjacent silicon substrate 110.That is to say, the thickness h 1 ' of transition zone 144a is less than the thickness h 2 ' of transition zone 144b, and the thickness h 2 ' of transition zone 144b is less than the thickness h 3 ' of transition zone 144c, and the thickness h 3 ' of transition zone 144c is less than the thickness h 4 ' of transition zone 144d.Herein, preferably, the thickness h 1 ' of each transition zone 144a (or 144b, 144c, 144d) (or h2 ', h3 ', h4 ') between 50 nanometers between 700 nanometers, wherein, it should be noted that, its extension quality of the graded bedding of thickness within the scope of this is stablized and the difficult defect that produces.
In the semiconductor structure 100a of the present embodiment, gradual change type stress-buffer layer 140a, 140b, 140c, 140d are configured on aln layer 120, wherein the aluminium content in these transition zones 144a, 144b, 144c, 144d is to successively decrease gradually with arithmetic series, and gallium content is to increase progressively gradually with arithmetic series, and transition zone 144a, 144b, 144c, 144d with on the same group in graded bedding 142a, 142b, 142c, 142d in there is identical aluminium content and gallium content away from a side surface 1422a of silicon substrate 110 (or 1422b, 1422c, 1422d).Thus, finally can obtain a gallium nitride layer (being transition zone 144d), and can reduce the stress that difference causes because of the coefficient of expansion and lattice between gallium nitride layer (being transition zone 144d) and silicon substrate 110 by gradual change type stress-buffer layer 140a, 140b, 140c, 140d, namely gradual change type stress-buffer layer 140a, 140b, 140c, 140d have outside the effect that discharges stress, also can effectively reduce the poor extension phenomenon coming on thickness direction of existing lattice, and then promote the quality of overall semiconductor structure 100a.
Certainly, the group number of these group gradual change type stress-buffer layers 140a shown in Fig. 1,140b, 140c, 140d is only use as an example, those skilled in the art is when adjusting aluminium content and gallium content and increase group number according to actual state, if namely x value (being gallium content) is to be arithmetic series with 0.1 gap to increase progressively gradually, the group number of gradual change type stress-buffer layer is 10 groups, slow down the stress that difference is caused because of the coefficient of expansion and lattice between silicon substrate 110 and gallium nitride layer (being transition zone 144d) to meet, repeat no longer one by one herein.
Should be noted that at this, following embodiment continues to use element numbers and the partial content of previous embodiment, wherein adopts identical label to represent identical or approximate element, and has omitted the explanation of constructed content.Explanation about clipped can be with reference to previous embodiment, and it is no longer repeated for following embodiment.
The generalized section of a kind of semiconductor structure that is another embodiment of the present invention illustrated in fig. 2.Please refer to Fig. 2, the semiconductor structure 100b of the present embodiment is similar to the semiconductor structure 100a of Fig. 1, its difference is: the semiconductor structure 100b of the present embodiment also comprises a super lattice structure layers 150a, and wherein super lattice structure layers 150a is configured between aln layer 120 and these group gradual change type stress-buffer layer 140a, 140b, 140c, 140d.
More particularly, super lattice structure layers 150a is configured between aln layer 120 and gradual change type stress-buffer layer 140a, and super lattice structure layers 150a comprises many group aluminum indium gallium nitride structure sheaf 152a1,152a2 (only schematically illustrating two groups in Fig. 2).Each group aluminum indium gallium nitride structure sheaf 152a1 (or 152a2) comprises stacking one first aluminum indium gallium nitride layer 151a1 (or 151a2) and one second aluminum indium gallium nitride layer 153a1 (or 153a2) mutually.The chemical general formula of these the first aluminum indium gallium nitride layers 151a1,151a2 is Al
sga
tin
(1-s-t) N, wherein s value is 0 < s < 1, t value is 0 < t < 1, and 0 < s+t≤1.The chemical general formula of these the second aluminum indium gallium nitride layers 153a1,153a2 is Al
mga
nin
(1-m-n)n, wherein 0 < m < 1,0 < n < 1, and 0 < m+n≤1, in the time of m=s, n ≠ t; In the time of n=t, m ≠ s.That is to say, the element set of the first aluminum indium gallium nitride layer 151a1 (or 151a2) and the second aluminum indium gallium nitride layer 153a1 (or 153a2) is proportional can not be identical.
For instance, the chemical general formula of the first aluminum indium gallium nitride layer 151a1 of the aluminum indium gallium nitride structure sheaf 152a1 of the present embodiment can be Al
0.3ga
0.2in
0.5n, and the chemical general formula of the second aluminum indium gallium nitride layer 153a1 can be Al
0.3ga
0.4in
0.3n.In addition, thickness t 1, the t2 of each group aluminum indium gallium nitride structure sheaf 152a1 (or 152a2) of the present embodiment are for example between 5 nanometer to 500 nanometers.The thickness t of super lattice structure layers 150a is for example between 20 nanometer to 5000 nanometers, and preferably, the group number of these group aluminum indium gallium nitride structure sheafs 152a1,152a2 is at least five groups.Owing to disposing super lattice structure layers 150a between aln layer 120 and gradual change type stress-buffer layer 140a, therefore can assist and slow down the stress that difference causes because of the coefficient of expansion and lattice between gradual change type stress-buffer layer 140a and silicon substrate 110, also before can being blocked in super lattice structure layers 150a growth, established difference is arranged, make poor row cannot continue upwards to grow, and then promote the quality of overall semiconductor structure 100b.
The generalized section of a kind of semiconductor structure that is another embodiment of the present invention illustrated in fig. 3.Please refer to Fig. 3, the semiconductor structure 100c of the present embodiment is similar to the semiconductor structure 100a of Fig. 1, its difference is: the semiconductor structure 100c of the present embodiment also comprises a super lattice structure layers 150b, and wherein super lattice structure layers 150b is configured between gradual change type stress-buffer layer 140a and gradual change type stress-buffer layer 140b.Super lattice structure layers 150b comprises many group aluminum indium gallium nitride structure sheaf 152b1,152b2, and each group aluminum indium gallium nitride structure sheaf 152b1 (or 152b2) comprises stacking one first aluminum indium gallium nitride layer 151b1 (or 151b2) and one second aluminum indium gallium nitride layer 153b1 (or 153b2) mutually.The chemical general formula of these the first aluminum indium gallium nitride layers 151b1,151b2 is Al
sga
tin
(1-s-t)n, wherein s value is 0 < s < 1, t value is 0 < t < 1, and 0 < s+t≤1.The chemical general formula of these the second aluminum indium gallium nitride layers 153b1,153b2 is Al
mga
nin
(1-m-n)n, wherein m value is 0 < m < 1, n value is 0 < n < 1, and 0 < m+n≤1, in the time of m=s, n ≠ t; In the time of n=t, m ≠ s.That is to say, the element set of the first aluminum indium gallium nitride layer 151b1 (or 151b2) and the second aluminum indium gallium nitride layer 153b1 (or 153b2) is proportional can not be identical.
For instance, the chemical general formula of the first aluminum indium gallium nitride layer 151b1 of the aluminum indium gallium nitride structure sheaf 152b1 of the present embodiment can be Al
0.3ga
0.2in
0.5n, and the chemical general formula of the second aluminum indium gallium nitride layer 153b1 can be Al
0.3ga
0.4in
0.3n.In addition, each group aluminum indium gallium nitride structure sheaf 152b1, the thickness t 1 ' of 152b2, the t2 ' of the present embodiment are for example between 5 nanometer to 500 nanometers.The thickness t of super lattice structure layers 150b ' be for example between 20 nanometer to 5000 nanometers, preferably, the group number of these group aluminum indium gallium nitride structure sheafs 152b1,152b2 is at least five groups.Owing to disposing super lattice structure layers 150b between adjacent these gradual change type stress-buffer layers 140a, 140b, therefore can assist and slow down the stress that difference causes because of the coefficient of expansion and lattice between gradual change type stress-buffer layer 140a, 140b, also before can being blocked in super lattice structure layers 150b growth, established difference is arranged, make poor row cannot continue upwards to grow, and then promote the quality of overall semiconductor structure 100c.
It is worth mentioning that, the present invention does not limit position and the type of these superlattice structures 150a, 150b, although mentioned herein and superlattice structure 150a, 150b be embodied as between aln layer 120 and gradual change type stress-buffer layer 140a, or, between gradual change type stress-buffer layer 140a and gradual change type stress-buffer layer 140b.But in other unshowned embodiment, superlattice structure is also configurable in these group gradual change type stress-buffer layers 140a, 140b, 140c, 140d between wantonly two adjacent layers, between graded bedding 142a and transition zone 144a, or between graded bedding 142c and transition zone 144c; Or, super lattice structure layers also can be configured between aln layer 120 and gradual change type stress-buffer layer 140a simultaneously and these group gradual change type stress-buffer layers 140a, 140b, 140c, 140d between wantonly two adjacent set.Those skilled in the art, when can, according to the setting of actual state adjustment or increase superlattice structure, to meet the phenomenon that slows down poor row, still belonging to the adoptable technical scheme of the present invention, does not depart from the scope of institute of the present invention wish protection.
In sum, owing to disposing many group gradual change type stress-buffer layers on aln layer of the present invention, thereby improve gradually the content of gallium, the final gallium nitride layer that obtains, so can effectively reduce the stress that gallium nitride layer and silica-based crystal lattice difference produce, and can effectively reduce the poor extension phenomenon coming on thickness direction of lattice, and then promote the quality of overall semiconductor structure.
Finally it should be noted that: above each embodiment, only in order to technical scheme of the present invention to be described, is not intended to limit; Although the present invention is had been described in detail with reference to aforementioned each embodiment, those of ordinary skill in the art is to be understood that: its technical scheme that still can record aforementioned each embodiment is modified, or some or all of technical characterictic is wherein equal to replacement; And these amendments or replacement do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (15)
1. a semiconductor structure, is characterized in that, comprising:
One silicon substrate;
One aln layer, is configured on this silicon substrate; And
Many group gradual change type stress-buffer layers, are configured on this aln layer, wherein respectively organize gradual change type stress-buffer layer and comprise a sequentially stacking graded bedding and a transition zone, and the chemical general formula of those graded beddings is Al
1-xga
xn, wherein x value is from a side of contiguous this silicon substrate toward increasing progressively gradually away from a side of this silicon substrate, and 0≤x≤1, and respectively this transition zone with on the same group in this graded bedding in there is identical chemical general formula away from a side surface of this silicon substrate, and be GaN away from the chemical general formula of this transition zone in this group gradual change type stress-buffer layer of this silicon substrate.
2. semiconductor structure according to claim 1, is characterized in that, the thickness of those graded beddings of those group gradual change type stress-buffer layers is increased progressively toward the side away from this silicon substrate from a side of being close to this silicon substrate.
3. semiconductor structure according to claim 2, is characterized in that, respectively the thickness of this graded bedding between 50 nanometers between 700 nanometers.
4. semiconductor structure according to claim 1, is characterized in that, the thickness of those transition zones of those group gradual change type stress-buffer layers is increased progressively toward the side away from this silicon substrate from a side of being close to this silicon substrate.
5. semiconductor structure according to claim 4, is characterized in that, respectively the thickness of this transition zone between 50 nanometers between 700 nanometers.
6. semiconductor structure according to claim 1, is characterized in that, the x value in the chemical general formula of those transition zones increases progressively gradually with arithmetic series.
7. semiconductor structure according to claim 1, is characterized in that, those group gradual change type stress-buffer layers comprise the gradual change type stress-buffer layer of 2 groups to 10 groups.
8. semiconductor structure according to claim 1, it is characterized in that, also comprise a super lattice structure layers, be configured between this aln layer and those group gradual change type stress-buffer layers, wherein this super lattice structure layers comprises many group aluminum indium gallium nitride structure sheafs, each group aluminum indium gallium nitride structure sheaf comprises stacking one first aluminum indium gallium nitride layer and one second aluminum indium gallium nitride layer mutually, and the chemical general formula of those the first aluminum indium gallium nitride layers is Al
sga
tin
(1-s-t)n, wherein 0 < s < 1,0 < t < 1, and 0 < s+t < 1, and the chemical general formula of those the second aluminum indium gallium nitride layers is Al
mga
nin
(1-m-n)n, wherein 0 < m < 1,0 < n < 1, and 0 < m+n≤1, in the time of m=s, n ≠ t; In the time of n=t, m ≠ s.
9. semiconductor structure according to claim 8, is characterized in that, respectively organizes the thickness of aluminum indium gallium nitride structure sheaf between 5 nanometer to 500 nanometers.
10. semiconductor structure according to claim 9, is characterized in that, the thickness of this super lattice structure layers is between 20 nanometer to 5000 nanometers.
11. semiconductor structures according to claim 8, is characterized in that, this super lattice structure layers comprises more than 5 groups aluminum indium gallium nitride structure sheafs.
12. semiconductor structures according to claim 1, it is characterized in that, also comprise a super lattice structure layers, be configured between those group gradual change type stress-buffer layers, wherein this super lattice structure layers comprises many group aluminum indium gallium nitride structure sheafs, each group aluminum indium gallium nitride structure sheaf comprises stacking one first aluminum indium gallium nitride layer and one second aluminum indium gallium nitride layer mutually, and the chemical general formula of those the first aluminum indium gallium nitride layers is Al
sga
tin
(1-s-t)n, wherein 0 < s < 1,0 < t < 1, and 0 < s+t≤1, and the chemical general formula of those the second aluminum indium gallium nitride layers is Al
mga
nin
(1-m-n)n, wherein 0 < m < 1,0 < n < 1, and 0 < m+n≤1, in the time of m=s, n ≠ t; In the time of n=t, m ≠ s.
13. semiconductor structures according to claim 12, is characterized in that, respectively organize the thickness of aluminum indium gallium nitride structure sheaf between 5 nanometer to 500 nanometers.
14. semiconductor structures according to claim 13, is characterized in that, the thickness of this super lattice structure layers is between 20 nanometer to 5000 nanometers.
15. semiconductor structures according to claim 12, is characterized in that, this super lattice structure layers comprises more than 5 groups aluminum indium gallium nitride structure sheafs.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310028721.9A CN103972344A (en) | 2013-01-25 | 2013-01-25 | Semiconductor structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310028721.9A CN103972344A (en) | 2013-01-25 | 2013-01-25 | Semiconductor structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103972344A true CN103972344A (en) | 2014-08-06 |
Family
ID=51241627
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310028721.9A Pending CN103972344A (en) | 2013-01-25 | 2013-01-25 | Semiconductor structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103972344A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104868025A (en) * | 2015-05-18 | 2015-08-26 | 聚灿光电科技股份有限公司 | GaN-based LED epitaxial structure having asymmetric super-lattice layer and preparation method for same |
| CN105428482A (en) * | 2015-12-30 | 2016-03-23 | 厦门市三安光电科技有限公司 | LED epitaxial structure and manufacturing method thereof |
| CN110767784A (en) * | 2019-11-06 | 2020-02-07 | 錼创显示科技股份有限公司 | Semiconductor structure |
| CN111341891A (en) * | 2020-03-09 | 2020-06-26 | 江西新正耀光学研究院有限公司 | Ultraviolet LED epitaxial structure and preparation method thereof |
| CN112368841A (en) * | 2020-06-23 | 2021-02-12 | 英诺赛科（珠海）科技有限公司 | Semiconductor device structure and method of manufacturing the same |
| US11329192B2 (en) | 2019-11-06 | 2022-05-10 | PlayNitride Display Co., Ltd. | Semiconductor structure |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002048434A2 (en) * | 2000-12-14 | 2002-06-20 | Nitronex Corporation | Gallium nitride materials and methods for forming layers thereof |
| WO2007105882A1 (en) * | 2006-03-13 | 2007-09-20 | Seoul Opto Device Co., Ltd. | Light emitting diode having algan buffer layer and method of fabricating the same |
| CN101267008A (en) * | 2007-03-16 | 2008-09-17 | 先进开发光电股份有限公司 | Photoelectrical semiconductor component with 3-familty Ni compound semiconductor buffer layer and its making method |
-
2013
- 2013-01-25 CN CN201310028721.9A patent/CN103972344A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002048434A2 (en) * | 2000-12-14 | 2002-06-20 | Nitronex Corporation | Gallium nitride materials and methods for forming layers thereof |
| WO2007105882A1 (en) * | 2006-03-13 | 2007-09-20 | Seoul Opto Device Co., Ltd. | Light emitting diode having algan buffer layer and method of fabricating the same |
| CN101267008A (en) * | 2007-03-16 | 2008-09-17 | 先进开发光电股份有限公司 | Photoelectrical semiconductor component with 3-familty Ni compound semiconductor buffer layer and its making method |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104868025A (en) * | 2015-05-18 | 2015-08-26 | 聚灿光电科技股份有限公司 | GaN-based LED epitaxial structure having asymmetric super-lattice layer and preparation method for same |
| CN104868025B (en) * | 2015-05-18 | 2017-09-15 | 聚灿光电科技股份有限公司 | GaN base LED epitaxial structure with asymmetric superlattice layer and preparation method thereof |
| CN105428482A (en) * | 2015-12-30 | 2016-03-23 | 厦门市三安光电科技有限公司 | LED epitaxial structure and manufacturing method thereof |
| CN105428482B (en) * | 2015-12-30 | 2018-09-11 | 厦门市三安光电科技有限公司 | A kind of LED epitaxial structure and production method |
| CN110767784A (en) * | 2019-11-06 | 2020-02-07 | 錼创显示科技股份有限公司 | Semiconductor structure |
| US11329192B2 (en) | 2019-11-06 | 2022-05-10 | PlayNitride Display Co., Ltd. | Semiconductor structure |
| CN111341891A (en) * | 2020-03-09 | 2020-06-26 | 江西新正耀光学研究院有限公司 | Ultraviolet LED epitaxial structure and preparation method thereof |
| CN112368841A (en) * | 2020-06-23 | 2021-02-12 | 英诺赛科（珠海）科技有限公司 | Semiconductor device structure and method of manufacturing the same |
| WO2021258293A1 (en) * | 2020-06-23 | 2021-12-30 | Innoscience (Zhuhai) Technology Co., Ltd. | Semiconductor device structures and methods of manufacturing the same |
| CN112368841B (en) * | 2020-06-23 | 2023-03-14 | 英诺赛科（珠海）科技有限公司 | Semiconductor device structure and method of manufacturing the same |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103972344A (en) | Semiconductor structure | |
| CN102623599B (en) | Ultraviolet-light gallium nitride semiconductor light emitting diode with gradient electron barrier layers | |
| US7626209B2 (en) | Light emitting diode having active region of multi quantum well structure | |
| US9859462B2 (en) | Semiconductor structure | |
| US20180138367A1 (en) | Nitride Light Emitting Diode and Growth Method | |
| JP2017092442A (en) | Ultraviolet light emitting diode | |
| CN104505443A (en) | GaN-based LED epitaxial structure and production method thereof | |
| KR20150023533A (en) | Semiconductor laminate structure and semiconductor element | |
| US20150048396A1 (en) | Light emitting structure and semiconductor light emitting element having the same | |
| CN208352326U (en) | A kind of epitaxial structure of UV LED | |
| KR101813717B1 (en) | Nitride semiconductor light emitting device | |
| CN105098009A (en) | Semiconductor structure | |
| CN103855262A (en) | Nitride LED epitaxy structure suitable for heavy current driving | |
| KR20080088221A (en) | Light emitting diode having well layer of superlattice structure | |
| CN101483212B (en) | Group III nitride compound semiconductor LED and method for manufacturing the same | |
| CN103165776A (en) | Light-emitting diode structure capable of obtaining three-primary-color light | |
| CN109560174A (en) | A kind of LED epitaxial structure and preparation method thereof | |
| KR100898586B1 (en) | Light emitting diode | |
| KR101043345B1 (en) | Nitride semiconductor device | |
| TW201532306A (en) | Semiconductor structure | |
| CN105322063A (en) | Semiconductor structure | |
| KR20120013577A (en) | Light emitting device having active region of multi-quantum well structure | |
| KR20110084683A (en) | Light emitting device having active region of quantum well structure | |
| CN205911325U (en) | Epitaxial wafer of light emitting diode | |
| CN209981260U (en) | Composite DBR structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20140806 |
|
| WD01 | Invention patent application deemed withdrawn after publication |