CN103972058A - Manufacturing method of self-aligning double-layer graph semiconductor structure - Google Patents

Manufacturing method of self-aligning double-layer graph semiconductor structure Download PDF

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CN103972058A
CN103972058A CN201410216691.9A CN201410216691A CN103972058A CN 103972058 A CN103972058 A CN 103972058A CN 201410216691 A CN201410216691 A CN 201410216691A CN 103972058 A CN103972058 A CN 103972058A
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layer
core graphic
etching
silicon oxide
double
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崇二敏
黄君
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0338Process specially adapted to improve the resolution of the mask

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  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The invention provides a manufacturing method of a self-aligning double-layer graph semiconductor structure. The manufacturing method comprises the steps of providing a semiconductor substrate, and forming a first silicon oxide layer and a polycrystalline silicon layer on the semiconductor substrate; forming a core graph layer on the polycrystalline silicon layer, wherein the core graph layer is made of silicon nitride; forming an anti-reflection layer and a photoresist layer on the core graph layer in sequence, wherein a core graph is defined by the photoresist layer; etching the anti-reflection layer and the core graph layer with the photoresist layer as a mask, transferring the pattern of the core graph onto the core graph layer, and forming second silicon dioxide layers with the vertical appearance on the two sides of the core graph layer remaining on the polycrystalline silicon layer, wherein the core graph layer remaining on the polycrystalline silicon layer has the vertical appearance; etching the polycrystalline silicon layer and the first silicon oxide layer with the second silicon dioxide layers with the vertical appearance as masks to form the self-aligning double-layer graph structure with the vertical appearance.

Description

The manufacture method of the double-deck figure semiconductor structure of autoregistration
Technical field
The present invention relates to technical field of semiconductors, relate in particular to the manufacture method of the double-deck figure semiconductor structure of a kind of autoregistration.
Background technology
At 20nm and with lower node, double-deck figure (SADP) technique of autoregistration has been applied to the making of the critical semiconductor level such as active region (AA) and polysilicon (Poly).
Please refer to the manufacture method cross-sectional view of the double-deck figure semiconductor structure of autoregistration of the prior art shown in Fig. 1-Fig. 7.Please refer to Fig. 1, first, Semiconductor substrate 10 is provided, in described Semiconductor substrate 10, form successively silicon nitride layer 11, core graphic layer 13, hard mask layer 17, anti-reflecting layer 14 and photoresist layer 15, the material of described core graphic layer 13 is agraphitic carbon (APF), and the material of described hard mask layer 17 is SiOC.
Then, with reference to figure 2 and in conjunction with Fig. 1, carry out etching technics taking described photoresist layer 15 as mask, the anti-reflecting layer not covered by photoresist layer 15 14 is removed, the anti-reflecting layer 14 retaining is as the mask of subsequent technique, and this processing step will consume a part of photoresist layer 15.Then taking the anti-reflecting layer 14 of described reservation as mask, carry out etching technics, described hard mask layer 17 is carried out to etching technics, the hard mask layer 17 not covered by the anti-reflecting layer 14 of described reservation is removed, the part hard mask layer 17 of reservation is using the mask as subsequent process steps.Through this processing step, photoresist layer 15 and anti-reflecting layer 14 are consumed complete.
Then, continue with reference to figure 2, carry out etching technics taking the part hard mask layer 17 of described reservation as mask, the part core graphic layer 13 not covered by the part hard mask layer 17 of described reservation is removed, figure is transferred in the part core graphic layer 13 of reservation, the part core graphic layer 13 of this reservation is using the mask layer as subsequent etching technique.In the time of etching core graphic layer 13, need to consider the etching selection ratio between hard mask layer 17 and core graphic layer 13, described etching technics need to have higher etching selection ratio to core graphic layer 13 and hard mask layer 17, to make hard mask layer 17 have enough stopping to the etching technics of core graphic layer 13.In order to obtain above-mentioned etching selection ratio, prior art is utilized SO conventionally 2and O 2mist carries out etching to core graphic layer 13 in comparatively clean reaction cavity; Utilize O 2generate CO or CO with the plasma reaction of carbon 2core graphic layer 13 is carried out to etching.But the shortcoming of above-mentioned technical process is the reaction of oxygen and carbon is more prone to isotropic chemical reaction; Therefore in whole etching process, the time that described core graphic layer 13 from top to bottom exposes in plasma is fewer and feweri, causes the side direction of core graphic layer 13 to be subject to O 2damage reduces from top to bottom, finally forms the core graphic layer 13 of a trapezoid pattern.
Then, please refer to Fig. 3 and remove described mask layer 17, the core graphic layer 13 of described reservation uses the mask as subsequent etching technique.
Then, please refer to Fig. 4, utilize atom layer deposition process, form the silicon oxide layer 16 that covers core graphic layer 13 and silicon nitride layer 11 surfaces.The silicon oxide layer 16 of described core graphic layer 13 both sides will retain and form sidewall structure, and the silicon oxide layer 16 that is covered in core graphic layer 13 top and silicon nitride layer 11 surfaces is removed.Due to the trapezoid that is shaped as of core graphic layer 13, therefore, the silicon oxide layer 16 that is positioned at core graphic layer 13 both sides presents skewed.
Then, please refer to Fig. 5, described silicon oxide layer 16 is carried out to etching technics, removal is positioned at the silicon oxide layer 16 on core graphic layer 13 top and silicon nitride layer 11 surfaces, retain the silicon oxide layer 16 that is positioned at core graphic layer 13 both sides, the silicon oxide layer 16 that remaines in core graphic layer 13 both sides has skewed pattern.This remaines in the silicon oxide layer 16 of core graphic layer 13 both sides as the mask of subsequent etching technique.
Then, please refer to Fig. 6, and in conjunction with Fig. 5, carry out etching technics, remove core graphic layer 13.As shown in Figure 6 trapezoidal of the morphogenesis of the described silicon oxide layer 16 that remaines in core graphic layer 13 both sides.Then, taking the described silicon oxide layer 16 that remaines in core graphic layer 13 both sides as mask, silicon nitride layer 11 to below carries out etching technics, remove the silicon nitride layer 11 not covered by the described silicon oxide layer 16 that remaines in core graphic layer 13 both sides, the silicon nitride layer 11 of reservation is the double-deck graphic structure of autoregistration.Because this silicon oxide layer 16 that remaines in core graphic layer 13 both sides is for skewed, its pattern has affected the pattern of the double-deck graphic structure of described autoregistration, makes pattern and the size of the double-deck graphic structure of this autoregistration unstable.
Therefore, need to improve prior art, to obtain the double-deck figure semiconductor structure of autoregistration with stable pattern and size.
Summary of the invention
The problem that the present invention solves provides the manufacture method of the double-deck figure semiconductor structure of a kind of autoregistration, can form the double-deck figure semiconductor structure with stable pattern and size.
For addressing the above problem, the invention provides the manufacture method of the double-deck figure semiconductor structure of a kind of autoregistration, comprising:
Semiconductor substrate is provided, in described Semiconductor substrate, forms the first silicon oxide layer, polysilicon layer;
On described polysilicon layer, form core graphic layer, the material of described core graphic layer is silicon nitride;
On described core graphic layer, form successively anti-reflecting layer and photoresist layer, described photoresist layer has defined core graphic;
Taking described photoresist layer as mask, described anti-reflecting layer and core graphic layer are carried out to etching, by the design transfer of described core graphic, to described core graphic layer, the core graphic layer retaining on described polysilicon layer has vertical profile;
Remove described photoresist layer and anti-reflecting layer;
On the core graphic layer of described reservation, form the second silicon oxide layer, described the second silicon oxide layer covers the surface of described core graphic layer and described polysilicon layer;
Carry out etching technics, retain the second silicon oxide layer that is positioned at core graphic layer both sides, the second silicon oxide layer of polysilicon layer surface and core graphic layer top is removed;
Remove the core graphic layer of described reservation;
Taking described the second silicon oxide layer that is positioned at core graphic layer both sides as mask, described polysilicon layer, the first silicon oxide layer are carried out to etching technics, form the double-deck graphic structure of autoregistration with vertical profile.
Alternatively, describedly taking described photoresist layer as mask, described anti-reflecting layer and core graphic layer are carried out to etching technics as dry etch process, carry out after etching at antagonistic reflex layer, the anti-reflecting layer not covered by photoresist layer will be removed, and remaining anti-reflecting layer is as the mask of etching core graphic layer.
Alternatively, the etching gas of the dry etch process of described anti-reflecting layer comprises: CF 4, CHF 3, O 2, described core graphic layer is as the stop-layer of etching anti-reflecting layer.
Alternatively, the etching technics utilization of described core graphic layer contains CF 4, CHF 3, O 2mist carry out, polysilicon layer is as etching stop layer.
Alternatively, described anti-reflecting layer and photoresist layer utilize dry etch process to remove, and the etching gas of described dry etch process comprises O 2gas.
Alternatively, described the second silicon oxide layer utilizes atom layer deposition process to make, and the thickness range of described the second silicon oxide layer is 10-30 nanometer.
Alternatively, described the second silicon oxide layer by polycrystal layer surface and core graphic layer top is removed as utilizing dry etch process to carry out, and described dry etch process utilization contains C 4f 8, O 2mist carry out.
Alternatively, the core graphic layer of the described reservation of described removal is undertaken by wet-etching technology, and described wet-etching technology utilizes hot phosphoric acid solution to carry out.
Alternatively, the temperature range of described hot phosphoric acid solution is 150-175 degree Celsius.
Alternatively, the etching technics of described polysilicon layer, the first silicon oxide layer comprises:
Etching polysilicon layer etching technics step, utilizes and contains CF 4, SF 6, N 2, O 2mist polysilicon layer is carried out to etching, described the second silicon oxide layer that is positioned at core graphic layer both sides is transferred on the polysilicon layer after etching;
The first silicon oxide layer etching technics step, utilizes and contains CF 4gas described the first silicon oxide layer is carried out to etching technics, form the double-deck graphic structure of described autoregistration.
Compared with prior art, the present invention has the following advantages:
Method of the present invention by forming the first silicon oxide layer in Semiconductor substrate, polysilicon layer, utilize silicon nitride layer as core graphic layer, carrying out photoetching process when the figure of photoresist is transferred to this core graphic layer, can form the core graphic layer with vertical profile, the second silicon oxide layer of these core graphic layer both sides also can have vertical profile, thereby can ensure taking the second silicon oxide layer of these core graphic layer both sides as mask the etching technics that polysilicon layer and the first silicon oxide layer are carried out, the double-deck graphic structure of the final autoregistration forming also has vertical profile.Thereby the present invention is by the optimization collocation of the various retes that form in Semiconductor substrate, can utilize existing maturation process technology to form to have the double-deck graphic structure of autoregistration of vertical profile.
Brief description of the drawings
Fig. 1-Fig. 7 is the manufacture method cross-sectional view of the double-deck figure semiconductor structure of autoregistration of prior art;
Fig. 8-Figure 14 is the manufacture method cross-sectional view of the double-deck figure semiconductor structure of autoregistration of one embodiment of the invention.
Embodiment
Prior art is due in the time carrying out etching taking photoresist layer as mask to core graphic layer, because the material of core graphic layer is agraphitic carbon, in order to ensure the etching selection ratio between this core graphic layer and the silicon nitride layer of below and the hard mask layer of top, adopt SO 2and O 2mist is as etching gas, be skewed and cause the pattern of the sidewall of the final core graphic layer forming, the core graphic layer forming above silicon nitride layer presents trapezoid pattern, also caused the inclination pattern at the silicon oxide layer of core graphic layer both sides, finally made taking the silicon oxide layer of these core graphic layer both sides unstable as covering size and the pattern of the double-deck figure of film formed autoregistration.
For addressing the above problem, the invention provides the manufacture method of the double-deck figure semiconductor structure of a kind of autoregistration, comprising:
Semiconductor substrate is provided, in described Semiconductor substrate, forms the first silicon oxide layer, polysilicon layer;
On described polysilicon layer, form core graphic layer, the material of described core graphic layer is silicon nitride;
On described core graphic layer, form successively anti-reflecting layer and photoresist layer, described photoresist layer has defined core graphic;
Taking described photoresist layer as mask, described anti-reflecting layer and core graphic layer are carried out to etching, by the design transfer of described core graphic, to described core graphic layer, the core graphic layer retaining on described polysilicon layer has vertical profile;
Remove described photoresist layer and anti-reflecting layer;
On the core graphic layer of described reservation, form the second silicon oxide layer, described the second silicon oxide layer covers the surface of described core graphic layer and described polysilicon layer;
Carry out etching technics, retain the second silicon oxide layer that is positioned at core graphic layer both sides, the second silicon oxide layer of polysilicon layer surface and core graphic layer top is removed;
Remove the core graphic layer of described reservation;
Taking described the second silicon oxide layer that is positioned at core graphic layer both sides as mask, described polysilicon layer, the first silicon oxide layer are carried out to etching technics, form the double-deck graphic structure of autoregistration with vertical profile.
Below in conjunction with specific embodiment, technical scheme of the present invention is described in detail.For technical scheme of the present invention is described better, please refer to the manufacture method cross-sectional view of the double-deck figure semiconductor structure of autoregistration of the one embodiment of the invention shown in Fig. 8-Figure 14.
First, please refer to Fig. 8, Semiconductor substrate 100 is provided, in described Semiconductor substrate 100, form the first silicon oxide layer 101, polysilicon layer 102.Described the first silicon oxide layer 101 utilizes boiler tube technique to make.Described boiler tube technique is same as the prior art, does not repeat at this.Described polysilicon layer 102 utilizes existing chemical vapor deposition method to make.
Then, continue with reference to figure 8, on described polysilicon layer 102, form core graphic layer 103, the material of described core graphic layer 103 is silicon nitride.Between the polysilicon layer 102 of described core graphic layer 103 and below and the anti-reflecting layer 104 that forms, there is higher etching selection ratio in follow-up processing step, and in etching, can avoid forming the isotropic etching of chemistry, and then form the core graphic with vertical profile, be conducive to the final double-deck graphic structure of autoregistration with stable pattern and size that forms.
The present invention is just by the rete collocation of core graphic layer 103, polysilicon layer 102, anti-reflecting layer 104, make to possess higher etching selection ratio between this core graphic layer 103 and polysilicon layer 102, core graphic layer 103 and anti-reflecting layer 104, easily utilize existing etching technics to form vertical profile follow-up, final guarantee forms the double-deck graphic structure of autoregistration with vertical profile, specifically will in subsequent step of the present invention, be elaborated.
Then, continue with reference to figure 8, form successively anti-reflecting layer 104 and photoresist layer 105 on described core graphic layer 103, described photoresist layer 105 has defined core graphic.Described photoresist layer 105 and anti-reflecting layer 104 utilize existing photoetching process to make.
In follow-up processing step, to carry out etching to described anti-reflecting layer 104 and core graphic layer 103 taking described photoresist layer 105 as mask, the design transfer of the core graphic that photoresist layer 105 is defined is to described core graphic layer 103, and the core graphic layer 103 finally remaining on described polysilicon layer 102 will have vertical profile (please refer to Fig. 9).
Then, please refer to Fig. 9, and in conjunction with Fig. 8, taking described photoresist layer 105 as mask, described anti-reflecting layer 104 and core graphic layer 103 are carried out to etching, by the design transfer of the core graphic of described photoresist layer 105, to described core graphic layer 103, the core graphic layer 103 retaining on final described polysilicon layer 102 has vertical profile.
Particularly, as an embodiment, describedly taking described photoresist layer 105 as mask, described anti-reflecting layer 104 and core graphic layer 103 are carried out to etching technics as dry etch process.Taking photoresist layer 105 as mask, antagonistic reflex layer 104 carries out after etching, and the anti-reflecting layer 104 not covered by photoresist layer 105 will be removed, the mask of remaining anti-reflecting layer 104 when as etching core graphic layer 103.
As an embodiment, the etching gas of the dry etch process of described anti-reflecting layer 104 comprises: CF 4, CHF 3, O 2, described core graphic layer 103 is as the stop-layer of etching anti-reflecting layer.
The etching technics utilization of core graphic layer 103 of the present invention contains CF 4, CHF 3, O 2mist carry out, when described core graphic layer 103 is carried out to etching technics, the polysilicon layer 102 of described core graphic layer 103 below is as etching stop layer.
Due between described polysilicon layer 102 and core graphic layer 103 (material is silicon nitride) and there is higher etching selection ratio between core graphic layer 102 and anti-reflecting layer 104, therefore can utilize existing etching technics to carry out etching to core graphic layer 103, and the core graphic layer 103 retaining on polysilicon layer 102 have vertical profile.
Then, continue with reference to figure 9 (in conjunction with Fig. 8), utilize containing O 2gas carry out etching technics, remove described photoresist layer 105 and anti-reflecting layer 104.
So far, on polysilicon layer 102, form the core graphic layer 103 with vertical profile, the vertical profile of this core graphic layer 103 is conducive to the carrying out of subsequent step, is conducive to form in core graphic layer 103 both sides that retain have the second oxide layer of vertical profile and be conducive to the final double-deck graphic structure of autoregistration with vertical profile that forms.
Then, with reference to Figure 10, form the second silicon oxide layer 106 on the core graphic layer 103 of described reservation, described the second silicon oxide layer 106 covers the surface of described core graphic layer 103 and described polysilicon layer 102.
In the present embodiment, described the second silicon oxide layer 106 utilizes atom layer deposition process to make, and the thickness range of described the second silicon oxide layer 106 is 10-30 nanometer.As an embodiment, the thickness of described the second silicon oxide layer 106 is 20 nanometers.
Because the core graphic layer 103 of described reservation has vertical profile, therefore, the second silicon oxide layer 106 forming in core graphic layer 103 both sides of this reservation also has vertical profile, has avoided prior art because the pattern of core graphic layer is the inclination pattern of the second silicon oxide layer of tilting to cause.
Then, please refer to Figure 11, carry out etching technics, retain the second silicon oxide layer 106 that is positioned at core graphic layer both sides, polysilicon layer 102 surface and the second silicon oxide layer 106 of being positioned at core graphic layer 103 top of reservation are removed, the second silicon oxide layer 106 that forms vertical profile in the both sides of the core graphic layer 103 of described reservation, this second silicon oxide layer 106 that is positioned at core graphic layer 103 both sides will be served as subsequent process steps mask.Described etching technics is dry etch process, and in the present embodiment, described etching technics utilization contains C 4f 8and O 2gas carry out.
Then, please refer to Figure 12, and in conjunction with Figure 11, carry out etching technics, the core graphic layer 103 staying described in removal.Described etching technics is wet-etching technology, and described wet-etching technology utilizes hot phosphoric acid solution to carry out.Hot phosphoric acid solution has higher etching selection ratio to described core graphic layer 103 (material is silicon nitride) and the polysilicon layer 102 of below, can be by the comparatively clean removal of core graphic layer, and make the second silicon oxide layer 106 that is positioned at core graphic layer both sides still there is vertical profile.The temperature range of described hot phosphoric acid solution is 150-175 degree Celsius, and preferred, the temperature range of described hot phosphoric acid solution is 160-170 degree Celsius, and in the present embodiment, the temperature of described hot phosphoric acid solution is 165 degrees Celsius.Under this temperature range, hot phosphoric acid solution can be comparatively quick and clean removes core graphic layer, and the second silicon oxide layer 106 that remaines in core graphic layer both sides is still vertical profile.
Then, please refer to Figure 13, taking described the second silicon oxide layer 106 that is positioned at core graphic layer both sides as mask, described polysilicon layer 102, the first silicon oxide layer 101 are carried out to etching technics, form the double-deck graphic structure of autoregistration with vertical profile.
Particularly, above-mentioned etching technics comprises:
Carry out etching polysilicon layer etching technics step, utilize and contain CF 4, SF 6, N 2, O 2mist polysilicon layer 102 is carried out to etching, the figure of described the second silicon oxide layer 106 that is positioned at core graphic layer both sides is transferred on the polysilicon layer 102 after etching;
With reference to Figure 14 and in conjunction with Figure 13, carry out the first silicon oxide layer etching technics step, utilize and contain CF 4gas described the first silicon oxide layer 101 is carried out to etching technics, the present invention is by controlling the process time of etching technics, when the first silicon oxide layer 101 is carried out to etching, the second silicon oxide layer 106 that is positioned at polysilicon layer 102 tops is removed, form the double-deck graphic structure of described autoregistration.
To sum up, method of the present invention by forming the first silicon oxide layer in Semiconductor substrate, polysilicon layer, utilize silicon nitride layer as core graphic layer, carrying out photoetching process when the figure of photoresist is transferred to this core graphic layer, can form the core graphic layer with vertical profile, the second silicon oxide layer of these core graphic layer both sides also can have vertical profile, thereby can ensure taking the second silicon oxide layer of these core graphic layer both sides as mask the etching technics that polysilicon layer and the first silicon oxide layer are carried out, the double-deck graphic structure of the final autoregistration forming also has vertical profile.Thereby the present invention is by the optimization collocation of the various retes that form in Semiconductor substrate, can utilize existing maturation process technology to form to have the double-deck graphic structure of autoregistration of vertical profile.
Therefore, above-mentioned preferred embodiment is only explanation technical conceive of the present invention and feature, and its object is to allow person skilled in the art can understand content of the present invention and implement according to this, can not limit the scope of the invention with this.All equivalences that Spirit Essence is done according to the present invention change or modify, within all should being encompassed in protection scope of the present invention.

Claims (10)

1. a manufacture method for the double-deck figure semiconductor structure of autoregistration, is characterized in that, comprising: Semiconductor substrate is provided, forms the first silicon oxide layer, polysilicon layer in described Semiconductor substrate; On described polysilicon layer, form core graphic layer, the material of described core graphic layer is silicon nitride; On described core graphic layer, form successively anti-reflecting layer and photoresist layer, described photoresist layer has defined core graphic;
Taking described photoresist layer as mask, described anti-reflecting layer and core graphic layer are carried out to etching, by the design transfer of described core graphic, to described core graphic layer, the core graphic layer retaining on described polysilicon layer has vertical profile;
Remove described photoresist layer and anti-reflecting layer;
On the core graphic layer of described reservation, form the second silicon oxide layer, described the second silicon oxide layer covers the surface of described core graphic layer and described polysilicon layer;
Carry out etching technics, retain the second silicon oxide layer that is positioned at core graphic layer both sides, the second silicon oxide layer of polysilicon layer surface and core graphic layer top is removed;
Remove the core graphic layer of described reservation;
Taking described the second silicon oxide layer that is positioned at core graphic layer both sides as mask, described polysilicon layer, the first silicon oxide layer are carried out to etching technics, form the double-deck graphic structure of autoregistration with vertical profile.
2. the manufacture method of the double-deck figure semiconductor structure of autoregistration as claimed in claim 1, it is characterized in that, describedly taking described photoresist layer as mask, described anti-reflecting layer and core graphic layer are carried out to etching technics as dry etch process, carry out after etching at antagonistic reflex layer, the anti-reflecting layer not covered by photoresist layer will be removed, and remaining anti-reflecting layer is as the mask of etching core graphic layer.
3. the manufacture method of the double-deck figure semiconductor structure of autoregistration as claimed in claim 2, is characterized in that, the etching gas of the dry etch process of described anti-reflecting layer comprises: CF 4, CHF 3, O 2, described core graphic layer is as the stop-layer of etching anti-reflecting layer.
4. the manufacture method of the double-deck figure semiconductor structure of autoregistration as claimed in claim 2, is characterized in that, the etching technics utilization of described core graphic layer contains CF 4, CHF 3, O 2mist carry out, polysilicon layer is as etching stop layer.
5. the manufacture method of the double-deck figure semiconductor structure of autoregistration as claimed in claim 1, is characterized in that, described anti-reflecting layer and photoresist layer utilize dry etch process to remove, and the etching gas of described dry etch process comprises O 2gas.
6. the manufacture method of the double-deck figure semiconductor structure of autoregistration as claimed in claim 1, is characterized in that, described the second silicon oxide layer utilizes atom layer deposition process to make, and the thickness range of described the second silicon oxide layer is 10-30 nanometer.
7. the manufacture method of the double-deck figure semiconductor structure of autoregistration as claimed in claim 1, it is characterized in that, described the second silicon oxide layer by polysilicon layer surface and core graphic layer top is removed as utilizing dry etch process to carry out, and described dry etch process utilization contains C 4f 8, O 2mist carry out.
8. the manufacture method of the double-deck figure semiconductor structure of autoregistration as claimed in claim 1, is characterized in that, the core graphic layer of the described reservation of described removal is undertaken by wet-etching technology, and described wet-etching technology utilizes hot phosphoric acid solution to carry out.
9. the manufacture method of the double-deck figure semiconductor structure of autoregistration as claimed in claim 1, is characterized in that, the temperature range of described hot phosphoric acid solution is 150-175 degree Celsius.
10. the manufacture method of the double-deck figure semiconductor structure of autoregistration as claimed in claim 1, is characterized in that, the etching technics of described polysilicon layer, the first silicon oxide layer comprises:
Etching polysilicon layer etching technics step, utilizes and contains CF 4, SF 6, N 2, O 2mist polysilicon layer is carried out to etching, the figure of described the second silicon oxide layer that is arranged in core graphic layer both sides is transferred to the polysilicon layer after etching;
The first silicon oxide layer etching technics step, utilizes and contains CF 4gas described the first silicon oxide layer is carried out to etching technics, form the double-deck graphic structure of described autoregistration.
CN201410216691.9A 2014-05-21 2014-05-21 Manufacturing method of self-aligning double-layer graph semiconductor structure Pending CN103972058A (en)

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Application publication date: 20140806