CN103942119A - Method and device for processing memory errors - Google Patents

Method and device for processing memory errors Download PDF

Info

Publication number
CN103942119A
CN103942119A CN201310736746.4A CN201310736746A CN103942119A CN 103942119 A CN103942119 A CN 103942119A CN 201310736746 A CN201310736746 A CN 201310736746A CN 103942119 A CN103942119 A CN 103942119A
Authority
CN
China
Prior art keywords
memory
data
object element
error
backup
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201310736746.4A
Other languages
Chinese (zh)
Inventor
李涛
常胜
王工艺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hangzhou Huawei Digital Technologies Co Ltd
Original Assignee
Hangzhou Huawei Digital Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hangzhou Huawei Digital Technologies Co Ltd filed Critical Hangzhou Huawei Digital Technologies Co Ltd
Priority to CN201310736746.4A priority Critical patent/CN103942119A/en
Publication of CN103942119A publication Critical patent/CN103942119A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The invention discloses a method for processing memory errors. The method includes the steps that whether errors in a target unit in a main memory are hard errors or not is detected; if yes, data in the target unit are corrected to be correct data through a redundancy correction algorithm; the correct data are stored into a preset backup memory. The invention further discloses a device for processing the memory errors. By the adoption of the method and device, the hard errors in the memories can be eliminated.

Description

A kind of disposal route of memory error and device
Technical field
The present invention relates to computer realm, relate in particular to a kind of disposal route and device of memory error.
Background technology
World today's computer technology develop rapidly, for pursuing high-performance, supercomputer scale is more and more huger, also more and more higher to system reliability requirement, and memory reliability occupies very important share in supercomputer system reliability.
The mistake of storer is divided from producing wrong mechanism, memory error can be divided into for soft error (Soft Error) and hard error (Hard Error) two classes.Storer soft error mainly occurs in the time that storage chip is disturbed by alpha particle or cosmic rays, benefiting from present memory chip package quality of materials is greatly improved, be subject to alpha particle affect and cause the situation of soft error to be able to obvious minimizing, but soft error is still a class of probability of happening maximum in memory error.Because the interference of alpha ion or cosmic rays only can cause the potential change of moment conventionally, so soft error is " provisional ".Hard error (Hard Error) is to be lost efficacy and caused by the silicon chip of storage unit and metallization physics, once occur or exist, is " permanent ".
For soft error, normally used technology has ECC error correcting code, storer to clean the operations such as algorithm and memory redundancy, if once but there is hard error in Memory Storage Unit, and clean and cannot eliminate by storer.
Summary of the invention
Embodiment of the present invention technical matters to be solved is, a kind of disposal route and device of memory error is provided.Can solve the deficiency that in prior art, storer hard error cannot be eliminated.
In order to solve the problems of the technologies described above, first aspect present invention provides a kind of disposal route of memory error, comprising:
Whether the type of error that detects object element in primary memory is hard error;
If yes, adopt redundancy correct algorithm that the data in described object element are corrected as to correct data;
By described proper data storage in preset backup of memory.
In the possible implementation of the first,
In described detection primary memory, whether the type of error of object element is that the step of hard error comprises:
If detect there is at least twice mistake in the data in described object element, and the type of error of determining described object element is hard error.
In conjunction with the possible implementation of the first of first aspect, in the possible implementation of the second, described described proper data storage to the step in the clear area of preset backup of memory is comprised:
Obtain the address that described object element is corresponding;
The inquiry storage unit corresponding with described address in described backup of memory;
By described proper data storage in described storage unit.
In conjunction with the possible implementation of the second of first aspect, in the third possible implementation, describedly in preset backup of memory, inquire about clear area, and by described proper data storage to after the step of described clear area, also comprise:
Receive the operation requests to described object element, described operation requests comprises the address of described object element;
According to described address, described operation requests is redirected to described backup of memory.
In conjunction with the third possible implementation of first aspect, in the 4th kind of possible implementation, also comprise:
If the capacity of the un-occupied space of described backup of memory is less than prevalue, to the instruction of CPU reporting interruption, so that whether the type of error that described CPU stops carrying out object element in described detection primary memory according to described interrupt instruction is the step of hard error.
In conjunction with the 4th kind of possible implementation of first aspect, in the 5th kind of possible implementation, also comprise:
Record errors number, mistake figure place and the address of the data of described object element.
In conjunction with any one possible implementation in five kinds of first aspects to the, in the 6th kind of possible implementation, also comprise:
If detect first, the data of described object element make a mistake, and adopt redundancy correct algorithm that the data of described object element are corrected, and the data after correcting are stored in the clear area of described backup of memory;
For correct, remove the data in described clear area if the data of described object element detected for the second time.
In conjunction with the 6th kind of possible implementation of first aspect, in the 7th kind of possible implementation, also comprise:
Adopting preset redundant arithmetic is the data increase error correcting code in described backup of memory.
Correspondingly, second aspect present invention also provides a kind for the treatment of apparatus of memory error, comprising:
Whether detection module is hard error for detection of the type of error of object element in primary memory;
Correct module, if be yes for the testing result of described detection module, adopt redundancy correct algorithm that the data in described object element are corrected as to correct data;
Backup module, for by described proper data storage to preset backup of memory.
In the possible implementation of the first, if described detection module, for the data that described object element detected, at least twice mistake occurs, the type of error of determining described object element is hard error.
In conjunction with the possible implementation of the first of second aspect, in the possible implementation of the second, described backup module comprises:
Acquiring unit, for obtaining the address that described object element is corresponding;
Query unit, for inquiring about the storage unit corresponding with described address at described backup of memory;
Storage unit, for by described proper data storage to described storage unit.
In conjunction with the possible implementation of the second of second aspect, in the third possible implementation, also comprise:
Receiver module, for receiving the operation requests to described object element, described operation requests comprises the address of described object element;
Redirection module, for being redirected to described backup of memory according to described address by described operation requests.
In conjunction with the third possible implementation of second aspect, in the 4th kind of possible implementation, also comprise:
Reporting module, if be less than prevalue for the capacity of the un-occupied space of described backup of memory, to the instruction of CPU reporting interruption, so that described CPU indicates described detection module to quit work according to described interrupt instruction.
In conjunction with the 4th kind of possible implementation of second aspect, in the 5th kind of possible implementation, also comprise:
Logging modle, for recording errors number, mistake figure place and the address of data of described object element.
In conjunction with any one possible implementation in five kinds of second aspects to the, in the 6th kind of possible implementation, also comprise:
The first module, if make a mistake for the data that described object element detected first, adopts redundancy correct algorithm that the data of described object element are corrected, and the data after correcting is stored in the clear area of described backup of memory;
The second module, if for detecting that for the second time the data of described object element are correct, remove the data in described clear area.
In conjunction with the 6th kind of possible implementation of second aspect, in the 7th kind of possible implementation, also comprise:
Redundant module is the data increase error correcting code of described backup of memory for adopting preset redundant arithmetic.
Implement the embodiment of the present invention, there is following beneficial effect:
By the type of error that the object element losing efficacy occurs in primary memory is identified, if type of error is hard error, after being corrected, data in this object element are stored in backup of memory, the deficiency that can avoid the hard error of storer in prior art to eliminate, has improved the reliability of storer.
Brief description of the drawings
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the schematic flow sheet of the disposal route of a kind of memory error of first embodiment of the invention;
Fig. 2 is the schematic flow sheet of the disposal route of a kind of memory error of second embodiment of the invention;
Fig. 3 is the operation chart of the disposal route of a kind of memory error of the embodiment of the present invention;
Fig. 4 is another operation chart of the disposal route of a kind of memory error of the embodiment of the present invention;
Fig. 5 is the another operation chart of the disposal route of a kind of memory error of the embodiment of the present invention;
Fig. 6 is the structural representation of backup of memory in the embodiment of the present invention;
Fig. 7 is the structural representation of the treating apparatus of a kind of memory error of first embodiment of the invention;
Fig. 8 is the structural representation of the treating apparatus of a kind of memory error of second embodiment of the invention;
Fig. 9 is the structural representation of backup module in Fig. 8;
Figure 10 is the structural representation of the treating apparatus of a kind of memory error of third embodiment of the invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
Referring to Fig. 1, be the schematic flow sheet of the disposal route of a kind of memory error of first embodiment of the invention, in the present embodiment, described method comprises:
In S101, detection primary memory, whether the type of error of object element is hard error.
Concrete, the mistake of storer is divided into soft error (Soft Error) and hard error (Hard Error) two classes, and soft error is recoverable, and hard error is irrecoverable.In primary memory, be divided into the storage unit of several formed objects, the size of storage unit is that system setting or user set in advance, for example, the size of storage unit is 32Bit, 64Bit or 128Bit, treating apparatus is in the time carrying out error-detecting to primary memory, to travel through the storage unit of whole primary memory, suppose, in primary memory, comprise 16 storage unit, numbering is respectively A00-A15, numbering A02 object element lost efficacy, whether the type of error that treating apparatus detects object element is hard error, the method detecting can adopt storer ablution (Memory Scrub), if detecting the type of error of object element is hard error, execution step 102, otherwise process ends.
The data in described object element are corrected as correct data by S102, employing redundancy correct algorithm.
Concrete, the Error-control Coding Methods of using according to the data acquisition in object element, select corresponding redundancy correct algorithm to correct the data in object element, for example, the ECC coding method of data acquisition in object element, treating apparatus selects ECC algorithm that the data in object element are corrected as to correct data.
S103, by described proper data storage in preset backup of memory.
Concrete, obtain the address of object element, in backup of memory, whether inquiry there is storage unit corresponding to this address, if exist, by correct after proper data storage to the storage unit inquiring, if do not exist, open up a storage unit in the clear area of backup of memory for storing this correct data.
Implement embodiments of the invention, by the type of error that the object element losing efficacy occurs in primary memory is identified, if type of error is hard error, after being corrected, data in this object element are stored in backup of memory, the deficiency that can avoid the hard error of storer in prior art to eliminate, has improved the reliability of storer.
Referring to Fig. 2, be the schematic flow sheet of the disposal route of a kind of memory error of second embodiment of the invention, in the present embodiment, described method comprises:
Whether the data of the object element in S201, detection primary memory there is at least twice mistake.
Concrete, soft error in storer is random generation, because the quantity of storage unit in storer is very large, conventionally only can occur once a storage unit, if detect there is at least twice mistake in object element, and treating apparatus confirms that the type of error of object element is hard error.
The data in described object element are corrected as correct data by S202, employing redundancy correct algorithm.
Concrete, the Error-control Coding Methods of using according to the data acquisition in object element, select corresponding redundancy correct algorithm to correct the data in object element, for example, the ECC coding method of data acquisition in object element, treating apparatus selects ECC algorithm that the data in object element are corrected as to correct data.
S203, obtain the address that described object element is corresponding.
Concrete, the address of object element is logical address or physical address, the unique corresponding address of each storage unit in primary memory, and treating apparatus obtains the address of object unit.
S204, in described backup of memory the inquiry storage unit corresponding with described address.
Concrete, in backup of memory, whether inquiry there is storage unit corresponding to this address, if exist, the proper data storage after correcting, to the storage unit inquiring, if there are data in this storage unit, is covered to this original data by correct data; If do not exist, open up a storage unit in the clear area of backup of memory for storing this correct data.
S205, receive the operation requests to described object element, described operation requests comprises the address of described object element.
Concrete, operation requests comprises read operation request and write operation requests, carries the address of operand (being object element) in operation requests.
S206, according to described address, described operation requests is redirected to described backup of memory.
Concrete, the object element that generation was lost efficacy is a corresponding storage unit in backup of memory, and this storage unit is carried out associated with the address of object element.For example, the address of object element is 0x89FF, in backup of memory, store a storage unit A 05 associated with address 0x89FF, in receiving primary memory when the operation requests of object element A05, this operation requests is redirected to storage unit A 05, storage unit A 05 is carried out to corresponding read-write operation.
In an embodiment of the present invention, in order not affect the work of regular traffic, what operation requests was corresponding is operating as atomic operation pattern, even just in the time that object element carries out read-write operation, if this read-write operation does not complete, memory controller can not initiated new operation requests, ensures the consistance of data in primary memory.In the time conflict being detected, inform the operation failure of current initiation to message of processor transmission.
Preferably, in some embodiments of the invention, if the capacity of the un-occupied space of described backup of memory is less than prevalue, to the instruction of CPU reporting interruption, so that whether the type of error that described CPU stops carrying out object element in described detection primary memory according to described interrupt instruction is the step of hard error.
Concrete, when the capacity of the un-occupied space of backup of memory is less than object element big or small, to the instruction of CPU reporting interruption, CPU receives interrupt instruction and stops detecting the process of hard error.
Preferably, in some embodiments of the invention, if detect first, the data of described object element make a mistake, and adopt redundancy correct algorithm that the data of described object element are corrected, and the data after correcting are stored in the clear area of described backup of memory; For correct, remove the data in described clear area if the data of described object element detected for the second time.
Preferably, adopting preset redundant arithmetic is the data increase error correcting code in backup of memory, for example two-dimentional check code algorithm, there is wrong probability with the data that reduce in backup of memory, further improve the reliability of backup of memory, mode that simultaneously can hardware provides the reliability of backup of memory, for example, adopt the random access storage device that reliability is higher (RAM) as backup of memory.
Referring to Fig. 3, for the operation chart of the disposal route of a kind of memory error of the embodiment of the present invention, wherein EDE is error-detecting engine, error-detecting unit EDE detects that the data A in the object element that in primary memory, address a is corresponding makes a mistake first, the type of error of object element corresponding address a is labeled as soft error (representing with alphabetical s) by error-detecting engine, simultaneously, data A is corrected as correct data A ' by error-detecting engine, and correct data A ' is write respectively to primary memory and backup of memory, writing address a in primary memory, in backup of memory, write idle storage unit, carry out association with address a.In the time that Core initiates the read request of address a, this read request is redirected to storage unit corresponding to address a in backup of memory, in the time that Core initiates the write request of address a, backup of memory and primary memory are carried out to write operation, to keep the consistance of data in primary memory and backup of memory simultaneously.
Referring to Fig. 4, for the operation chart of the disposal route of a kind of memory error of the embodiment of the present invention, wherein EDE is error-detecting engine, error-detecting unit EDE second detects that the data A in the object element that in primary memory, address a is corresponding makes a mistake, the type of error of object element corresponding address a is labeled as hard error (representing with alphabetical h) by error-detecting engine, simultaneously, data A is corrected as correct data A ' by error-detecting engine, and correct data A ' is write respectively to primary memory and backup of memory, writing address a in primary memory, in backup of memory, write idle storage unit, carry out association with address a.In the time that Core initiates the read request of address a, this read request is redirected to storage unit corresponding to address a in backup of memory, in the time that Core initiates the write request of address a, backup of memory and primary memory are carried out to write operation, to keep the consistance of data in primary memory and backup of memory simultaneously.
Referring to Fig. 5, for the operation chart of the disposal route of a kind of memory error of the embodiment of the present invention, wherein EDE is error-detecting engine, error-detecting unit EDE detects when the data A in the object element that in primary memory, address a is corresponding is correct for the second time, error-detecting engine EDE sends clear instruction to backup of memory, to remove the data A in the storage unit of a association in address in memory under test.In the time that Core initiates the read/write requests of address a, directly access primary memory.
Referring to Fig. 6, be the structural representation of backup of memory, backup of memory adopts register or RAM to build, and its entry is few and capacity is little, and the probability that therefore soft error and hard error appear in backup of memory is far below primary memory.
Backup of memory filters the request of access from Memory Controller Hub, wherein comprises CAM unit and ITEM unit, records TAG address and significance bit in CAM unit, the data of record backup in ITEM unit; The capacity of supposing the storage unit of the each access of CPU is 512bit, for the data that back up in backup of memory, can adopt complicated algorithm (for example two-dimentional verification), further ensures correctness and the reliability of data in backup of memory.For example, as shown in Figure 6, in CAM unit, comprise TAG address, the address comprising for deposit operation request, comprise significance bit simultaneously, for representing that whether the project of corresponding ITEM unit is effective, the size of each unit is 512Bit (DATA0~7)+64Bit (ECC)+72Bit (PARITY).
Error-detecting engine EDE, for realizing the detection of soft/hard error and the maintenance of error message, the address of the storage unit that essential record makes a mistake and errors number, error-detecting causes that EDE also comprises a CAM unit, in this CAM unit, comprise address and zone bit, zone bit can soft by 1bit/wrong hard error mark or the error counter of many bit form.
Referring to Fig. 7, be the structural representation of the treating apparatus of a kind of memory error of first embodiment of the invention, in the present embodiment, described treating apparatus comprises detection module 10, corrects module 20 and backup module 30, wherein,
Whether detection module 10 is hard error for detection of the type of error of object element in primary memory;
Correct module 20, if be yes for the testing result of described detection module, adopt redundancy correct algorithm that the data in described object element are corrected as to correct data;
Backup module 30, for by described proper data storage to preset backup of memory.
Further, referring to Fig. 8, for the structural representation of the treating apparatus of a kind of memory error of second embodiment of the invention, in embodiments of the present invention, described treating apparatus is except comprising detection module 10, correcting module 20 and backup module 30, also comprise receiver module 40, redirection module 50, reporting module 60, logging modle 70, the first module 80, the second module 90 and redundant module 11, wherein
Receiver module 40, for receiving the operation requests to described object element, described operation requests comprises the address of described object element;
Redirection module 50, for being redirected to described backup of memory according to described address by described operation requests.
Reporting module 60, if be less than prevalue for the capacity of the un-occupied space of described backup of memory, to the instruction of CPU reporting interruption, so that described CPU indicates described detection module to quit work according to described interrupt instruction.
Logging modle 70, for recording errors number, mistake figure place and the address of data of described object element.
The first module 80, if make a mistake for the data that described object element detected first, adopts redundancy correct algorithm that the data of described object element are corrected, and the data after correcting is stored in the clear area of described backup of memory;
The second module 90, if for detecting that for the second time the data of described object element are correct, remove the data in described clear area.
Redundant module 11 is the data increase error correcting code of described backup of memory for adopting preset redundant arithmetic.
Optionally, backup module 30 comprises:
Acquiring unit 301, for obtaining the address that described object element is corresponding;
Query unit 302, for inquiring about the storage unit corresponding with described address at described backup of memory;
Storage unit 303, for by described proper data storage to described storage unit.
Referring to Figure 10, for the structural representation of the treating apparatus of a kind of memory error of third embodiment of the invention, hereinafter to be referred as treating apparatus 1, treating apparatus 1 comprises processor 61, storer 62, input media 63 and output unit 64, the quantity of the processor 61 in treating apparatus 1 can be one or more, and Figure 10 is taking a processor as example.In some embodiments of the present invention, processor 61, storer 62, input media 63 and output unit 64 can be connected by bus or other modes, in Figure 10, are connected to example with bus.
Wherein, in storer 62, store batch processing code, and processor 61 is for calling the program code of storer 62 storages, for carrying out following operation:
Whether the type of error that detects object element in primary memory is hard error;
If yes, adopt redundancy correct algorithm that the data in described object element are corrected as to correct data;
By described proper data storage in preset backup of memory.
In some embodiments of the invention, whether be the step of hard error comprise to processor 61 if carrying out the type of error of object element in described detection primary memory:
If detect there is at least twice mistake in the data in described object element, and the type of error of determining described object element is hard error.
In some embodiments of the invention, processor 61 is carried out and described described proper data storage to the step in the clear area of preset backup of memory is comprised:
Obtain the address that described object element is corresponding;
The inquiry storage unit corresponding with described address in described backup of memory;
By described proper data storage in described storage unit.
In some embodiments of the invention, processor 61 is also for carrying out:
Receive the operation requests to described object element, described operation requests comprises the address of described object element;
According to described address, described operation requests is redirected to described backup of memory.
In some embodiments of the invention, processor 61 is also for carrying out:
If the capacity of the un-occupied space of described backup of memory is less than prevalue, to the instruction of CPU reporting interruption, so that whether the type of error that described CPU stops carrying out object element in described detection primary memory according to described interrupt instruction is the step of hard error.
In some embodiments of the invention, processor 61 is also for carrying out:
Record errors number, mistake figure place and the address of the data of described object element.
In some embodiments of the invention, processor 61 is also for carrying out:
If detect first, the data of described object element make a mistake, and adopt redundancy correct algorithm that the data of described object element are corrected, and the data after correcting are stored in the clear area of described backup of memory;
For correct, remove the data in described clear area if the data of described object element detected for the second time.
In an embodiment of the present invention, processor 61 is also for carrying out:
Adopting preset redundant arithmetic is the data increase error correcting code in described backup of memory.
One of ordinary skill in the art will appreciate that all or part of flow process realizing in above-described embodiment method, can carry out the hardware that instruction is relevant by computer program to complete, described program can be stored in a computer read/write memory medium, this program, in the time carrying out, can comprise as the flow process of the embodiment of above-mentioned each side method.Wherein, described storage medium can be magnetic disc, CD, read-only store-memory body (Read-Only Memory, ROM) or random store-memory body (Random Access Memory, RAM) etc.
Above disclosed is only a kind of preferred embodiment of the present invention, certainly can not limit with this interest field of the present invention, one of ordinary skill in the art will appreciate that all or part of flow process that realizes above-described embodiment, and the equivalent variations of doing according to the claims in the present invention, still belong to the scope that invention is contained.

Claims (16)

1. a disposal route for memory error, is characterized in that, comprising:
Whether the type of error that detects object element in primary memory is hard error;
If yes, adopt redundancy correct algorithm that the data in described object element are corrected as to correct data;
By described proper data storage in preset backup of memory.
2. the method for claim 1, is characterized in that, in described detection primary memory, whether the type of error of object element is that the step of hard error comprises:
If detect there is at least twice mistake in the data in described object element, and the type of error of determining described object element is hard error.
3. method as claimed in claim 2, is characterized in that, described described proper data storage to the step in the clear area of preset backup of memory is comprised:
Obtain the address that described object element is corresponding;
The inquiry storage unit corresponding with described address in described backup of memory;
By described proper data storage in described storage unit.
4. method as claimed in claim 3, is characterized in that, describedly in preset backup of memory, inquires about clear area, and by described proper data storage to after the step of described clear area, also comprise:
Receive the operation requests to described object element, described operation requests comprises the address of described object element;
According to described address, described operation requests is redirected to described backup of memory.
5. method as claimed in claim 4, is characterized in that, also comprises:
If the capacity of the un-occupied space of described backup of memory is less than prevalue, to the instruction of CPU reporting interruption, so that whether the type of error that described CPU stops carrying out object element in described detection primary memory according to described interrupt instruction is the step of hard error.
6. method as claimed in claim 5, is characterized in that, also comprises:
Record errors number, mistake figure place and the address of the data of described object element.
7. the method as described in claim 1-6 any one, is characterized in that, also comprises:
If detect first, the data of described object element make a mistake, and adopt redundancy correct algorithm that the data of described object element are corrected, and the data after correcting are stored in the clear area of described backup of memory;
For correct, remove the data in described clear area if the data of described object element detected for the second time.
8. method as claimed in claim 7, is characterized in that, also comprises:
Adopting preset redundant arithmetic is the data increase error correcting code in described backup of memory.
9. a treating apparatus for memory error, is characterized in that, comprising:
Whether detection module is hard error for detection of the type of error of object element in primary memory;
Correct module, if be yes for the testing result of described detection module, adopt redundancy correct algorithm that the data in described object element are corrected as to correct data;
Backup module, for by described proper data storage to preset backup of memory.
10. device as claimed in claim 9, is characterized in that, if described detection module, for the data that described object element detected, at least twice mistake occurs, the type of error of determining described object element is hard error.
11. devices as claimed in claim 10, is characterized in that, described backup module comprises:
Acquiring unit, for obtaining the address that described object element is corresponding;
Query unit, for inquiring about the storage unit corresponding with described address at described backup of memory;
Storage unit, for by described proper data storage to described storage unit.
12. devices as claimed in claim 11, is characterized in that, also comprise:
Receiver module, for receiving the operation requests to described object element, described operation requests comprises the address of described object element;
Redirection module, for being redirected to described backup of memory according to described address by described operation requests.
13. devices as claimed in claim 12, is characterized in that, also comprise:
Reporting module, if be less than prevalue for the capacity of the un-occupied space of described backup of memory, to the instruction of CPU reporting interruption, so that described CPU indicates described detection module to quit work according to described interrupt instruction.
14. devices as claimed in claim 13, is characterized in that, also comprise:
Logging modle, for recording errors number, mistake figure place and the address of data of described object element.
15. devices as described in claim 8-14 any one, is characterized in that, also comprise:
The first module, if make a mistake for the data that described object element detected first, adopts redundancy correct algorithm that the data of described object element are corrected, and the data after correcting is stored in the clear area of described backup of memory;
The second module, if for detecting that for the second time the data of described object element are correct, remove the data in described clear area.
16. devices as claimed in claim 15, is characterized in that, also comprise:
Redundant module is the data increase error correcting code of described backup of memory for adopting preset redundant arithmetic.
CN201310736746.4A 2013-12-26 2013-12-26 Method and device for processing memory errors Pending CN103942119A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310736746.4A CN103942119A (en) 2013-12-26 2013-12-26 Method and device for processing memory errors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310736746.4A CN103942119A (en) 2013-12-26 2013-12-26 Method and device for processing memory errors

Publications (1)

Publication Number Publication Date
CN103942119A true CN103942119A (en) 2014-07-23

Family

ID=51189792

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310736746.4A Pending CN103942119A (en) 2013-12-26 2013-12-26 Method and device for processing memory errors

Country Status (1)

Country Link
CN (1) CN103942119A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105259150A (en) * 2015-11-02 2016-01-20 深圳市锦瑞电子有限公司 Fluorescence analyzer calibration system
WO2017215377A1 (en) * 2016-06-16 2017-12-21 中兴通讯股份有限公司 Method and device for processing hard memory error
CN107633865A (en) * 2016-07-19 2018-01-26 北京兆易创新科技股份有限公司 A kind of digital independent device and method of nonvolatile memory
CN109388511A (en) * 2018-09-14 2019-02-26 联想(北京)有限公司 A kind of information processing method, electronic equipment and computer storage medium
CN112540723A (en) * 2020-11-06 2021-03-23 深圳市民德电子科技股份有限公司 NOR Flash dead pixel compensation method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5694599A (en) * 1979-12-27 1981-07-31 Fujitsu Ltd Hard error detection system for memory element
EP0034188A1 (en) * 1979-08-31 1981-08-26 Fujitsu Limited Error correction system
US4617660A (en) * 1983-03-10 1986-10-14 Fujitsu Limited Faulty-memory processing method and apparatus
JPS6448153A (en) * 1987-08-19 1989-02-22 Yokogawa Electric Corp Memory controller
CN101996689A (en) * 2009-08-12 2011-03-30 台湾积体电路制造股份有限公司 Memory errors processing method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0034188A1 (en) * 1979-08-31 1981-08-26 Fujitsu Limited Error correction system
JPS5694599A (en) * 1979-12-27 1981-07-31 Fujitsu Ltd Hard error detection system for memory element
US4617660A (en) * 1983-03-10 1986-10-14 Fujitsu Limited Faulty-memory processing method and apparatus
JPS6448153A (en) * 1987-08-19 1989-02-22 Yokogawa Electric Corp Memory controller
CN101996689A (en) * 2009-08-12 2011-03-30 台湾积体电路制造股份有限公司 Memory errors processing method

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105259150A (en) * 2015-11-02 2016-01-20 深圳市锦瑞电子有限公司 Fluorescence analyzer calibration system
CN105259150B (en) * 2015-11-02 2019-01-18 深圳市锦瑞生物科技有限公司 A kind of fluorescence analyser scaling system
WO2017215377A1 (en) * 2016-06-16 2017-12-21 中兴通讯股份有限公司 Method and device for processing hard memory error
CN107516547A (en) * 2016-06-16 2017-12-26 中兴通讯股份有限公司 The processing method and processing device of internal memory hard error
CN107633865A (en) * 2016-07-19 2018-01-26 北京兆易创新科技股份有限公司 A kind of digital independent device and method of nonvolatile memory
CN107633865B (en) * 2016-07-19 2024-02-20 兆易创新科技集团股份有限公司 Data reading device and method of nonvolatile memory
CN109388511A (en) * 2018-09-14 2019-02-26 联想(北京)有限公司 A kind of information processing method, electronic equipment and computer storage medium
CN112540723A (en) * 2020-11-06 2021-03-23 深圳市民德电子科技股份有限公司 NOR Flash dead pixel compensation method

Similar Documents

Publication Publication Date Title
CN102929750B (en) Nonvolatile media dirty region tracking
US9952795B2 (en) Page retirement in a NAND flash memory system
US8255742B2 (en) Dynamically replicated memory
US8543863B2 (en) Efficiency of hardware memory access using dynamically replicated memory
US20110191649A1 (en) Solid state drive and method of controlling an error thereof
US10203883B2 (en) Performance optimization of read functions in a memory system
US9141473B2 (en) Parallel memory error detection and correction
CN103942119A (en) Method and device for processing memory errors
US9063869B2 (en) Method and system for storing and rebuilding data
US9600189B2 (en) Bank-level fault management in a memory system
CN104813409A (en) Dynamically selecting between memory error detection and memory error correction
US11355213B2 (en) Apparatus and method for verifying reliability of data read from memory device through clock modulation, and memory system including the same
CN103218271B (en) A kind of data error-correcting method and device
CN105408869B (en) Call error processing routine handles the mistake that can not be corrected
CN101901169A (en) Scanner and method
US11030040B2 (en) Memory device detecting an error in write data during a write operation, memory system including the same, and operating method of memory system
US9830218B2 (en) Cache memory with fault tolerance
US9009548B2 (en) Memory testing of three dimensional (3D) stacked memory
WO2013080299A1 (en) Data management device, data copy method, and program
US9037948B2 (en) Error correction for memory systems
US10733069B2 (en) Page retirement in a NAND flash memory system
US9304854B2 (en) Semiconductor device and operating method thereof
US20220091936A1 (en) Systems and methods for encoding metadata
JP7157516B2 (en) Error correction using hierarchical decoder
JP6193112B2 (en) Memory access control device, memory access control system, memory access control method, and memory access control program

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20140723

RJ01 Rejection of invention patent application after publication