CN103930990B - 半导体装置以及半导体装置的制造方法 - Google Patents
半导体装置以及半导体装置的制造方法 Download PDFInfo
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- CN103930990B CN103930990B CN201280055469.4A CN201280055469A CN103930990B CN 103930990 B CN103930990 B CN 103930990B CN 201280055469 A CN201280055469 A CN 201280055469A CN 103930990 B CN103930990 B CN 103930990B
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Abstract
本发明提供一种半导体装置,能以较好的生产性来制造使植入基板与半导体搭载基板的半导体元件经由植入引脚相接合并电连接的半导体装置。在该半导体装置中,经由压入植入引脚(20)的另一端的筒状端子(10),植入引脚(20)与半导体搭载基板的半导体元件(8)及/或电路图案(5)相接合。并且,植入引脚(20)的压入筒状端子(10)的压入深度L2可以调整。由此,使得处于被压入筒状端子(10)的状态的植入引脚(20)与筒状端子(10)的总长度与半导体搭载基板上的半导体元件(8)及/或电路图案(5)和植入基板(30)之间的距离相匹配。
Description
技术领域
本发明涉及半导体装置及其制造方法,尤其涉及搭载了功率半导体元件等的半导体装置及其制造方法。
背景技术
将半导体元件模块化的半导体装置例如采用图9所示的封装结构。
图9所示的半导体装置的树脂壳体52的底部设置有冷却板51。冷却板51上设置有绝缘布线基板56。绝缘布线基板56通过在绝缘基板53的两面接合金属层54、55而构成,绝缘布线基板56的金属层55与冷却板51经由焊料层57a而接合。绝缘布线基板56上设置有半导体元件58。并且,绝缘布线基板56的金属层54与半导体元件58经由焊料层57b而接合。此外,绝缘布线基板56上设置有外部端子59。并且,绝缘布线基板56的金属层54与外部端子59经由焊料层57c而接合。各半导体元件58通过接合线60与外部端子59电连接。并且,树脂壳体52的内部填充有密封树脂61进行密封。
然而,在像IGBT(Insulated Gate Bipolar Transistor:绝缘栅双极晶体管)等功率半导体元件等那样发热量较大的半导体元件的情况下,尤其需要较高的散热性。
然而,在这种现有的半导体装置中,半导体元件58的上表面侧仅连接了例如由线径为300μm~400μm左右的较细的铝线等构成的接合线60。此外,伴随着接合线60的通电会产生热量,因此,几乎不可能期待从半导体元件58的上表面散热的散热效果。
专利文献1、2中记载了提高布线电流密度、熔断电流耐量、接合可靠性、散热性等的方法。在专利文献1、2中,植入基板与半导体搭载基板的半导体元件经由植入引脚相接合,以替代引线键合布线结构。
利用图10、图11对专利文献1所公开的半导体装置进行说明。另外,对与图9所示的半导体装置实质相同的部位标注相同的标号,并省略说明。
图10所示的半导体装置中,在绝缘布线基板56上设置有半导体元件58。并且,绝缘布线基板56的金属层54与半导体元件58经由焊料层57b而接合。
半导体元件58上设置有植入基板79。植入基板79与半导体元件58经由植入基板79的植入引脚76进行电连接。
植入基板79由绝缘布线基板75、以及压入到通路孔74中的植入引脚76构成。绝缘布线基板75通过在绝缘基板71的两面接合形成印刷布线的金属层72、73而构成。通路孔74形成为贯穿绝缘布线基板75的绝缘基板71、金属层72、金属层73。若同时参照图11,则植入引脚76上设有檐部77,从植入引脚的前端到檐部77为止的一定量被压入到通路孔74中。并且,檐部77与绝缘布线基板75经由接合材料78a相接合。此外,植入引脚76的另一端经由接合材料78b与绝缘布线基板56、半导体元件58相接合。
现有技术文献
专利文献
专利文献1:日本专利特开2011-82303号公报
专利文献2:国际专利申请公开2011/083737号刊物
发明内容
发明所要解决的技术问题
然而,在图10所示的半导体装置的情况下,若根据每个产品种类而变更元器件结构,从而导致半导体元件等的元器件高度发生改变,则需要根据接合部位的半导体元件与植入基板的距离来调整植入引脚的长度。因此,需要根据产品种类的数量来准备植入基板的数量,从而存在元器件的库存管理费时费力的问题。此外,由于必须根据产品种类来准备多种植入基板,因此存在元器件成本上升的问题。
由此,本发明的目的在于提供一种半导体装置及其制造方法,能以更好的生产性来制造使植入基板与半导体搭载基板的半导体元件经由植入引脚进行接合并电连接的半导体装置。
解决技术问题所采用的技术方案
为实现上述目的,本发明的半导体装置的特征在于,
经由压入所述植入引脚的另一端的筒状端子,所述植入引脚与所述半导体搭载基板的半导体元件及/或电路图案相接合,
所述植入引脚压入所述筒状端子的压入深度可以调整,以使得处于被压入所述筒状端子的状态的所述植入引脚与所述筒状端子的总长度与所述半导体搭载基板上的半导体元件及/或电路图案和所述植入基板之间的距离相匹配。
本发明的半导体装置中,经由压入植入引脚的另一端的筒状端子,植入引脚与半导体搭载基板的半导体元件及/或电路图案相接合。因此,可对植入引脚压入筒状端子的压入深度进行调整,以使得处于被压入筒状端子的状态的植入引脚与筒状端子的总长度与半导体搭载基板上的半导体元件及/或电路图案和植入基板之间的距离相匹配。因此,即使半导体搭载基板上的半导体元件及/或电路图案与植入基板的距离根据每个结合部位而不同,也无需准备长度与各个接合部位相匹配的植入引脚。即,无需根据产品种类来改变植入基板的种类,能在多个产品之间共用植入基板,因此元器件的库存管理较为容易,并能抑制元器件成本,进而生产性较为优异。
本发明的半导体装置中,优选在所述植入引脚的压入所述筒状端子的压入部表面及/或所述筒状端子的内周面上设有镀层。并且,在所述植入引脚压入所述筒状端子的状态下进行加热来使所述镀层熔融,由此利用该镀层使所述植入引脚与所述筒状端子的接触部相接合。
本发明的半导体装置中,优选在所述植入引脚的压入所述筒状端子的压入部表面及/或所述筒状端子的内周面上涂布有烧结材料。并且,在所述植入引脚压入所述筒状端子的状态下进行加热来使所述烧结材料烧结,由此使所述植入引脚与所述筒状端子的接触部相接合。
若采用上述各实施方式,则植入引脚与筒状端子的接合强度较高,接合的可靠性较为优异。
本发明的半导体装置中,优选在所述植入引脚与所述筒状端子的内周面相接触的接触部中的与所述植入引脚正交的方向的剖面上,所述植入引脚与所述筒状端子内周的40%以上相接触。若采用该实施方式,则导电性较为优异,而且植入引脚与筒状端子的接合强度较高,接合的可靠性较为优异。
本发明的半导体装置中,优选在所述植入引脚压入所述筒状端子的压入部设有通过挤压拉伸加工而向外周突出的突起部,该突起部与所述筒状端子的内周面相接触。在该实施方式中,优选在所述压入前的状态下,从所述植入引脚的压入部的最大直径减去所述筒状端子的内径所得到的差值为0~0.25mm。
本发明的半导体装置中,优选在所述植入引脚的压入部设有未经过挤压拉伸加工的笔直的柱状部,该柱状部的至少一部分与所述筒状端子的内周面相接触。在该实施方式中,优选在所述压入前的状态下,从所述植入引脚的压入部的最大直径减去所述筒状端子的内径所得到的差值为0~0.15mm。
若采用上述各实施方式,则植入引脚与筒状端子的接合强度较高,接合的可靠性较为优异。
本发明的半导体装置中,优选所述植入引脚的靠所述筒状端子侧的前端的直径向前端收缩而呈锥形形状。若采用该实施方式,则将植入引脚压入筒状端子的操作较为容易。
本发明的半导体装置中,优选所述筒状端子的内周形成为与所述植入引脚的压入部相匹配的形状。若采用该实施方式,则能增大植入引脚与筒状端子内周的接触面积,因此导电性、接合强度较为良好。
此外,本发明的半导体装置的制造方法使用:在绝缘布线基板上搭载有半导体元件的半导体搭载基板;以及
植入基板,该植入基板通过在具有印刷布线的绝缘基板上设置用于电连接的通路孔,并将植入引脚的一端压入到该通路孔中而形成,
通过使所述植入基板的植入引脚的另一端与所述半导体搭载基板的半导体元件及/或电路图案相接合,从而对所述半导体搭载基板的半导体元件进行电连接,该半导体装置的制造方法的特征在于,
通过将所述植入引脚的另一端压入筒状端子,并调整其压入深度,来使所述植入引脚的长度与所述半导体搭载基板上的半导体元件及/或电路图案和所述植入基板之间的距离相匹配,并隔着所述筒状端子使所述植入引脚与所述半导体搭载基板的半导体元件及/或电路图案相接合。
本发明的半导体装置的制造方法中,优选在所述植入引脚压入所述筒状端子的压入部表面及/或所述筒状端子的内周面上预先形成镀层。并且,隔着所述筒状端子使所述植入基板的植入引脚的另一端与所述半导体搭载基板的半导体元件及/或电路图案相抵接,并在该状态下将如上述那样组合而成的半导体装置放入回流炉进行加热。由此进行所述半导体元件与所述绝缘布线基板的连接、以及所述植入引脚的筒状端子与半导体搭载基板的半导体元件及/或电路图案的连接。与此同时,通过使所述镀层熔融来使所述植入引脚与所述筒状端子相连接。
本发明的半导体装置的制造方法中,优选在所述植入引脚压入所述筒状端子的压入部表面及/或所述筒状端子的内周面上预先涂布烧结材料。并且,隔着所述筒状端子使所述植入基板的植入引脚的另一端与所述半导体搭载基板的半导体元件及/或电路图案相抵接,并在该状态下将如上述那样组合而成的半导体装置放入回流炉进行加热。由此进行所述半导体元件与所述绝缘布线基板的连接、以及所述植入引脚的筒状端子与半导体搭载基板的半导体元件及/或电路图案的连接。与此同时,通过使所述烧结材料烧结来使所述植入引脚与所述筒状端子相连接。
发明的效果
根据本发明,能在多个产品之间使用通用的植入基板,因此可使得元器件的库存管理较为容易,并能抑制元器件成本,从而能以较好的生产性来制造通过植入基板使半导体元件进行电连接的半导体装置。
附图说明
图1是表示本发明的半导体装置的一个实施方式的简要剖视图。
图2是图1的A部分的放大图。
图3是能用于同一半导体装置的植入引脚的简图,图3(a)为侧视图,图3(b)为图3(a)的C-C线处的剖视图。
图4是能用于同一半导体装置的植入引脚的简图,图4(a)为侧视图,图4(b)为图4(a)的D-D线处的剖视图。
图5是能用于同一半导体装置的植入引脚的简图,图5(a)为侧视图,图5(b)为图5(a)的E-E线处的剖视图。
图6是能用于同一半导体装置的植入引脚的简图,图6(a)为侧视图,图6(b)为图6(a)的F-F线处的剖视图。
图7是表示本发明的半导体装置的其它实施方式的主要部分放大剖视图。
图8是表示本发明的半导体装置的另一其它实施方式的主要部分放大剖视图。
图9是表示现有的半导体装置的一个示例的简要剖视图。
图10是表示现有的半导体装置的其它示例的简要剖视图。
图11是图10的G部分的放大图。
具体实施方式
参照附图说明本发明的半导体装置。图1示出本发明的半导体装置的一个实施方式。
该半导体装置中,在树脂壳体2的底部设置有冷却板1。冷却板1由散热性较高的材料构成。例如可以举出铜、铝、铜合金、铝合金等。
冷却板1上设置有绝缘布线基板3。绝缘布线基板3通过在绝缘基板4的两面接合金属层5、6而形成,利用金属层5在绝缘基板4上形成有规定的电路图案。并且,绝缘布线基板3的金属层6与冷却板1经由焊料或烧结材料层7a而接合。
绝缘布线基板3没有特别限定。例如可以举出,在陶瓷基板上直接接合铜板而得到的直接覆铜(Direct Bonding Copper)基板、经由纤焊材料将陶瓷与铜板接合而得到的活性金属钎焊铜(Active Metal Brazed Copper)基板等。
外部端子9经由焊料或烧结材料层7b接合在绝缘布线基板3的构成电路图案的金属层5的规定部位上。此外,多个半导体元件8a、8b经由焊料或烧结材料层7c接合在同一金属层5上。半导体元件8a、8b根据用途的不同而不同,例如可以举出IGBT等功率半导体元件、FWD等整流元件等。
半导体元件8的上方设置有植入基板30。植入基板30由绝缘布线基板34、以及压入到通路孔35中的植入引脚20构成。绝缘布线基板34通过在绝缘基板31的两面接合形成印刷布线的金属层32、33而构成。通路孔35形成为贯穿绝缘布线基板34的金属层32、绝缘基板31、金属层33。通路孔35的内表面形成有与金属层32及/或金属层33导通的未图示的金属层,该内表面的金属层与植入引脚20导通。
植入基板30的某几个植入引脚20的下端被压入到筒状端子10中。并且,在该实施方式中,不具有筒状端子10的植入引脚20经由焊料或烧结材料层7e与半导体元件8a相连接。此外,具有筒状端子10的植入引脚20的筒状端子10经由焊料或烧结材料层7d与半导体元件8b、以及金属层5相连接。
若同时参照图2,则植入引脚20上设有檐部26,从植入引脚的前端27开始到檐部26为止的一定量L1被压入到通路孔35中。并且,檐部26与绝缘布线基板34经由接合材料36接合。
对于各筒状端子中的每一个,调整植入引脚20压入到筒状端子10中的压入深度L2,以与半导体元件8b和植入基板30之间的距离、金属层5和植入基板30之间的距离相匹配。
即,本发明中,不使用根据半导体元件8与植入基板30的距离、金属层5与植入基板30的距离而具备不同长度的植入引脚的植入基板。在本发明中,通过根据各个距离来改变植入引脚20压入到筒状端子10中的压入深度,由此使植入基板30与半导体元件8和金属层5进行接合,进而使各半导体元件电连接。因此,无需根据每个产品种类变更植入基板,从而能在多个产品之间使用共用的植入基板。
另外,在植入基板30与半导体元件8或金属层5之间的距离与从植入基板30伸出的植入引脚20的长度相匹配的情况下,可以不经由筒状端子10来使植入引脚20与半导体元件8、金属层5相接合。该实施方式中,由于植入基板30与半导体元件8a之间的距离、与从植入基板30伸出的植入引脚20的长度相匹配,因此植入引脚20与半导体元件8a经由焊料或烧结材料7e直接接合。
本发明的半导体装置优选为在图2的B-B剖面上,植入引脚20与筒状端子10内周的40%以上相接触。图2的B-B剖面是植入引脚20与筒状端子10的内周面相接触的部分中与植入引脚20正交的方向上的剖面。若植入引脚20与筒状端子10的接触面积不足40%,则接合强度、导电性可能会不够。若接触面积在40%以上,则能获得足够的接合强度和导电性。
在本发明的半导体装置中,植入引脚20的形状未作特别限定。可以采用圆柱形、棱柱形等任意的形状。此外,植入引脚20压入到筒状端子10的压入部的形状例如可以优选使用图3~图6所示的形状等。
图3所示的植入引脚20a包括由未进行挤压拉伸加工的笔直的柱状部21构成的压入部、以及直径从该压入部向前端25收缩而呈锥形形状的直径收缩部23。将该植入引脚20a压入筒状端子10后,柱状部21与筒状端子10的内周面相接触,从而将柱状部21与筒状端子10接合。此外,由于前端25的直径收缩而呈锥形形状,因此在将植入引脚20a压入筒状端子10时容易调整中心位置,便于压入。
对于植入引脚20的压入部的最大外径Rmax,优选为在压入前的状态下,该最大外径Rmax与筒状端子10的内径R的差分(Rmax-R)为0~0.15mm。此外,该最大外径Rmax与筒状端子10的内径R的差分(Rmax-R)更优选为0.05~0.15mm,尤其优选为0.05~0.10mm。通过设定最大外径Rmax,使得上述差分在上述范围内,能在不会产生植入引脚20a的破损、筒状端子10的破损等的情况下,将植入引脚20a压入到筒状端子10中,使两者牢固接合。
图4~图6所示的植入引脚20b~20d包括具有通过挤压拉伸加工而向外周突出的突起部22的压入部、以及直径从该压入部向前端25收缩而呈锥形形状的直径收缩部23。图4所示的植入引脚20b中,突起部22的截面呈十字形。图5所示的植入引脚20c中,突起部22的截面呈Y字形(三个突出部以相同角度呈辐射状突出的形状)。图6所示的植入引脚20d中,突起部22呈平板状。将该植入引脚压入筒状端子10后,突起部22与筒状端子10的内周面接触,从而将突起部22与筒状端子10接合。此外,由于前端25的直径收缩而呈锥形形状,因此在将植入引脚20压入筒状端子10时容易调整中心位置,便于压入。另外,通过挤压拉伸加工而形成的突起部的形状不限于图4~图6所示的形状。
植入引脚20b~20d中,对于压入部的最大外径Rmax,优选为在压入前的状态下,该最大外径Rmax与筒状端子10的内径R的差分(Rmax-R)为0~0.25mm。此外,该最大外径Rmax与筒状端子10的内径R的差分(Rmax-R)更优选为0.05~0.25mm,尤其优选为0.10~0.20mm。通过设定最大外径Rmax,使得上述差分在上述范围内,能在不会产生植入引脚的破损、筒状端子10的破损等的情况下,将植入引脚压入到筒状端子10中,使两者牢固接合。
筒状端子10的内周优选形成为与植入引脚20的压入部相匹配的孔形状。通过使筒状端子10的内周形成为与植入引脚20的压入部相匹配的形状,能增大植入引脚20与筒状端子10内周的接触面积。此外,突起部22的各前端与筒状端子10的内周卡合以防止发生旋转。
另外,本发明的半导体装置中,树脂壳体2的内部填充有凝胶、环氧树脂等密封树脂15来进行密封。
接着,对作为上述半导体装置的制造方法的、本发明的半导体装置的制造方法的一个实施方式进行说明。
首先,对植入基板30的制造方法进行说明。植入基板30通过以下方式来进行制造,即:在绝缘布线基板34的规定位置上形成贯穿金属层32、绝缘基板31、以及金属层33的用于电连接的通路孔35。将植入引脚20的前端27压入到该通路孔35中后,利用接合材料36将该植入引脚20的檐部26与绝缘布线基板34接合。
接着,对半导体装置的制造方法进行说明。
经由焊料或烧结材料层7a在冷却板1上配置绝缘布线基板3,使得冷却板1与绝缘布线基板3的金属层6一侧接触。此外,经由焊料或烧结材料层7c在绝缘布线基板3的金属层5的规定的电路图案上配置半导体元件8a、8b。
接着,将从植入基板30延伸出的植入引脚20压入到筒状端子10中,并调整其压入深度,使得植入引脚20的长度与半导体元件8b和植入基板30之间的距离、金属层5和植入基板30之间的距离相匹配。
然后,将植入基板30配置在绝缘布线基板3上,并经由焊料或烧结材料层7d将筒状端子10配置在半导体元件8b、金属层5的规定位置。与此同时,经由焊料或烧结材料层7e将从植入基板30延伸出的植入引脚20配置在半导体元件8a上。
然后,在该状态下将半导体装置投入到回流炉中,使焊料或烧结材料层7a、7c、7d、7e分别熔融或烧结,从而使冷却板1与绝缘布线基板3的金属层6接合。同时进行半导体元件8a、8b与绝缘布线基板3的金属层5的接合、筒状端子10与绝缘布线基板3的金属层5的接合、筒状端子10与半导体元件8b的接合、以及植入引脚20与半导体元件8a的接合。
回流焊时的加热温度优选为350℃以下,更优选为250~330℃。若加热温度超过350℃,则半导体元件等可能会受到热损伤。
接着,经由焊料或烧结材料层7b在金属层5的规定位置配置外部端子9,并通过使焊料或烧结材料层7b熔融或烧结来使金属层5与外部端子9接合。然后,用树脂壳体2包围冷却板1的周围,在由树脂壳体2包围的内部填充密封树脂15,并使密封树脂固化,由此来制造本发明的半导体装置。
图7示出本发明的半导体装置的其它实施方式。该半导体装置中,在植入引脚20的压入筒状端子10的压入部的表面设有镀层28,通过使该镀层28熔解来使植入引脚20的压入部与筒状端子10的内周面接合。另外,在该实施方式中,镀层形成在植入引脚20的压入部的表面,但也可以形成在筒状端子10的内周面,还可以同时形成在植入引脚20的压入部的表面与筒状端子10的内周面这两者上。
镀层28的厚度在压入前的状态下优选为5μm以下。
镀层28可以是单层,也可以由多个镀层层叠而成,但优选使用至少最表面层的熔融温度在350℃以下的镀层。作为熔融温度在350℃以下的镀层材料,可以举出镀Sn、镀SnAg类焊料、镀SnBi类焊料、镀SnSb类焊料、镀SnCu类焊料、镀SnIn类焊料等。若熔融温度在350℃以下,则能在焊接半导体元件等时的回流焊工序中使镀层材料熔融。
接着,对作为上述半导体装置的制造方法的、本发明的半导体装置的制造方法的其它实施方式进行说明。
在该实施方式中也与上述实施方式同样,将从植入基板30延伸出的植入引脚20压入到筒状端子10中,并调整其压入深度。由此,能使植入引脚20的长度与半导体元件8b和植入基板30之间的距离、金属层5和植入基板30之间的距离相匹配。并且,经由焊料或烧结材料层7d将筒状端子10配置在半导体元件8b、金属层5的规定位置。此外,经由焊料或烧结材料层7e将从植入基板30延伸出的植入引脚20配置在半导体元件8a上。
然后,在该状态下将半导体装置投入到回流炉中,使焊料或烧结材料层7a、7c、7d、7e、镀层28分别熔融或烧结,从而经由焊料或烧结材料层7a、7c、7d、7e使冷却板1与绝缘布线基板3的金属层6接合。同时进行半导体元件8a、8b与绝缘布线基板3的金属层5的接合、筒状端子10与绝缘布线基板3的金属层5的接合、筒状端子10与半导体元件8b的接合、以及植入引脚20与半导体元件8a的接合。与此同时,经由镀层28进行植入引脚20与筒状端子10的接合。
回流焊时的加热温度优选为350℃以下,更优选为250~330℃。若加热温度超过350℃,则半导体元件等可能会受到热损伤。
接着,经由焊料或烧结材料层7b在金属层5的规定位置配置外部端子9,并使焊料或烧结材料层7b熔融或烧结,来使金属层5与外部端子9接合。并且,用树脂壳体2包围冷却板1的周围,在由树脂壳体2包围的内部填充密封树脂15,并使密封树脂固化,由此来制造半导体装置。
图8示出本发明的半导体装置的另一其它实施方式。在该半导体装置中,植入引脚20被压入到筒状端子10中。并且,在植入引脚20的压入筒状端子10的压入部的表面及/或筒状端子10的内周面上涂布有烧结材料29,通过使该烧结材料烧结来使植入引脚20的压入部与筒状端子10的内周面接合。
优选使用烧结温度在350℃以下的材料作为烧结材料29。例如可以举出Ag类、Cu类的烧结材料等。若烧结温度在350℃以下,则能在焊接半导体元件等时的回流焊工序中进行烧结。
接着,对作为上述半导体装置的制造方法的、本发明的半导体装置的制造方法的其它实施方式进行说明。
该实施方式中,在筒状端子10的内周面及/或植入引脚20的压入筒状端子10的压入部上涂布烧结材料29后,将从植入基板30延伸出的植入引脚20压入筒状端子10,并调整其压入深度。由此,能使植入引脚20的长度与半导体元件8b和植入基板30之间的距离、金属层5和植入基板30之间的距离相匹配。并且,经由焊料或烧结材料层7d将筒状端子10配置在半导体元件8b、金属层5的规定位置。此外,经由焊料或烧结材料层7e将从植入基板30延伸出的植入引脚20配置在半导体元件8a上。
然后,在该状态下将半导体装置投入到回流炉中,使焊料或烧结材料层7a、7c、7d、7e、烧结材料29分别熔融或烧结,从而经由焊料或烧结材料层7a、7c、7d、7e使冷却板1与绝缘布线基板3的金属层6接合。同时进行半导体元件8a、8b与绝缘布线基板3的金属层5的接合、筒状端子10与绝缘布线基板3的金属层5的接合、筒状端子10与半导体元件8b的接合、以及植入引脚20与半导体元件8a的接合。与此同时,通过烧结材料29的烧结进行植入引脚20与筒状端子10的接合。
回流焊时的加热温度优选为350℃以下,更优选为250~330℃。若加热温度超过350℃,则半导体元件等可能会受到热损伤。
接着,经由焊料或烧结材料层7b在金属层5的规定位置配置外部端子9,并使焊料或烧结材料层7b熔融或烧结,来使金属层5与外部端子9接合。并且,用树脂壳体2包围冷却板1的周围,在由树脂壳体2包围的内部填充密封树脂15,并使密封树脂固化,由此来制造半导体装置。
标号说明
1:冷却板
2:树脂壳体
3:绝缘布线基板
4:绝缘基板
5、6:金属层
7a,7b,7c,7d,7e:焊料或烧结材料层
8、8a,8b:半导体元件
9:外部端子
10:筒状端子
15:密封树脂
20:植入引脚
28:镀层
29:烧结材料
30:植入基板
31:绝缘基板
32、33:金属层
34:绝缘布线基板
35:通路孔
36:接合材料
51:冷却板
52:树脂壳体
53:绝缘基板
54,55:金属层
56:绝缘布线基板
58:半导体元件
59:外部端子
60:接合线
61:密封树脂
71:绝缘基板
72、73:金属层
74:通路孔
75:绝缘布线基板
76:植入引脚
79:植入基板
Claims (13)
1.一种半导体装置,包括:在绝缘布线基板上搭载有半导体元件的半导体搭载基板;以及
植入基板,该植入基板通过在具有印刷布线的绝缘基板上设置用于电连接的通路孔,并将植入引脚的一端压入到该通路孔中而形成,
通过使所述植入基板的植入引脚的另一端与所述半导体搭载基板的半导体元件及/或电路图案相接合,从而对所述半导体搭载基板的半导体元件进行电连接,该半导体装置的特征在于,
经由压入所述植入引脚的另一端的筒状端子,所述植入引脚与所述半导体搭载基板的半导体元件及/或电路图案相接合,
所述植入引脚的压入所述筒状端子的压入深度可以调整,以使得处于被压入所述筒状端子的状态的所述植入引脚与所述筒状端子的总长度与所述半导体搭载基板上的半导体元件及/或电路图案和所述植入基板之间的距离相匹配。
2.如权利要求1所述的半导体装置,其特征在于,
在所述植入引脚的压入所述筒状端子的压入部表面及/或所述筒状端子的内周面上设有镀层,在将所述植入引脚压入所述筒状端子的状态下进行加热,使所述镀层熔融,从而利用该镀层使所述植入引脚与所述筒状端子的接触部相接合。
3.如权利要求1所述的半导体装置,其特征在于,
在所述植入引脚的压入所述筒状端子的压入部表面及/或所述筒状端子的内周面上涂布有烧结材料,在将所述植入引脚压入所述筒状端子的状态下进行加热,使所述烧结材料烧结,从而使所述植入引脚与所述筒状端子的接触部相接合。
4.如权利要求1至3的任一项所述的半导体装置,其特征在于,
在所述植入引脚与所述筒状端子的内周面相接触的接触部中的与所述植入引脚正交的方向的剖面上,所述植入引脚与所述筒状端子内周的40%以上相接触。
5.如权利要求1至3的任一项所述的半导体装置,其特征在于,
在所述植入引脚的压入所述筒状端子的压入部设有通过挤压拉伸加工而向外周突出的突起部,该突起部与所述筒状端子的内周面相接触。
6.如权利要求5所述的半导体装置,其特征在于,
在所述压入前的状态下,从所述植入引脚的压入部的最大直径减去所述筒状端子的内径所得的差值为0~0.25mm。
7.如权利要求1至3的任一项所述的半导体装置,其特征在于,
在所述植入引脚的压入部设有未经过挤压拉伸加工的笔直的柱状部,该柱状部的至少一部分与所述筒状端子的内周面相接触。
8.如权利要求7所述的半导体装置,其特征在于,
在所述压入前的状态下,从所述植入引脚的压入部的最大直径减去所述筒状端子的内径所得的差值为0~0.15mm。
9.如权利要求1至3的任一项所述的半导体装置,其特征在于,
所述植入引脚的靠所述筒状端子侧的前端的直径向前端收缩而呈锥形形状。
10.如权利要求1至3的任一项所述的半导体装置,其特征在于,
所述筒状端子的内周形成为与所述植入引脚的压入部相匹配的形状。
11.一种半导体装置的制造方法,在该半导体装置的制造方法中使用:在绝缘布线基板上搭载有半导体元件的半导体搭载基板;以及
植入基板,该植入基板通过在具有印刷布线的绝缘基板上设置用于电连接的通路孔,并将植入引脚的一端压入到该通路孔中而形成,
通过使所述植入基板的植入引脚的另一端与所述半导体搭载基板的半导体元件及/或电路图案相接合,从而对所述半导体搭载基板的半导体元件进行电连接,该半导体装置的制造方法的特征在于,
通过将所述植入引脚的另一端压入筒状端子,并调整其压入深度,来使得所述植入引脚的长度与所述半导体搭载基板上的半导体元件及/或电路图案和所述植入基板之间的距离相匹配,并隔着所述筒状端子使所述植入引脚与所述半导体搭载基板的半导体元件及/或电路图案相接合。
12.如权利要求11所述的半导体装置的制造方法,其特征在于,
在所述植入引脚的压入所述筒状端子的压入部表面及/或所述筒状端子的内周面上预先形成镀层,通过隔着所述筒状端子使所述植入基板的植入引脚的另一端与所述半导体搭载基板的半导体元件及/或电路图案相抵接,并在该状态下将如上述那样组合而成的半导体装置放入回流炉进行加热,来进行所述半导体元件与所述绝缘布线基板的连接、以及所述植入引脚的筒状端子与半导体搭载基板的半导体元件及/或电路图案的连接,并通过使所述镀层熔融来使所述植入引脚与所述筒状端子相连接。
13.如权利要求11所述的半导体装置的制造方法,其特征在于,
在所述植入引脚的压入所述筒状端子的压入部表面及/或所述筒状端子的内周面上预先涂布烧结材料,通过隔着所述筒状端子使所述植入基板的植入引脚的另一端与所述半导体搭载基板的半导体元件及/或电路图案相抵接,并在该状态下将如上述那样组合而成的半导体装置放入回流炉进行加热,来进行所述半导体元件与所述绝缘布线基板的连接、以及所述植入引脚的筒状端子与半导体搭载基板的半导体元件及/或电路图案的连接,并通过使所述烧结材料烧结来使所述植入引脚与所述筒状端子相连接。
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JP7484156B2 (ja) * | 2019-12-18 | 2024-05-16 | 富士電機株式会社 | 半導体装置 |
JP7468149B2 (ja) | 2020-05-27 | 2024-04-16 | 富士電機株式会社 | 半導体装置 |
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US20140246783A1 (en) | 2014-09-04 |
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