CN103929896A - Method for manufacturing printed circuit board with internally-buried chip - Google Patents
Method for manufacturing printed circuit board with internally-buried chip Download PDFInfo
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- CN103929896A CN103929896A CN201410190575.4A CN201410190575A CN103929896A CN 103929896 A CN103929896 A CN 103929896A CN 201410190575 A CN201410190575 A CN 201410190575A CN 103929896 A CN103929896 A CN 103929896A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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Abstract
A method for manufacturing a printed circuit board with an internally-buried chip comprises the following steps that (a) incongruous conductive materials adhere to the surface of the chip; (b) copper foil adheres to the surface of a supporting plate, holes are drilled, and tool holes with the alignment function are manufactured; (c) an automatic chip adhering machine is used for adhering the chip with the incongruous conductive materials to the target position of the surface of the copper foil with the supporting plate, and the incongruous conductive materials between a bonding pad at the end of the chip and the copper foil through heating and pressurization; (d) a dielectric layer and copper foil are laminated on the upper face of the chip and the chip is buried in a double-faced copper-clad plate; (e) interlayer connection of the double-layer copper-clad plate is achieved through laser drilling, drill dirt removal, electroless plating and copper electroplating; (f) the supporting plate is removed, so that the double-layer copper-clad plate with the buried chip is obtained. On the basis, according to the requirements of line accuracy, the printed circuit board is manufactured through a subtractive process or a semi-additive process. The thinner and denser printed circuit board or an integrated circuit package substrate with the buried chip can be manufactured through the method.
Description
Technical field
The present invention relates to the manufacture method of printed circuit board or integrated circuit (IC) substrate package, bury the method for manufacturing printed circuit board of chip in particularly a kind of.
Background technology
Along with electronic product functionalization, intelligentized development, high integration, slimming, microminiaturization have become main flow trend, printed circuit board is meeting under the prerequisite of electricity that electronic product is good, hot property, also inevitable towards slimming, high density, the future development of three-dimensional structure etc., thus meet the design requirement of modern electronic product microminiaturization, high integration.This just means that circuit board package design must meet following requirement: reduce packaging height, improve packaging density.
Bury chip technology and become an important developing direction.What is called is buried chip technology, is exactly in the manufacturing process of printed circuit board, chip is embedded in dielectric layer, then by metallization micropore, or conducting metal projection, or alternate manner is realized the conducting interconnection of external graphics and internal layer chip.
Bury chip technology built-in chip type is inner in circuit board, effectively reduce packaging height; Meanwhile, bury chip technology and make have larger space and the degree of freedom in design, it is available the position of the original chip placement of circuit board surface, can be used for assembling more element, thereby has greatly improved packaging density.
At present, bury chip technology technology numerous, but still exist many technology or making technology problem, table 1 has been done detailed contrast for the pluses and minuses of burying circuit board interconnect technology in current chip.
Table 1
Summary of the invention
The object of the invention is to provide the method for manufacturing printed circuit board that buries chip in a kind of, can make printed circuit board or the integrated circuit (IC) substrate package of burying chip in high-precision, and the thickness of printed circuit board or integrated circuit (IC) substrate package can be thinner, circuit is meticulousr.
For achieving the above object, technical scheme of the present invention is:
At chip surface, paste Anisotropically conductive material, be attached to the copper foil surface with supporting bracket, by heating and pressurizeing, make the pad of die terminals and the Anisotropically conductive material conducting between Copper Foil, then at chip upper layer piezodielectric layer and Copper Foil, by chip buried-in in double face copper, according to the requirement of circuit precision, with subtractive process or half addition method, make printed circuit board or integrated circuit (IC) substrate package again.
Concrete, the method for manufacturing printed circuit board that buries chip in the present invention comprises the steps:
A) at chip surface, paste Anisotropically conductive material;
B) Copper Foil is attached to supporting bracket surface; Then hole, make and there is the tooling hole to bit function;
C) use chip automatic placement machine the chip that posts Anisotropically conductive material to be attached to the copper foil surface target location with supporting bracket, by heating, pressurization, make the pad of die terminals and the Anisotropically conductive material conducting between Copper Foil;
D) at chip upper layer piezodielectric layer and Copper Foil, make chip buried-in in double face copper;
E), with laser drill, desmearing, chemical copper and electro-coppering, realize the interlayer conduction of double face copper;
F) supporting bracket is removed to the double face copper of burying chip in obtaining;
G) according to completing the live width of circuit, the requirement of spacing, select subtractive process or semi-additive process to complete copper wire in interior double face copper of burying chip and make, in obtaining, bury the printed circuit board of chip.
Further, if need to make two sided pcb, and the live width of circuit connection, spacing when above,, after completing steps (f), adopt subtractive process to make at 30 μ m respectively; First, on interior copper surface of burying the double face copper of chip, adopt figure transfer techniques to make copper wire figure; The pad of chip is connected with the copper wire figure in double face copper by Anisotropically conductive material, forms the conducting of electrical property; Then, carry out, after welding resistance, solderability coat and machinery or laser cutting, in obtaining, burying the two sided pcb of chip after completing line pattern.
Further, if need to make multilayer printed circuit board, and the live width of circuit connection, spacing,, after completing steps (f), are carried out subtractive process making, and are carried out repeatedly lamination and the interconnected making of interlayer when above at 30 μ m respectively; Concrete steps are: the first step, and on interior copper surface of burying the double face copper of chip, adopt figure transfer techniques to make copper wire figure, the pad of chip is connected with the copper wire figure in double face copper by Anisotropically conductive material, forms the conducting of electrical property; Second step, lamination dielectric layer and Copper Foil, forms interlayer hole with laser drill or machine drilling, through desmearing, chemical copper, electro-coppering and figure transfering process, forms copper wire figure and realizes the interlayer conduction of printed circuit board; The 3rd step, carries out, after welding resistance, solderability coat and machinery or laser cutting, burying the multilayer printed wiring board of chip in obtaining.
Again, if need to make two sided pcb, and the live width of circuit connection, spacing when following,, after completing steps (f), adopt semi-additive process to make at 30 μ m respectively; Concrete steps are: the first step, will carry out figure transfer burying in the double face copper of chip, graphic plating, striping and dodge erosion; Second step, carries out, after welding resistance, solderability coat and machinery or laser cutting, burying the two sided pcb of chip in obtaining after completing line pattern.
Have again, if need to make multilayer printed circuit board, and the live width of circuit connection, spacing are respectively at 30 μ m when following,, after completing steps (f), adopt semi-additive process to make, and carry out repeatedly lamination and the interconnected making of interlayer, concrete steps are: the first step, to carry out figure transfer burying in the double face copper of chip, graphic plating, striping and dodge erosion; Second step, lamination dielectric layer, forms interlayer hole with laser drill or machine drilling, through desmearing, chemical copper, figure transfer, graphic plating, striping and sudden strain of a muscle erosion, forms copper wire figure and realizes the interlayer conduction of printed circuit board; The 3rd step, carries out, after welding resistance, solderability coat and machinery or laser cutting, burying the multilayer printed wiring board of chip in obtaining.
In addition, step a) in, described Anisotropically conductive material can be the liquid material of Anisotropically conductive cream, Anisotropically conductive film or Anisotropically conductive; The main component of Anisotropically conductive material is the mixture of the metallic particles of high molecular polymer and conduction.High molecular polymer refers to thermoplastic resin or thermosetting resin, and thermoplastic resin refers to polyethylene, polypropylene, polystyrene, Merlon or rubber; Thermosetting resin refers to epoxy resin or polyimides.The metallic particles of conduction refers to metallic nickel, gold, silver, tin and ashbury metal.
Preferably, at step c) by heating and pressurizeing, make the pad of die terminals and the Anisotropically conductive material conducting between Copper Foil, wherein, heating-up temperature is 50～300 ℃, pressure is 0.01MPa～100MPa.
Preferably, in steps d) at chip upper layer piezodielectric layer and Copper Foil, wherein the dielectric layer material of lamination refers to prepreg or ABF, wherein the resin of prepreg is epoxy resin, poly maleimide cyanate resin, polyimides, polyphenylene oxide or polytetrafluoroethylene.
Preferably, described laser drill adopts carbon dioxide laser or UV laser to hole to printed circuit board or integrated circuit (IC) substrate package; Described desmearing is by alkaline permanganate solution or alkaline sodium permanganate solution, the brill dirt of the hole wall after holing to be removed, or using plasma is removed brill dirt in hole.
Preferably, described electro-coppering is to electroplate with electroplating filling perforation liquid medicine or traditional panel plating liquid medicine, makes printed circuit board interlayer realize the conducting of electrical property.
Preferably, described pattern plating copper is to adopt plating filling perforation liquid medicine or traditional panel plating liquid medicine to carry out graphic plating, and dry film is not had to the electro-coppering of chlamydate region, makes printed circuit board interlayer realize the conducting of electrical property.
The invention has the advantages that:
The present invention pastes Anisotropically conductive material at chip surface, and be attached to the copper foil surface of supporting bracket, then heat, pressurizeing makes the pad of die terminals and the Anisotropically conductive material conducting between Copper Foil, carry out again lamination, obtain burying the double face copper of chip, on this basis, according to circuit required precision, adopt subtractive process or semi-additive process to carry out printed circuit board making.The present invention has following four benefits:
The first, product is thinner.
The present invention is directly attached to copper foil surface by chip, realizes the making without central layer technique, and the gross thickness of printed circuit board obviously reduces, and this meets the thinner requirement that present consumer electronics product is pursued; Use method provided by the invention, can make gross thickness is 0.1mm-0.15mm product.
The second, circuit is meticulousr.
The present invention can adopt half addition method to make circuit when burying chip, obtains the fine-line below 30/30 μ m.
The 3rd, aligning accuracy is high.
Compared with the prior art, in the present invention, in realizing by Anisotropically conductive material, bury the interconnection mode of chip and outer circuit conducting, there is no the aligning accuracy problem in the via course of processing in traditional handicraft, only require outer-layer circuit and in bury the contraposition between chip I/O dish, thereby reduced the importing processing procedure of interconnection dislocation risk, effectively evaded terminal pad size that chip I/O pad and outer graphics produce because of contraposition problem and the restriction of spacing, the conducting contraposition problem of whole chip buried-in circuit board is had greatly improved and improved.The minimum interconnect pitch of this structure chip buried-in circuit board is mainly determined by the insulation spacing of Anisotropically conductive material minimum.
The 4th, cost is low.
The making of using the method for laser or mechanical slotting to bury chip in prior art, not only cost is high, and because the circuit of internal layer completes, therefore chip need to adopt high accuracy contraposition and the system that mounts could be exactly and existing connection and conducting, make like this that not only cost is high, and yield is low.
In the present invention, I/O pad on chip and external graphics are to carry out interconnection by Anisotropically conductive material, this structure is utilized the Anisotropically conductive of the conducting particles in Anisotropically conductive material, effective conducting of burying chip and outer graphics in realizing, also guaranteed between the I/O pad on chip simultaneously, and the insulation between outer graphics conducting pad.This process can well realize the interconnection between inside chip and outer graphics, also save greatly conventional laser micropore processing and electroplated the loaded down with trivial details flow processs such as conducting with micropore, reduce the too much importing of quality risk in process, thereby reduced process difficulty and cost consumption.
Accompanying drawing explanation
Fig. 1～Figure 12 is the flow chart using in the embodiment of the present invention 1 and embodiment 2.Wherein:
Fig. 1 is attached to Copper Foil in the schematic diagram on supporting bracket surface;
Fig. 2 is used chip automatic placement machine the chip that posts Anisotropically conductive material to be attached to the copper foil surface target location with supporting bracket, by heating and pressurizeing, makes the schematic diagram of the pad of die terminals and the Anisotropically conductive material conducting between Copper Foil;
Fig. 3 is at chip upper layer piezodielectric layer and Copper Foil, the schematic diagram by chip buried-in in double face copper;
Fig. 4 is with laser drill, desmearing, chemical copper and electro-coppering, realizes the schematic diagram of the interlayer conduction of double face copper;
Fig. 5 removes supporting bracket, buries the schematic diagram of the double face copper of chip in obtaining;
Fig. 6 is by figure transfer techniques, buries the schematic diagram of the outer graphics of chip circuit plate in preparation;
Fig. 7 carries out welding resistance ink coats, solderability coat to completing the circuit board of outer-layer circuit, and the schematic diagram of chip circuit plate is buried in follow-up external form processing etc. in finally obtaining;
Fig. 8 is the schematic diagram of Copper Foil that buries the double face copper of chip in removing;
Fig. 9 adopts half additive process, the schematic diagram that carries out chemical copper making;
Figure 10 adopts dry film to do anti-plate layer, carries out figure and shifts the schematic diagram of making;
Figure 11 is the schematic diagram of pattern plating copper;
Figure 12 is striping, dodges etching off except chemical copper, forms the schematic diagram of fine-line.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the present invention will be further described.
Embodiment 1
Referring to Fig. 1～Fig. 7, printed circuit board manufacturing process of burying chip of the present invention is as follows:
A) at chip 103 surface label Anisotropically conductive materials 104;
B) ground floor Copper Foil 101 is attached to supporting bracket 102 surfaces, then holes, make and there is the tooling hole to bit function, as shown in Figure 1;
C) use chip automatic placement machine the chip 103 that posts Anisotropically conductive material 104 to be attached to the surperficial target location of ground floor Copper Foil 101 with supporting bracket 102, by heating (temperature is 160 degree), pressurization (pressure is 10MPa), make the pad 1031 of die terminals and Anisotropically conductive material 104 conductings between Copper Foil 101, as shown in Figure 2;
D) lamination second layer Copper Foil 105 and dielectric layer 106 on post the chip 103 of Anisotropically conductive material 104, make to be embedded in double face copper, as shown in Figure 3 in chip 103;
E) adopt laser drill to obtain blind hole 107, desmearing, chemical copper and electro-coppering, realize the interlayer conduction of double face copper, as shown in Figure 4;
F) supporting bracket 102 is removed, the double face copper that obtains burying chip 103, as shown in Figure 5;
G) on the copper surface of burying the double face copper of chip 103, adopt figure transfer techniques to make copper wire figure, obtain ground floor copper wire figure 108 and second layer copper wire figure 109.The pad 1031 of chip 103 is connected with the butt plate 1091 in second layer copper wire figure 109 by Anisotropically conductive material 104, forms the conducting of electrical property, as shown in Figure 6;
H) at ground floor copper wire figure 108 with above second layer copper wire figure 109, carry out the making of welding resistance ink layer 110, the making of solderability coat 111, carry out again skin processing as after machinery or laser cutting, in obtaining, bury the two sided pcb of chip 103, as shown in Figure 7.
The live width, spacing that i) can obtain circuit in order to upper method respectively more than 30 μ m in bury the printed circuit board of chip.
Embodiment 2
Referring to Fig. 1～Fig. 5, Fig. 8～Figure 12, printed circuit board manufacturing process of burying chip of the present invention is as follows:
A) at chip 103 surface label Anisotropically conductive materials 104;
B) ground floor Copper Foil 101 is attached to supporting bracket 102 surfaces, then holes, make and there is the tooling hole to bit function, as shown in Figure 1;
C) use chip automatic placement machine the chip 103 that posts Anisotropically conductive material 104 to be attached to the surperficial target location of ground floor Copper Foil 101 with supporting bracket 102, by heating (temperature is 160 degree), pressurization (pressure is 10MPa), make the pad 1031 of die terminals and Anisotropically conductive material 104 conductings between Copper Foil 101, as shown in Figure 2;
D) lamination second layer Copper Foil 105 and dielectric layer 106 on post the chip 103 of Anisotropically conductive material 104, make to be embedded in double face copper, as shown in Figure 3 in chip 103;
E) adopt laser drill to obtain blind hole 107, desmearing, chemical copper and electro-coppering, realize the interlayer conduction of double face copper, as shown in Figure 4;
F) supporting bracket 102 is removed, the double face copper that obtains burying chip 103, as shown in Figure 5;
G) adopt etching method, by burying the Copper Foil erosion light on the double face copper two sides of chip 103, expose dielectric layer 106, as shown in Figure 8;
H) on dielectric layer 106, carry out chemical copper 112, carry out the making of half additive process, as shown in Figure 9;
I) at the surface label dry film of chemical copper 112, carry out figure transfer, obtain anti-plate layer 113, as shown in figure 10;
J) use DOW Chemical electroplating liquid medicine to carry out graphic plating, form pattern plating copper 114, as shown in figure 11;
K) use Mitsubishi's gas chemistry striping liquid medicine to carry out striping technique, remove anti-plate layer 113; Adopt Mitsubishi's gas chemistry to dodge erosion liquid medicine and remove chemical copper, form live width, the spacing fine-line 115 below 30 μ m respectively, the pad 1031 of chip 103 is connected with the butt plate 1151 in copper wire figure 115 by Anisotropically conductive material 104, forms the conducting of electrical property as shown in figure 12;
L) carry out the making of welding resistance ink layer, solderability coat, and carry out skin processing as after machinery or laser cutting, the live width, spacing that can obtain circuit respectively below 30 μ m in bury the printed circuit board of chip.
In sum, the present invention is by pasting Anisotropically conductive material at chip surface, be attached to the copper foil surface with supporting bracket, through heating and pressurization, make the pad of die terminals and the Anisotropically conductive material conducting between Copper Foil, then at chip upper layer piezodielectric layer and Copper Foil, by chip buried-in in double face copper, again according to the requirement of circuit precision, with subtractive process or half addition method, make printed circuit board or integrated circuit (IC) substrate package, and, the thickness of printed circuit board or integrated circuit (IC) substrate package can be thinner, and circuit is meticulousr.
Claims (12)
1. a method of manufacturing printed circuit board that buries chip in, comprises the steps:
A) at chip surface, paste Anisotropically conductive material;
B) Copper Foil is attached to supporting bracket surface, then holes, make and there is the tooling hole to bit function;
C) use chip automatic placement machine the chip that posts Anisotropically conductive material to be attached to the copper foil surface target location with supporting bracket, by heating, pressurization, make the pad of die terminals and the Anisotropically conductive material conducting between Copper Foil;
D) at chip upper layer piezodielectric layer and Copper Foil, make chip buried-in in double face copper;
E), with laser drill, desmearing, chemical copper and electro-coppering, realize the interlayer conduction of double face copper;
F) supporting bracket is removed to the double face copper of burying chip in obtaining;
G) according to completing the live width of circuit, the requirement of spacing, select subtractive process or semi-additive process to complete copper wire in interior double face copper of burying chip and make, in obtaining, bury the printed circuit board of chip.
2. in as claimed in claim 1, bury the method for manufacturing printed circuit board of chip, it is characterized in that, if need to make two sided pcb, and the live width of circuit connection, spacing are respectively at 30 μ m when above,, after completing steps (f), adopt subtractive process, first, copper surface burying the double face copper of chip, adopts figure transfer techniques to make copper wire figure; The pad of chip is connected with the copper wire figure in double face copper by Anisotropically conductive material, forms the conducting of electrical property; Then, carry out, after welding resistance, solderability coat and machinery or laser cutting, in obtaining, burying the two sided pcb of chip after completing line pattern.
3. in as claimed in claim 1, bury the method for manufacturing printed circuit board of chip, it is characterized in that, if need to make multilayer printed circuit board, and the live width of circuit connection, spacing are respectively at 30 μ m when above, after completing steps (f), carry out subtractive process making, and carry out repeatedly lamination and the interconnected making of interlayer; Concrete steps are: the first step, and the copper surface burying the double face copper of chip, adopts figure transfer techniques to make copper wire figure; The pad of chip is connected with the copper wire figure in double face copper by Anisotropically conductive material, forms the conducting of electrical property; Second step, lamination dielectric layer and Copper Foil, form interlayer hole with laser drill or machine drilling, through desmearing, chemical copper, electro-coppering and figure transfering process, forms copper wire figure, and realize the interlayer conduction of printed circuit board; The 3rd step, carries out, after welding resistance, solderability coat and machinery or laser cutting, burying the multilayer printed wiring board of chip in obtaining.
4. in as claimed in claim 1, bury the method for manufacturing printed circuit board of chip, it is characterized in that, if need to make two sided pcb, and the live width of circuit connection, spacing are respectively at 30 μ m when following,, after completing steps (f), adopt semi-additive process to make; Concrete steps are: the first step, will carry out figure transfer burying in the double face copper of chip, graphic plating, striping and dodge erosion; Second step, carries out, after welding resistance, solderability coat and machinery or laser cutting, burying the two sided pcb of chip in obtaining after completing line pattern.
5. in as claimed in claim 1, bury the method for manufacturing printed circuit board of chip, it is characterized in that, if need to make multilayer printed circuit board, and the live width of circuit connection, spacing are respectively at 30 μ m when following, after completing steps (f), employing semi-additive process is made, and carries out repeatedly lamination and the interconnected making of interlayer; Concrete steps are: the first step, will carry out figure transfer burying in the double face copper of chip, graphic plating, striping and dodge erosion; Second step, lamination dielectric layer, forms interlayer hole with laser drill or machine drilling, through desmearing, chemical copper, figure transfer, graphic plating, striping and sudden strain of a muscle erosion, forms copper wire figure, and realizes the interlayer conduction of printed circuit board; The 3rd step, carries out, after welding resistance, solderability coat and machinery or laser cutting, burying the multilayer printed wiring board of chip in obtaining.
6. the method for manufacturing printed circuit board that buries chip in as claimed in claim 1, is characterized in that, described Anisotropically conductive material is the liquid material of Anisotropically conductive cream, Anisotropically conductive film or Anisotropically conductive.
7. the method for manufacturing printed circuit board that buries chip in as claimed in claim 6, is characterized in that, described Anisotropically conductive material is the mixture of the metallic particles of high molecular polymer and conduction; High molecular polymer is thermoplastic resin or thermosetting resin; Thermoplastic resin refers to polyethylene, polypropylene, polystyrene, Merlon or rubber; Thermosetting resin refers to epoxy resin or polyimides; The metallic particles of conduction is metallic nickel, gold, silver, tin or ashbury metal.
8. in as claimed in claim 1, bury the method for manufacturing printed circuit board of chip, it is characterized in that, at step c) by heating and pressurizeing, make the pad of die terminals and the Anisotropically conductive material conducting between Copper Foil, wherein, heating-up temperature is 50～300 ℃, and pressure is 0.01MPa～100MPa.
9. the method for manufacturing printed circuit board that buries chip in as claimed in claim 1, is characterized in that, in steps d) in, at chip upper layer piezodielectric layer and Copper Foil; Wherein, the dielectric layer material of lamination refers to prepreg and ABF, and wherein the resin of prepreg is epoxy resin, poly maleimide cyanate resin, polyimides, polyphenylene oxide or polytetrafluoroethylene.
As described in claim 1 or 3 or 5 in bury the method for manufacturing printed circuit board of chip, it is characterized in that, described laser drill is for adopting carbon dioxide laser or UV laser to hole to printed circuit board or integrated circuit (IC) substrate package; Described desmearing is that the brill dirt of the hole wall after adopting alkaline permanganate solution or alkaline sodium permanganate solution to boring is removed, or using plasma is removed brill dirt in hole.
11. as described in claim 1 or 3 in bury the method for manufacturing printed circuit board of chip, it is characterized in that, described electro-coppering adopts electroplates filling perforation liquid medicine or traditional panel plating liquid medicine is electroplated, and makes printed circuit board interlayer realize the conducting of electrical property.
12. as described in claim 4 or 5 in bury the method for manufacturing printed circuit board of chip, it is characterized in that, described pattern plating copper is to adopt plating filling perforation liquid medicine or traditional panel plating liquid medicine to carry out graphic plating, dry film is not had to the electro-coppering of chlamydate region, make printed circuit board interlayer realize the conducting of electrical property.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410190575.4A CN103929896A (en) | 2014-05-07 | 2014-05-07 | Method for manufacturing printed circuit board with internally-buried chip |
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| CN201410190575.4A CN103929896A (en) | 2014-05-07 | 2014-05-07 | Method for manufacturing printed circuit board with internally-buried chip |
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| CN103929896A true CN103929896A (en) | 2014-07-16 |
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| CN108093572A (en) * | 2017-12-15 | 2018-05-29 | 上海美维科技有限公司 | A kind of production method of the printed circuit board with no porose disc blind hole structure |
| CN111010815A (en) * | 2019-12-27 | 2020-04-14 | 安捷利（番禺）电子实业有限公司 | Semiconductor chip embedded circuit board and processing method and processing device thereof |
| CN112967932A (en) * | 2021-02-03 | 2021-06-15 | 复旦大学 | Plate-level GaN half-bridge power device and preparation method thereof |
| CN113140538A (en) * | 2021-04-21 | 2021-07-20 | 上海闻泰信息技术有限公司 | Adapter plate, packaging structure and manufacturing method of adapter plate |
| CN113438831A (en) * | 2021-06-03 | 2021-09-24 | 中国电子科技集团公司第三十八研究所 | Microwave multifunctional assembly with interconnected embedded chips in any layer and manufacturing method thereof |
| CN114206032A (en) * | 2021-12-23 | 2022-03-18 | 四川省华兴宇电子科技有限公司 | Manufacturing method of printed circuit board with embedded passive elements |
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