CN103901672A - Array substrate, liquid crystal display panel and display device - Google Patents

Array substrate, liquid crystal display panel and display device Download PDF

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Publication number
CN103901672A
CN103901672A CN201410108905.0A CN201410108905A CN103901672A CN 103901672 A CN103901672 A CN 103901672A CN 201410108905 A CN201410108905 A CN 201410108905A CN 103901672 A CN103901672 A CN 103901672A
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Prior art keywords
chock insulator
insulator matter
setting area
array base
base palte
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CN201410108905.0A
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CN103901672B (en
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王永灿
占红明
林丽锋
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Abstract

The invention relates to the technical field of liquid crystal display, and discloses an array substrate, a liquid crystal display panel and a display device. The array substrate comprises a main post spacer and an auxiliary post spacer which are used for supporting the liquid crystal display panel in the cell thickness direction; due to the fact that the top surface of a main post spacer arrangement region on the array substrate is higher than the top surface of an auxiliary post spacer arrangement region, the difference between the main post spacer and the auxiliary post spacer is achieved through the height difference, it can be designed that the main post spacer and the auxiliary post spacer have the same length, the main post spacer and the auxiliary post spacer can be formed at the same time through the one-shot composition process, manufacturing processes are simplified, and productions cost of products is lowered.

Description

A kind of array base palte, liquid crystal panel and display device
Technical field
The present invention relates to technical field of liquid crystal display, particularly relate to a kind of array base palte, liquid crystal panel and display device.
Background technology
Thin Film Transistor-LCD (Thin Film Transistor-Liquid Crystal Display, be called for short TFT-LCD) feature such as to have volume little, low in energy consumption, radiationless, developed in recent years rapidly dominate in current flat panel display market.The agent structure of liquid crystal display is liquid crystal panel, and in the manufacture process at liquid crystal panel, the design that box is thick is one of gordian technique of liquid crystal display with controlling, and it directly affects the quality of liquid crystal display.
Liquid crystal panel comprises array base palte and color membrane substrates that box is arranged, and is filled in the liquid crystal layer between array base palte and color membrane substrates.Wherein, on array base palte, be formed with data line and grid line, and the multiple pixel cells that limited by data line and grid line, each pixel cell comprises thin film transistor (TFT) (Thin Film Transistor, be called for short TFT) and pixel electrode, on array base palte, be coated with liquid crystal aligning layer (PI).On color membrane substrates, be formed with colored filter, black matrix and chock insulator matter (PS), black matrix is corresponding with the position of data line and grid line, limits sub-pix unit.Thickness of liquid crystal layer (being that box is thick) is mainly controlled by the length of PS.The effect that PS plays according to it, is divided into main PS and auxiliary PS, and wherein, the length of main PS is greater than the length of auxiliary PS, need to form by different process.Main PS is existing compression when without external pressure, and supporting case is thick, plays main support effect.In the time that liquid crystal panel is subject to excessive external force, auxiliary PS just plays a supporting role.
Wherein, the material of PS, for having flexible polymkeric substance, is formed on the region at black matrix place, the TFT on array base palte is withstood at top, is collided or when pressure, because the PI friction on PS top and TFT produces static at liquid crystal panel, be easy to make TFT open mode, produce Bluepoint.
In order to solve the problems of the technologies described above, in prior art, PS is produced on array base palte, still, because the length of main PS is greater than the length of assisting PS, need to form by different process, can increase the manufacture craft of array base palte.
Summary of the invention
The invention provides a kind of array base palte, on array base palte, form PS in order to solve, while overcoming technical matterss such as forming Bluepoint that PS brings on color membrane substrates, the length of main PS and auxiliary PS is different, need to form by different process, increase manufacture craft, improve the problem of production cost.
The present invention also provides a kind of liquid crystal panel and display device, by adopting above-mentioned array base palte, reduces the production cost of product.
For solving the problems of the technologies described above, the invention provides a kind of array base palte, comprise data line and grid line, and the multiple pixel cells that limited by data line and grid line, each pixel cell comprises thin film transistor (TFT) and pixel electrode, described array base palte also comprises chock insulator matter and chock insulator matter setting area, and described chock insulator matter comprises main chock insulator matter and auxiliary chock insulator matter; Described chock insulator matter setting area comprises main chock insulator matter setting area and auxiliary chock insulator matter setting area, and described main chock insulator matter is arranged in described main chock insulator matter setting area; Described auxiliary chock insulator matter is arranged on described auxiliary chock insulator matter setting area, wherein,
The end face of described main chock insulator matter setting area is higher than the end face of described auxiliary chock insulator matter setting area;
The length of described main chock insulator matter and auxiliary chock insulator matter is identical.
The present invention also provides a kind of liquid crystal panel, comprise array base palte and color membrane substrates that box is arranged, described color membrane substrates comprises black matrix, wherein, described array base palte adopts array base palte as above, and the chock insulator matter setting area on described array base palte is corresponding with the black matrix position on color membrane substrates.
The present invention also provides a kind of display device, adopts liquid crystal panel as above.
The beneficial effect of technique scheme of the present invention is as follows:
In technique scheme, supporting thick main chock insulator matter and the auxiliary chock insulator matter of liquid crystal panel box is formed on array base palte, by the end face of main chock insulator matter setting area on array base palte being set higher than the end face of auxiliary chock insulator matter setting area, and by this difference in height realize between main chock insulator matter and auxiliary chock insulator matter section poor, thereby the length that can design main chock insulator matter and auxiliary chock insulator matter is identical, can form by a composition technique simultaneously, simplify manufacture craft, reduce the production cost of product.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 represents the structural representation of array base palte in the embodiment of the present invention;
Fig. 2 presentation graphs 1 is along the cut-open view of A-A direction.
Embodiment
It should be noted that, in the present invention, the length of chock insulator matter refers to that chock insulator matter supports the thick length of liquid crystal panel box.
In prior art, on color membrane substrates, form the technical matterss such as the Bluepoint that chock insulator matter causes in order to overcome, form chock insulator matter on array base palte time, because main chock insulator matter plays main support effect, its end face (withstanding the surface of the black matrix of color membrane substrates) will be higher than the end face (withstanding the surface of the black matrix of color membrane substrates) of auxiliary chock insulator matter, thereby the existing compression of guarantee liquid crystal panel main chock insulator matter when without external pressure, and supporting case is thick, play main support effect.Only have in the time that liquid crystal panel is subject to excessive external force, auxiliary chock insulator matter is just played a supporting role.
On array base palte, in order to realize the end face of main chock insulator matter higher than the end face of auxiliary chock insulator matter, conventionally the thick length of the main chock insulator matter support liquid crystal panel box of design is greater than the thick length of auxiliary chock insulator matter support liquid crystal panel box, so just need to form respectively main chock insulator matter and auxiliary chock insulator matter by different composition technique, the manufacture craft that has increased array base palte, has improved production cost.
In order to solve the problems of the technologies described above, array base palte in the present invention comprises main chock insulator matter setting area and is arranged on the main chock insulator matter in described main chock insulator matter setting area, and auxiliary chock insulator matter setting area and the auxiliary chock insulator matter that is arranged on described auxiliary chock insulator matter setting area.Wherein, the end face of described main chock insulator matter setting area is higher than the end face of described auxiliary chock insulator matter setting area, by this difference in height realize between main chock insulator matter and auxiliary chock insulator matter section poor, thereby it is identical with auxiliary chock insulator matter length to design main chock insulator matter, and make the end face of described main chock insulator matter higher than the end face of described auxiliary chock insulator matter, play the thick effect of main support liquid crystal panel box.Thereby can form main chock insulator matter and auxiliary chock insulator matter by a composition technique simultaneously, simplify manufacture craft, reduce production costs.
It should be noted that, the end face of chock insulator matter setting area refers to: in liquid crystal panel, chock insulator matter setting area is the surface of close color membrane substrates, and chock insulator matter is formed on this surface.
In technical scheme of the present invention, by the end face of main chock insulator matter setting area on array base palte being set higher than the end face of auxiliary chock insulator matter setting area, and by this difference in height realize between main chock insulator matter and auxiliary chock insulator matter section poor, thereby the length that can design main chock insulator matter and auxiliary chock insulator matter is identical, can form by a composition technique simultaneously, simplify manufacture craft, reduce the production cost of product.
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples are used for illustrating the present invention, but are not used for limiting the scope of the invention.
Embodiment mono-
Shown in Fig. 1 and Fig. 2, a kind of array base palte is provided in the embodiment of the present invention, it comprises data line 20 and grid line 10, and the multiple pixel cells that limited by data line 20 and grid line 10, each pixel cell comprises thin film transistor (TFT) 1 and pixel electrode 6.Described array base palte also comprises chock insulator matter and chock insulator matter setting area, described chock insulator matter comprises main chock insulator matter 11 and auxiliary chock insulator matter 12, described chock insulator matter setting area comprises main chock insulator matter setting area and auxiliary chock insulator matter setting area, main chock insulator matter 11 is arranged in described main chock insulator matter setting area, and auxiliary chock insulator matter 12 is arranged on described auxiliary chock insulator matter setting area.
Wherein, the end face of described main chock insulator matter setting area, higher than the end face of described auxiliary chock insulator matter setting area, forms certain difference in height.Main chock insulator matter 11 is formed on the end face of described main chock insulator matter setting area, auxiliary chock insulator matter 12 is formed on the end face of described auxiliary underbed setting area, thereby can utilize described difference in height realize main chock insulator matter 11 and auxiliary chock insulator matter 12 section poor,, the end face of main chock insulator matter 11, higher than the end face of auxiliary chock insulator matter 12, plays the thick effect of main support liquid crystal panel box.
Therefore, in the present invention, can design main chock insulator matter 11 identical with the length of auxiliary chock insulator matter 12, can form by a composition technique simultaneously, simplify manufacture craft, reduce production costs.
Preferably, described main chock insulator matter setting area comprises increases layer pattern 7, poor to guarantee the section of main chock insulator matter 11 and auxiliary chock insulator matter 12.
Further, described main chock insulator matter setting area and auxiliary chock insulator matter setting area are all positioned on grid line 10, because the end face of grid line 10 is smooth, there will not be the inconsistent problem that affects liquid crystal panel homogeneity of bottom surface height of chock insulator matter.And the section difference of main chock insulator matter 11 and auxiliary chock insulator matter 12 can realize by the thickness that increases layer pattern 7.
Further, increase layer pattern 7 owing to having increased on array base palte, in order not increase manufacture craft, increasing layer pattern 7 can form by a composition technique with the source electrode 3 of thin film transistor (TFT) 1 and drain electrode 4,, increasing layer pattern 7 is to leak by same source the same layer structure that metallic diaphragm forms with source electrode 3 and drain electrode 4.
Certainly, increase layer pattern 7 and also can with pixel electrode 6 for forming by a composition technique, that is, increase layer pattern 7 and the same layer structure of pixel electrode 6 for being formed by same transparent conductive film layer.
Shown in Fig. 1 and Fig. 2, take bottom gate linear film transistor 1 as example, illustrate the structure of array base palte in the present invention below, specifically comprise:
Underlay substrate 100, as transparent glass substrate and quartz base plate;
Be formed on gate electrode 2 and grid line 10 on underlay substrate 100;
Being formed on the gate insulation layer 101 on gate electrode 2 and grid line 10, can be silicon dioxide layer, silicon nitride layer or silicon oxynitride layer, or both composite beds arbitrarily, or three's composite bed.
Be formed on the active layer pattern 5 on gate insulation layer 101, active layer pattern 5 is corresponding with the position of gate electrode 2, and material can be amorphous silicon or oxide semiconductor;
Be formed on source electrode 3 and drain electrode 4 on active layer pattern 5, and data line 20, the part of active layer pattern 5 between source electrode 3 and drain electrode 4 forms the raceway groove of thin film transistor (TFT) 1;
Be formed on the passivation layer 102 on source electrode 3, drain electrode 4 and data line 20, for the protection of the raceway groove of thin film transistor (TFT) 1.On passivation layer 102, be also formed with via hole, described via hole is positioned at the top of drain electrode 4, exposes drain electrode 4;
Be formed on the pixel electrode 6 on passivation layer 102 and increase layer pattern 7, wherein, increase layer pattern 7 and the same layer structure of pixel electrode 6 for being formed by same transparent conductive film layer, increase layer pattern 7 and be formed on the main chock insulator matter setting area being positioned on grid line 10, pixel electrode 6 is electrically connected by via hole and the drain electrode 4 of passivation layer 102;
Be formed on the main chock insulator matter 11 increasing on layer pattern 7 end faces, and form the auxiliary chock insulator matter 12 that is positioned at grid line 10 tops on passivation layer 102, wherein, main chock insulator matter 11 is identical with the length of auxiliary chock insulator matter 12, and increases the end face that is arranged so that main chock insulator matter 11 of layer pattern 7 higher than the end face of auxiliary chock insulator matter 12.
Embodiment bis-
A kind of liquid crystal panel is also provided in the embodiment of the present invention, comprise array base palte and color membrane substrates that box is arranged, described color membrane substrates comprises black matrix, wherein, described array base palte adopts the array base palte in embodiment mono-, and the chock insulator matter setting area on described array base palte is corresponding with the black matrix position on color membrane substrates.
Because chock insulator matter is formed on array base palte, overcome chock insulator matter and be formed on the technical matterss such as the Bluepoint causing on color membrane substrates, improve the display quality of liquid crystal panel., because the length of main chock insulator matter and auxiliary chock insulator matter is identical, can form by a composition technique simultaneously meanwhile, simplify manufacture craft, reduce production cost.
Embodiment tri-
A kind of display device is also provided in the embodiment of the present invention, adopts the liquid crystal panel in embodiment bis-, improved the display quality of display device, reduced the production cost of product.
In technical scheme of the present invention, supporting thick main chock insulator matter and the auxiliary chock insulator matter of liquid crystal panel box is formed on array base palte, by the end face of main chock insulator matter setting area on array base palte being set higher than the end face of auxiliary chock insulator matter setting area, and by this difference in height realize between main chock insulator matter and auxiliary chock insulator matter section poor, thereby the length that can design main chock insulator matter and auxiliary chock insulator matter is identical, can form by a composition technique simultaneously, simplify manufacture craft, reduce the production cost of product.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, do not departing under the prerequisite of the technology of the present invention principle; can also make some improvement and replacement, these improvement and replacement also should be considered as protection scope of the present invention.

Claims (7)

1. an array base palte, comprise data line and grid line, and the multiple pixel cells that limited by data line and grid line, each pixel cell comprises thin film transistor (TFT) and pixel electrode, described array base palte also comprises chock insulator matter and chock insulator matter setting area, and described chock insulator matter comprises main chock insulator matter and auxiliary chock insulator matter; Described chock insulator matter setting area comprises main chock insulator matter setting area and auxiliary chock insulator matter setting area, and described main chock insulator matter is arranged in described main chock insulator matter setting area; Described auxiliary chock insulator matter is arranged on described auxiliary chock insulator matter setting area, it is characterized in that,
The end face of described main chock insulator matter setting area is higher than the end face of described auxiliary chock insulator matter setting area;
The length of described main chock insulator matter and auxiliary chock insulator matter is identical.
2. array base palte according to claim 1, is characterized in that, described main chock insulator matter setting area comprises increases layer pattern.
3. array base palte according to claim 2, is characterized in that, described main chock insulator matter setting area and auxiliary chock insulator matter setting area are all positioned on grid line.
4. array base palte according to claim 2, is characterized in that, described in increase the source electrode of layer pattern and thin film transistor (TFT) and drain electrode is to leak by same source the same layer of structure that metallic diaphragm forms.
5. array base palte according to claim 2, is characterized in that, described in to increase layer pattern and pixel electrode be the same layer structure being formed by same transparent conductive film layer.
6. a liquid crystal panel, comprise array base palte and color membrane substrates that box is arranged, described color membrane substrates comprises black matrix, it is characterized in that, described array base palte adopts the array base palte described in claim 1-5 any one, and the chock insulator matter setting area on described array base palte is corresponding with the black matrix position on color membrane substrates.
7. a display device, adopts liquid crystal panel claimed in claim 6.
CN201410108905.0A 2014-03-21 2014-03-21 A kind of array base palte, liquid crystal panel and display device Active CN103901672B (en)

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Cited By (8)

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CN104880865A (en) * 2015-06-19 2015-09-02 武汉华星光电技术有限公司 Array substrate, manufacturing method thereof and liquid crystal panel
CN106773251A (en) * 2016-12-29 2017-05-31 东旭(昆山)显示材料有限公司 A kind of color membrane substrates and preparation method thereof and display panel and display
CN106990619A (en) * 2016-01-11 2017-07-28 三星显示有限公司 Display device
CN107479260A (en) * 2017-09-08 2017-12-15 深圳市华星光电技术有限公司 COA substrates and preparation method thereof, display panel
CN107490906A (en) * 2017-08-07 2017-12-19 友达光电股份有限公司 Display panel
CN107942528A (en) * 2018-01-02 2018-04-20 京东方科技集团股份有限公司 A kind of bore hole 3D display equipment and preparation method thereof
CN109031766A (en) * 2018-09-13 2018-12-18 惠科股份有限公司 Colored filter and preparation method thereof and display panel
CN110824786A (en) * 2019-11-26 2020-02-21 厦门天马微电子有限公司 Display panel and display device

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CN1661426A (en) * 2004-02-26 2005-08-31 Lg.菲利浦Lcd株式会社 Liquid crystal display device and method of fabricating the same

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CN1461422A (en) * 2001-04-13 2003-12-10 皇家菲利浦电子有限公司 Liquid crystal display device having uniform integrated spacers
CN1661424A (en) * 2004-02-25 2005-08-31 Lg.菲利浦Lcd株式会社 Liquid crystal display device and method of fabricating the same
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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104880865A (en) * 2015-06-19 2015-09-02 武汉华星光电技术有限公司 Array substrate, manufacturing method thereof and liquid crystal panel
CN106990619A (en) * 2016-01-11 2017-07-28 三星显示有限公司 Display device
CN106773251A (en) * 2016-12-29 2017-05-31 东旭(昆山)显示材料有限公司 A kind of color membrane substrates and preparation method thereof and display panel and display
CN107490906A (en) * 2017-08-07 2017-12-19 友达光电股份有限公司 Display panel
US10825845B2 (en) 2017-08-07 2020-11-03 Au Optronics Corporation Display panel having a plurality of spacers
CN107490906B (en) * 2017-08-07 2021-04-16 友达光电股份有限公司 Display panel
CN107479260A (en) * 2017-09-08 2017-12-15 深圳市华星光电技术有限公司 COA substrates and preparation method thereof, display panel
CN107942528A (en) * 2018-01-02 2018-04-20 京东方科技集团股份有限公司 A kind of bore hole 3D display equipment and preparation method thereof
CN109031766A (en) * 2018-09-13 2018-12-18 惠科股份有限公司 Colored filter and preparation method thereof and display panel
CN110824786A (en) * 2019-11-26 2020-02-21 厦门天马微电子有限公司 Display panel and display device
CN110824786B (en) * 2019-11-26 2022-08-09 厦门天马微电子有限公司 Display panel and display device

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