CN103887114A

CN103887114A - Air vehicle electronic system and method for controlling relay in air vehicle electronic system

Info

Publication number: CN103887114A
Application number: CN201410114502.7A
Authority: CN
Inventors: 罗伯特·C·马伦; 伊姆蒂亚兹·可汗
Original assignee: Leach International Corp
Current assignee: Leach International Corp
Priority date: 2008-01-04
Filing date: 2008-01-04
Publication date: 2014-06-25

Abstract

The invention provides a nonvolatile state indicator switch. One embodiment of the invention relates to an air vehicle electronic system. The air vehicle electronic system comprises a fault detection circuit connected to a relay and a fault indicator circuit connected to the fault detection circuit and the control input end of the relay, wherein the fault indicator circuit comprises a nonvolatile storage element, and the fault detection circuit is allocated to be used for detecting faults and providing fault indicating signals for the fault indicator circuit; in addition, the fault indicator circuit is allocated to be used for responding to the fault indicating signals by providing a preset control signal for the relay and storing information for indicating the detected faults into the nonvolatile storage element.

Description

Aircraft electrical subsystem and for controlling the method for relay wherein

The application is the divisional application that is called the Chinese patent application 200880123964.8 of " aircraft electrical subsystem and for controlling the method for relay wherein " in the name that on January 4th, 2008 submits to.

Technical field

Present invention relates in general to the use of relay in aircraft electrical subsystem, more particularly, relate to the system and method for preserving and indicate the state of the fault detecting at relay.

Background technology

The major function of aircraft electrical subsystem is in whole aircraft, to produce, regulate and distribution electric power.On aircraft, there are some different power supplys for powering to aircraft electrical subsystem.These power supplys can comprise AC generator, auxiliary power unit, external power source and the ram-air turbine that engine drives.Aircraft electrical sub-component not only uses AC but also use DC to move with many different voltage levels.But most of aerocraft system uses 115V AC or the 28V DC of 400Hz.Further, 26V AC also in some aircraft for the object of throwing light on.DC electric power is provided by " self-excitation " generator that comprises electromagnet conventionally, wherein produces electric power by the commutator that the output voltage of 28V DC is regulated.The AC electric power that phase voltage is generally 115V by alternating current generator generally in three-phase system the frequency with 400Hz produce.

Relay is generally used for the supply of electric power of controlling to various loads in aircraft electrical subsystem.Typical relay comprises the contact that is connected to power supply and the contact that is connected to load.The magnetic field closure that electromechanical contact is produced by coil.Coil is by the control current excitation providing to relay by control inputs.Contact closure allows load current to flow.

Fault danger close in aircraft electrical subsystem.Specifically, the fault in the electronic load such as petrolift can cause blast.The fault diagnosis example that can occur in aircraft electrical subsystem comprises earth fault (and short circuit of ground wire) and arc fault (short circuit between power line).Earth fault causes net current imbalance, and arc fault can not cause net current imbalance.

Various fault-interrupter are used to aircraft electrical subsystem.These fault-interrupter can comprise that the general fault-interrupter (UFI), arc fault circuit interrupter (AFCI) and the heat that are now conventionally arranged in driver's seat trigger circuit breaker (CB).

Summary of the invention

The present invention relates to a kind of Nonvolatile status indicator switch.In one embodiment, the present invention relates to a kind of aircraft electrical subsystem, comprise and be connected to the failure detector circuit of relay and be connected to described failure detector circuit and be connected to the fault detector circuit of the control input end of described relay, wherein said fault detector circuit comprises non-volatile memory device; Wherein said failure detector circuit is configured to detection failure and the signal of indication fault is provided to described fault detector circuit; And wherein said fault detector circuit is configured to, by providing predetermined control signal to described relay, and indication is detected to the information of fault is stored in described non-volatile memory device, responds the signal of described indication fault.

In another embodiment, the present invention relates to a kind ofly for controlling the method for relay of aircraft electronic system, described method comprises: detect at least one fault; Use the record of described at least one fault of solid-state, non-volatile memory storage; In the time losing electric power, maintain the described record of described at least one fault; In the time receiving reset signal, remove the described record of described at least one fault; And in the time that described at least one fault is stored, disconnect relay to stop flow of power to the load in described aircraft electronic system.

In another embodiment, the present invention relates to a kind of fault detector circuit, comprising: input logic circuit, is configured to receive indication and detects the reset signal of the request of fault described in the fault-signal of fault and indication reset; And electromechanical switch, be connected to the output of described input logic circuit, the output of wherein said input logic circuit obtains according to described fault-signal and described reset signal, and wherein said electromechanical switch is configured to, the control relay in response to the output of described input logic circuit; And wherein said electromechanical switch conductively-closed material surrounds, described shielding material reduces the impact of the operation of external magnetic field on described electromechanical switch.

Accompanying drawing explanation

Fig. 1 is according to the schematic diagram of the aircraft electrical subsystem of wooden inventive embodiments.

Fig. 2 is according to the schematic diagram of the protection fault relay of the embodiment of the present invention.

Fig. 3 is according to the schematic diagram of the fault detector circuit of the embodiment of the present invention.

Fig. 4 is can be used for to the schematic diagram of the power supply of fault detector circuit supply according to the embodiment of the present invention.

Fig. 5 is the flow chart illustrating according to the method for the operation of the control relay in response to the detection of fault of the embodiment of the present invention.

Fig. 6 can be used on input logic circuit in fault detector circuit and the schematic diagram of nonvolatile memory according to the embodiment of the present invention.

Fig. 7 is the sequential chart that the input logic circuit of Fig. 6 and the operation of non-volatile memory device storage failure are shown.

Fig. 8 illustrates that the input logic circuit of Fig. 6 and non-volatile memory device remove the sequential chart of the operation of the fault of storing.

Fig. 9 is according to the schematic diagram of the drive circuit for fault detector circuit of the embodiment of the present invention.

Figure 10 is according to the schematic diagram of the relay control switch for fault detector circuit of the embodiment of the present invention.

Figure 11 is according to the schematic diagram of the visual detector for fault detector circuit of the embodiment of the present invention.

Figure 12 is according to the circuit diagram of the fault detector circuit of the embodiment of the present invention.

Figure 13 is according to the circuit diagram of the power supply module using together with fault detector circuit of the embodiment of the present invention.

Figure 14 is according to the schematic block diagram of fault detector circuit of electromechanical switch comprising of the embodiment of the present invention with electromagnetic shielding.

Figure 15 A is according to the schematic block diagram of the fault detector circuit that comprises the visual detector of indicating non-fault state of the embodiment of the present invention.

Figure 15 B is according to the schematic block diagram of the fault detector circuit of the visual detector that comprises indication fault situation of the embodiment of the present invention.

Embodiment

With reference now to accompanying drawing,, accompanying drawing illustrates that, according to the embodiment of fault detector circuit of the present invention, it can be included in the relay for aircraft electrical subsystem.Fault detector circuit is used in the control signal that in the situation that fault state detected, interruption provides to relay.The interruption of control signal can make the electric power of relay disconnecting consumers.In some embodiments of the invention, fault detector circuit comprises the nonvolatile memory of the information for storing indication fault existence.In the time removing the electric power of fault detector, nonvolatile memory is preserved fault status information.In the time of the electric power of reset relay, fault detector circuit can prevent from being activated before device that relay is eliminated and monitors in fault is by hand-reset.

In multiple embodiment, utilize solid-state circuit assembly to realize fault detector circuit.For example, multiple solid-state, non-volatile memory element can be for storage failure state.In other embodiments, utilize electromechanical switch to realize fault detector circuit.Electromagnetic shielding material can the interference to electromechanical switch for armoured magnetic field.

Solid-state fault detector circuit and electromechanical fault detector circuit are provided with the indication that comes from failure detector circuit and detect the signal of fault conventionally separately, and wherein failure detector circuit is monitored the relay being associated with fault detector switch.Then fault detector, by failed storage in its nonvolatile memory, and interrupts the control of relay in response to fault.Also comprising according to the fault detector circuit of the embodiment of the present invention can be for removing the resetting device of nonvolatile memory.For solid-state fault detector circuit, resetting device can comprise the reset signal of pointing out nonvolatile memory to remove the fault of storing.For electromechanical fault detector switch, resetting device can comprise the physical location that for example changes electromechanical switch by pressing button.

Many embodiment of fault detector circuit comprise the organoleptic indicator for alarm operation person or the existence of attendant's fault.Organoleptic indicator can comprise visual detector or audible indicator.The embodiment of solid-state fault detector circuit can comprise that light-emitting diode (LED) is as visual detector.Use the embodiment of the fault detector circuit of electromechanical switch can comprise the Pop-up button that indication fault exists.

Fig. 1 is according to the schematic diagram of the aircraft electrical subsystem 100 of the embodiment of the present invention.Aircraft electrical subsystem 100 comprises the power supply 101 that is connected to load 103 by protection fault relay 105.Protection fault relay comprises the failure detector circuit 110 that is connected to fault detector circuit 120 and relay 140.Fault detector circuit 120 is also connected to relay 140.Protection fault relay 105 comprises external control input 152, ground connection input 154 and the RESET input 155.

Relay 140 is controlled electric power flowing from power supply to load.The external control signal control that relay is provided by 152 places, control input end conventionally.In usual operating period, external control signal is passed to Control input 142 by fault detector circuit 120.In the situation that failure detector circuit detects fault, fault detector circuit 120 transfers to provide the signal that disconnects relay circuit to interrupt the operation of relay to Control input by ignoring external control signal.

In illustrated embodiment, failure detector circuit 110 is monitored relay for the faulty indication in aircraft electrical subsystem.Can detect one or more in various different faults according to failure detector circuit of the present invention.In the situation that failure detector circuit 110 detects fault, failure detector circuit provides fault-signal to fault detector circuit 120.Fault-signal comprises that indication exists or do not exist the information of the fault of current generation.

In the situation that failure detector circuit 110 detects fault, fault detector circuit 120 interrupt the signal of control relay 140 and by failed storage in nonvolatile memory.Nonvolatile memory is preserved the existence of fault in the situation that losing electric power.In certain embodiments, reset signal is for removing the fault of nonvolatile memory.Reset signal can be provided by craft preservation personnel after confirmation relay circuit is ready to safety operation.

Relay 140 can utilize commercial can with any type relay or realize for the custom-designed relay of given aircraft electronic system 100.Fault detector circuit 120 can utilize the logical circuit or the microprocessor that are connected to indicating device to realize.In many embodiment, indicating device is the visual detector of light-emitting diode (LED) or the another type such as Pop-up switch.Failure detector circuit 110 can utilize the current imbalance testing circuit such as ground fault detection circuit and/or arc fault detection circuit to realize.Other suitable circuit comprises over-current detection circuit and the more complicated circuit such as the circuit of use electric current and/or power profile detection failure.In many situations, failure detector circuit can utilize any circuit of the abnormal operation in can sense aircraft electronic system 100 to realize.

Fig. 2 is according to the schematic diagram of the protection fault relay 200 of the embodiment of the present invention.Protection fault relay 200 comprises failure detector circuit 210, fault detector circuit 220, power supply 230 and relay 240.Control line 252 is connected to protection fault relay 200, is carried to the control signal of protection fault relay.The output 256 of protection fault relay 200 is connected to load (not shown).Failure detector circuit 210 is connected to fault detector circuit 220 and relay 240.Relay 240 is also connected to fault detector circuit 220.Power supply 230 is connected to control line 252, ground wire 255 and the fault detector circuit 220 of Bearer Control signal.

Protection fault relay 200 operates similarly with the relay 105 in Fig. 1, and utilizes relay 240 to control the flow of electrical power from power supply to load.Relay 240 receives external control signal by fault detector circuit 220.Flow through the electric current of relay by provide the failure detector circuit 210 of the signal of indicating fault status to monitor to fault detector circuit 220 by output 253.In the time fault being detected, fault detector circuit 220 produces forbids the control signal that relay 240 powers to the load.

In many embodiment, fault detector circuit 220 carrys out the operation of control relay 240 by the current circuit of disconnection or closed field application relay coil.Fault detector circuit is configured to receive from failure detector circuit the signal of indication fault.Depend on not existing or existing of fault, fault detector circuit make current circuit complete or interrupt.In certain embodiments, fault detector circuit makes current circuit complete in the time that fault does not exist.External control signal 252 is the operation of control relay also.External control signal is attempted opening in aircraft being produced by the electronic building brick of Control in response to pilot.Once the fault of detecting, fault detector circuit is with regard to interruptive current loop.In certain embodiments, fault detector circuit provides predetermined control signal substituting as external control signal.Fault detector circuit continues the control output signal that provides predetermined, until it receives reset instruction.Reset signal 254 can be by confirming that the attendant that relay circuit is ready to safety operation provides.In one embodiment, reset signal is provided by another circuit.

Power supply 230 is to the assembly power supply using in fault detector circuit 220.The electric current that power supply receives relatively in a small amount from external control signal 252, and this electric power is offered to fault detector circuit.

Relay 240 and failure detector circuit 210 can utilize commercial can with any type circuit or realize according to the custom-designed circuit of known principle.Discuss below according to the embodiment of the present invention can be for realizing the circuit diagram of fault detector circuit.

Fig. 3 is according to the schematic diagram of the fault detector circuit 320 of the embodiment of the present invention.Fault detector circuit 320 comprises the input logic circuit 322, non-volatile memory device 324 and the drive circuit 326 that are connected in series.Fault detector circuit also comprises the switch 328 and the visual detector 329 that are all connected to drive circuit 326.Fault input 350 and the input 354 that resets of fault detector circuit are provided for input logic circuit 322.Control input end 352 and the control output end 356 of fault detector switch are connected to switch 328.

Fault detector circuit 320 is configured to receive fault-signal, receive reset signal and receive control inputs signal from control input end 352 from the RESET input 354 from fault input 350, and is configured to control output signal by control output end 356 outputs.Depend on the value of input signal, fault detector circuit 320 can determine that fault exists, and visually indicates the existence of this fault and/or disconnects relay.These operations are described below in further detail.

In the embodiment illustrating, input logic circuit 322 is connected to the circuit that reset signal and fault-signal are provided.Fault-signal indication is when the existence of prior fault.The RESET input 354 provides reset signal, and any record that the memory middle finger of this reset signal indication fault indicator circuit 320 is shown in prior fault should be eliminated.Input logic circuit 322 utilizes these signals to determine whether the fault of report when prior fault and before whether should retaining or remove in memory.The output of input logic circuit 322 is provided for non-volatile memory device 324, and non-volatile memory device 324 is configured to the signal of the malfunction that indication mechanism is provided.

The malfunction of non-volatile memory device 324 storage systems, and the signal receiving from input logic circuit 322 is responded.The non-volatile characteristic of non-volatile memory device allows this element in the situation that losing electric power, to maintain malfunction.As a result, once the existence of fault is stored in nonvolatile memory, non-volatile memory device 324 just continues to exist to the downstream components indication fault of fault detector circuit 320.Being stored in the signal that the malfunction in non-volatile memory device receives by input logic circuit 322 determines.If input logic circuit is indicated the fault of preserving in the memory that should reset to non-volatile memory device, non-volatile memory device is removed any fault of preserving.Unfaulty conditions is maintained and is transmitted to the downstream components of fault detector circuit 320, until input logic circuit 322 is indicated and fault detected subsequently.

Drive circuit 326 receives indication fault from non-volatile memory device 324 and exists or non-existent signal.This signal can represent when prior fault or unsolved fault before.Drive circuit 326 provides and prevents that control inputs signal is provided at the input of controlling on output line and exists in response to fault to switch 328.In addition, drive circuit exists by activating visual detector 329 indication faults.In certain embodiments, fault detector circuit 320 receives the input that resets, and causes drive circuit 326 deexcitation visual detectors, and Closing Switch 328 is to transmit the signal on control inputs line to controlling output line.In other embodiments, visual detector is by hand-reset.In certain embodiments, when the visual detector input that resets during by hand-reset is provided for fault detector circuit 320.

The signal of switch 328 based on receiving from drive circuit 326 is switched on and disconnects.Switch 328 is connected to and is carried to the control inputs signal of switch and the control line from the control output signal of switch.Switch 328 is configured to the circuit between disconnection or Closed control input 352 and control output end 356.In brief, switch can interrupt control signal.In the time that control output end is connected to the control input end of relay, not existing of control signal can make relay disconnect and prevent that electric current from flowing to load from power supply.

As mentioned above, visual detector 329 can be by the signal activation receiving from drive circuit 326 and deexcitation.Non-volatile memory device storage failure, and the output of drive circuit 326 activates visual detector to exist to operator's indication fault.In the embodiment illustrating, drive circuit 326 console switch 328 and visual detector 329 simultaneously.Like this, in the situation that drive circuit 326 receives faulty indication from nonvolatile memory, drive circuit driving switch disconnects, and drives visual detector to show that to human operator who fault exists simultaneously.In the embodiment of use electronic circuit indicating device, drive circuit is deexcitation visual detector in the time that input logic circuit receives reset signal.In the embodiment of use electromechanical visual detector, visual detector must be by operator's hand-reset.

Input logic circuit 322 can utilize the combination of the device such as gate to realize.Filter element and switch also can be included in logical circuit 322.Non-volatile memory device 324 can utilize a multiple bit non-volatile memory device to realize.One embodiment of the invention is used potentiometer as non-volatile memory device 324.Potentiometer can be digital potentiometer.Drive circuit 326 can utilize the device such as transistor and gate to realize.Switch 328 can utilize the device such as transistor and filter to realize.Visual detector 329 can utilize and be connected to LED or the transistor of dynamo-electric Pop-up indicating device or the switch of other type and realize.The element of fault detector circuit can comprise the filter assembly for leaching the noise such as high-frequency current.In certain embodiments, the assembly of fault detector circuit can utilize microprocessor, gate array or the application-specific integrated circuit (ASIC) (ASIC) of suitable configuration to realize.

Fig. 4 is can be used for to the schematic diagram of the power supply 430 of fault detector circuit supply according to the embodiment of the present invention.In the embodiment illustrating, power supply 430 is connected between control line and ground wire.The control line and the ground wire that are connected to power supply are also connected to other element such as fault detector circuit.In many embodiment, at least one lead-out wire that comes from power supply can be for providing voltage signal.In many embodiment, power supply uses mobile part electric current in control line, and is stable voltage signal by this current conversion.The voltage signal that power supply produces can be for the various assemblies of driving malfunction indicator circuit.In the embodiment illustrating, power source voltage Vcc is produced by power supply 430, and it can be used by the device in fault detector circuit.In many embodiment, the value of Vcc is 5V.In other embodiments, provide other output voltage.Can utilize the power supply of commercial any type of using or known power circuit to configure to realize according to the power supply 430 of the embodiment of the present invention.

Fig. 5 is the flow chart of the method for the operation of control relay in response to fault detect illustrating according to the embodiment of the present invention.

Method 500 comprises whether definite (510) detect and works as prior fault.If detect and work as prior fault, record disconnection (530) relay that storage (520) fault exists.Work as prior fault if definite (510) do not detect, determine whether (540) exist at prior fault.If do not detect when prior fault and do not exist at prior fault, (or removing) (550) memory that resets, and allow (560) relay to carry out normal running.

If determine that (540) exist at prior fault, further determine whether (570) are repaired at prior fault.If also do not correct (570) this fault, maintain record disconnection (530) relay that (520) fault exists.On the other hand, if determine that this fault is repaired (570), (550) memory allow relay normal running (560) resets.For continuous review fault or reset, disconnect relay (530) or allowing normal running (560) afterwards, whether the method loops back definite (510) detects is worked as prior fault.

Decision table can be for explanation according to the method for the embodiment control relay operation of Fig. 5.The table l below illustrating shows according to the input and output of the fault detector circuit of the embodiment of the present invention.Input variable comprises malfunction, current memory state and reset signal.Output variable comprises the NextState of memory and disconnection or closure state to the switch of relay power supply.In table 1, fault=0 indication is without working as prior fault, and fault=1 indication fault; Not storage failure is indicated in memory=0, and the fault of memory=1 indication storage; Reset=0 indication without current reset signal, and reset=1 indication request reset fault in the past; And switch=0th, the switch disconnecting, and the switch of switch=1 indicating closing.

Table 1

Input	Input	Input	Output	Output
					Fault	Memory	Reset	Memory	Switch
0	0	0	0	l
					0	0	l	0	1
0	1	0	1	0
					0	1	l	0	1
1	0	0	1	0
					1	0	l	1	0
1	1	0	1	0
					1	1	l	1	0

In two row that start, without working as prior fault and the record without past fault.Therefore, the value of the variable of not considering to reset, the NextState of memory is constant.In the table illustrating, the output of switch is the reversion of memory output.Therefore,, in the time that memory is eliminated, switch is closed and allows relay to transmit electric power to load.In the third line, without when prior fault but there is the fault of storage, and without reset.Therefore, maintain fault the cut-off switch of storage.In fourth line, without working as prior fault, the fault that has storage and reset request.Therefore, remove memory to show fault-free situation Closing Switch.In the end, in four lines, detect and work as prior fault.Therefore, do not consider memory or reset at front state, memory show fault exist and cut-off switch.

The operation of summing up in table 1 can be by realizing according to the embodiment of the present invention with logical circuit and non-volatile memory device, and wherein logical circuit is used for providing suitable input to maintain malfunction in conjunction with the input signal of indication fault and reset and to memory component.

As discussed above, failure detector circuit can be for detection of the existence of fault in relay-set, and fault detector circuit can be for storage failure.Non-volatile memory device can be for maintaining the record of fault in the time losing electric power.It is the potentiometer that comprises nonvolatile memory that of non-volatile memory device may select.Potentiometer can be digital potentiometer.Potentiometric resistance can change in response to control signal, and is stored in potentiometric nonvolatile memory.Fault can be set and exist correspondingly with a resistance value, and fault can be set not exist corresponding with another resistance value.In other embodiments, use the non-volatile memory device of other type.In one embodiment, EEPROM is as non-volatile memory device.

Logical circuit can be inputted and provide suitable input to non-volatile memory device for the fault input in response to logical circuit and reset.The characteristic of logical circuit depends on the characteristic of non-volatile memory device.For example, if use potentiometer as non-volatile memory device, the existence of fault can produce the output that potentiometer is pushed into high value from logical circuit.The reception of reset signal can make logical circuit generation potentiometer be set to the output of low resistance.

Fig. 6 be according to the embodiment of the present invention can be for the schematic diagram of the input logic circuit of fault detector circuit 622 and non-volatile memory device 624.As discussed above, the characteristic of input logic circuit 622 depends on the characteristic of non-volatile memory device 624.In the embodiment illustrating, non-volatile memory device 624 is the digital potentiometers with memory sum counter.Potentiometer has three inputs, comprises the whether selecteed signal of indicating potentiometer device (low effective sheet choosing), whether indication counter should upwards add (height) still subtracts the signal of (low) downwards and indicate whether to increase the signal of the low effective increment of counter.Increment counter signal often occurs as " pulse train ".Potentiometer only can change when selected.Further, for the each pulse in pulse train, counter can depend on the state of add/cut signal and upwards adds or subtract downwards.Memory maintains Counter Value in the time that pulse train finishes.This value is stored, until again select this device and receive another pulse train.In certain embodiments, high counting is used to indicate fault, and low counting is used to indicate fault-free.

In the embodiment that uses potentiometer as non-volatile memory device 624, logical circuit 622 is configured to respond fault input signal and reseting input signal by producing to the potentiometric input that makes potentiometer storage adequate information.In the embodiment illustrating, the input of input logic circuit operational failure and the input that resets produce device and select signal, the signal that upwards adds/subtract and pulse train downwards.In other embodiments, nonvolatile memory has different inputs, and input logic circuit produces suitable signal to supply these inputs.

In the embodiment illustrating at Fig. 6, the Intersil that non-volatile memory device 624 utilizes the Co., Ltd of the Intersil U.S. in this city of Mil's Pitta, California to manufacture ^tMx9315 numerical control potentiometer is realized.The specification of this potentiometer operation and principle are described in last issue is the data sheet table FN8179.1 on September 15th, 2005, and this data sheet table merges in the application by reference.Intersil ^tMpotentiometer also comprises counter and nonvolatile memory.In addition, Intersil ^tMpotentiometer also comprises first input end 1, the second input terminal 2, the 3rd input terminal 7 and output 5.Although not shown, non-volatile memory device 624 can also comprise the terminal that is connected to Vcc and Vss operating voltage.

Intersil ^tMpotentiometer is worked in the mode of summarizing above conventionally.At input terminal, 1 place provides increment signal, and at input terminal, 2 places provide add/cut signal, and provides device to select signal at input terminal 7 places.The potentiometric increase of increment signal control figure or minimizing.Add/cut signal indicates whether that the resistance that should increase non-volatile memory device is with indication fault, still reduces conversely this resistance with indication fault-free.Device selects signal to enable potentiometer operation.As long as cancel selected this device, the value of counter is just stored in nonvolatile memory.This is in generation when to select signal transition be also high to height and increment signal of low active parts.

In the embodiment illustrating illustrated in Fig. 6, input logic circuit 622 produces and utilizes Intersil ^tMthe necessary input of X9315 numerical control potentiometer store and clear fault message.Input logic circuit 622 comprises two inputs (602,603), three outputs (631,632,633), NOR door 601, NAND door (611,612,613,614), inverter 605 and delay element (604,606,607).Input 602 and 603 is connected to the input of NOR door 601, and is connected to respectively reseting input signal and fault input signal.Input 602 is also connected to output 632, output 632 be the connection pin 2(of digital potentiometer 624 when low, subtract downwards add/subtract input).

The output of NOR door 601 is connected to NAND611(and in fact serves as inverter) two inputs.The output (node A) of NAND611 is connected to an input of NAND612.The output of NAND612 is connected to the second input (i.e. feedback) of NAND612 by delay element 604, and is connected to the first input end of NAND613.The output of NAND613 is connected to the output 631 being connected with the pin one (low effective increment input) of digital potentiometer 624.Node A is also connected to the delay element 606 being connected with inverter 605.The output of inverter 605 is connected to the second input of NAND613, and is connected to delay element 607.The output of delay element 607 is connected to the first input end of NAND614.Node A is also connected to the second input of NAND614.The output of NAND614 is connected to the low effective sheet choosing of the pin 7(of digital potentiometer 624 or device and selects) output 633 that is connected.

In operation, node A is the logical combination of reset signal (R) input and fault-signal (F) input, equals " R+F " (being R or F).Suppose typical steady state operation, reset input and fault input be height to indicate fault-free and without reset request, " R+F " or node A are low.If node A is low, the output of NAND612 will be high stable state, and the output of inverter 605 also will be high stable state.So during not there is not (being that node A is low) defined steady state operation by fault or reset, the output of NAND613 is all low together with the pin one (low effective increment input) of output 631 and digital potentiometer 624.In addition, during node A is low steady state operation, the output of NAND614 is together with the low effective sheet choosing input of pin 7(of output 633 and digital potentiometer 624) be all height.Therefore, during node A is low steady state operation, digital potentiometer device can not be selected, and increment input (pin one) and the change that adds/subtract input (pin two) is not responded.

If fault input is worked as prior fault from the low height that is transitioned into indication, node A is from the low height that is transitioned into.Before output due to NAND612, be the height under steady state operation, therefore delay element 604 is output as height.Then,, because two inputs are all high, therefore the output of NAND612 becomes low.After delay, the output of delay element 604 becomes low, and the output of result NAND612 becomes height again.Therefore, node A from low be transitioned into height after, the output of NAND612 is vibrated with certain frequency, the duration of the delay that this frequency dependent provides in delay element 604.In one embodiment, the frequency of NAND612 vibration output (being similar to clock) is the twice of the delay duration of delay element 604.Because node A is from the low height that is transitioned into, after the delay that therefore output of inverter 605 causes at delay element 606, become low.The output of inverter 605 become low before (timing period causing at delay element 606), the output (increment signal) of NAND613 is the reversion of the vibration output (clock) of NAND612.Once the delay duration of delay element 606 passes by, the output of inverter 605 just becomes low, and the output (increment signal) of result NAND613 remains height.

Node A self-stabilization state from low be transitioned into height before, delay element 607 is output as height, and NAND614 is output as height.Therefore, need only node A from the low height that is transitioned into, the output of NAND614 just becomes low, and within the delay duration of two

delay elements

606 and 607, remains low.At a time, the output of delay element 607 becomes low, and therefore the output of NAND614 reaches high again.Therefore,, when node A is transitioned into when high from low, the output of NAND614 provides low effective impulse to select as sheet choosing or device.Low effective sheet selects the delay sum that the duration of pulse is caused by delay element 606 and delay element 607 to determine.

Fig. 7 illustrates the input logic circuit of indicator diagram 6 and the sequential chart of the operation of non-volatile memory device between age at failure.From the top to the bottom, this figure illustrates reseting input signal (602), fault input signal (603), node A(R+F), the output of NAND door 612,613,614 and the output at digital potentiometer 624 pin 5 places.As discussed above, be low steady state operation for reset and fault, node A is low, and NAND612 is output as height, and NAND13 is output as low, and NAND14 is output as height.The output indication fault-free of digital potentiometer (pin 5), wherein under stable state, potentiometric internal resistance and corresponding output voltage are high enough to supply drive circuit 326(referring to Fig. 3).

Because fault-signal is worked as prior fault from the low height that is transitioned into indication, therefore node A becomes height, NAND612 starts to vibrate within the determined cycle of delay element 604, NAND13(is to the input of the low effective increment input of digital potentiometer 624) reversion of exporting NAND612 within the determined duration of delay element 606, and the input inputted to low effective sheet choosing of digital potentiometer 624 of NAND614() at delay element 606 with become low in 607 determined duration.As response, at chip selection signal, while being low, digital potentiometer 624 reduces the corresponding output voltage at internal resistance and pin 5 places at each trailing edge of increment signal.The signal trajectory of the pin 5 illustrating in Fig. 7 shows four this transition that cause output voltage to reduce.

When increment signal is while being high, in fact digital potentiometer 624 stores the output voltage values at pin 5 places at the rising edge of chip selection signal by storing potentiometric resistance setting, thereby this value can not be lost in the time that digital potentiometer loses electric power.If fault occur after but before fault is eliminated, reset, the potentiometric output on numeral that resets does not affect, as shown in Figure 7.In certain embodiments, the operation of input logic circuit and nonvolatile memory is consistent with the table 1 illustrating above.

Fig. 8 is that the input logic circuit and the non-volatile memory device that illustrate Fig. 6 are removed the sequential chart of the operation of fault in response to reset.From the top to the bottom, this figure illustrates reseting input signal (602), fault input signal (603), node A(R+F), the output of NAND door 612,613,614 and the output at digital potentiometer 624 pin 5 places.As discussed above, be low steady state operation for reset and fault, node A is low, and NAND612 is output as height, and NAND13 is output as low, and NAND14 is output as height.Preceding fault is indicated in the output of digital potentiometer (pin 5), and wherein potentiometric internal resistance and corresponding output voltage and initial default position are in a ratio of low (referring to Fig. 7) when stable state.

Reset signal from low be transitioned into high while removing the request of fault with indication, except add as shown in the figure/cut signal (reset) instruction digital potentiometer increases the output voltage at pin 5 places, input logic circuit with above for the same work described in Fig. 7 of indication fault.When increment signal is while being high, in fact digital potentiometer 624 stores the output voltage values at pin 5 places by storing potentiometric resistance setting again at the rising edge of chip selection signal.Here, the trouble-free high value of digital potentiometer storage indication, has removed the fault existing in fact.

In certain embodiments, the duration of delay element 606 is set to, and makes to transmit a predetermined integers vibration to low effective increment input of digital potentiometer 624.In one embodiment, a predetermined integers vibration equals or exceeds the maximum count value of digital potentiometer.In one embodiment, the vibration that delay element 604 produces occurs with the frequency of 71KHZ, and the delay period of delay element 606 is 10ms, and the delay period of delay element 607 is 0.1ms.

The various logic gates of using in input logic circuit 622 can utilize the commercial NOR using, NAND and NOT door to realize.The Philips Semiconductor that NOR door can utilize the Philips Semiconductors Co., Ltd of Washington DC to manufacture ^tMthe configurable multifunction gate of 74LVC1G57 low-power is realized.The Texas Instrument with Schmidt trigger input that NAND door can utilize the Co., Ltd of Texas Instrument in city of Dallas, Texas to manufacture ^tMtwo 2-the input of SN74LVC2G132 NAND door is realized.NOT door can utilize to be had 5V and allows the PhilipsSemiconductor of input ^tMthe triple anti-phase Schmidt triggers of 74LVC3G14 are realized.The delay period of delay element 604 can utilize the RC circuit that resistance is 500pF for 20K Ω and electric capacity to produce.The delay of delay element 606 can utilize the RC circuit that resistance is 0.1 μ F for 49.9K Ω and electric capacity to realize under 10V.The delay of delay element 607 can utilize the RC circuit that resistance is 0.01 μ F for 100K Ω and electric capacity to realize under 10V.

In the embodiment illustrating at Fig. 6, there is the input logic circuit of reseting input signal and fault input signal and digital potentiometer collaborative work with store and clear fault state.In other embodiments, can use and there is other digital potentiometer of memory or traditional nonnumeric potentiometer.In one embodiment, input logic circuit can be worked in coordination with and use with EEPROM or other nonvolatile memory.In one embodiment, flop assembly can as with the nonvolatile memory of suitable input logic circuit collaborative work.In one embodiment, flop or a bit non-volatile storage component realize with ASIC.In another embodiment, flop assembly is realized with programmable logic device.In another embodiment, input logic circuit and flop assembly all utilize programmable logic device (being PLD, CPLD and FPGA) and/or ASIC to realize.

Fig. 9 is according to the schematic diagram of the drive circuit 726 for fault detector circuit of the embodiment of the present invention.Drive circuit 726 comprises two inverters that are connected in series.Drive circuit 726 comprises an input and two outputs.Input provides low or high signal to drive circuit 726.Low signal can not exist for reception and registration fault, and high signal can be for passing on fault to exist, and vice versa.In shown embodiment, the reversion of input signal and input signal is provided for switch 328 and visual detector 329 as output signal.In one embodiment, inverter is to have 5V to allow the Philips Semiconductor of input ^tMthe triple anti-phase Schmidt trigger inverters of 74LVC3G14.In another embodiment, can use the NAND door that is configured to inverter.In another embodiment, can use other suitable inverter.

Figure 10 is according to the schematic diagram of the relay control switch 828 for fault detector circuit of the embodiment of the present invention.Relay control switch 828 comprises leak-grid and configures the nmos pass transistor 830 and the PMOS transistor 831 that link together.Resistance R 8 is connected to the drain electrode of nmos pass transistor 830 source electrode of PMOS transistor 831.Can comprise in other embodiments other assembly such as booster resistor and filter assembly.Relay control switch 828 comprises two input terminals and a lead-out terminal.The ON/OFF signal that the first input signal provides corresponding to drive circuit.The first input signal is provided for the grid of transistor 830, and can disconnect or connect transistor 830.In the time that transistor 830 is connected, the drain current of transistor 830 provides suitable switching voltage to the grid of transistor seconds 831, to be switched on or switched off transistor seconds.

The second input signal can be the external control signal for control relay.In the time that transistor 831 is connected, receive external control signal at the source electrode place of transistor 831.In the time that transistor seconds 831 is connected, transistor seconds 831 is closed for carrying the circuit from the control input end of relay control switch 828 to the corresponding electric current of external control signal of control output end.Control inputs signal is also for transistor 830 provides drain voltage.

Relay control switch can utilize nmos pass transistor or transistorized different layout of PMOS to realize.In other embodiments, electromechanical switch can be for replacing transistor.In certain embodiments, the first transistor utilizes the Fairchild Semiconductor that the Fairchild Semiconductor Co., Ltd of Maine State Nan Botelanshi manufactures ^tM2N7002N channel enhancement FET DMOS transistor is realized, and transistor seconds is Philips Semicondctor ^tMbSH202P channel enhancement MOS transistor.

Figure 11 is the schematic diagram for the visual indicator circuitry 929 of the electronic visual indicating device of fault detector circuit that comprises according to the embodiment of the present invention.Visual indicator circuitry 929 comprises the nmos pass transistor that is connected to light-emitting diode (LED).The drain electrode of nmos pass transistor is connected to the negative electrode of LED.The source ground of NMOS.The anodic bonding of LED is to power supply.Resistance R 9 is connected between power supply and the anode of LED.In other embodiments, can substitute and use PMOS transistor, its source electrode is connected to LED.Can also use the switch of another type to replace nmos pass transistor.In other embodiments, visual indicator circuitry can comprise other assembly such as resistor or filter.

Provide at transistorized grid place the input signal that comes from drive circuit to visual detector.In the embodiment illustrating, high input signal is connected nmos pass transistor.In the time that transistor is connected, it allows electric current to flow through luminous LED from power supply.LED provides the vision indication of fault.

The switch using in visual detector can utilize nmos pass transistor, PMOS transistor or electromechanical switch to realize.For example, transistor may be implemented as Fairchild Semicondctor ^tM2N7002N channel enhancement FET DMOS transistor or Philips Semicondctor ^tMbSH202P channel enhancement MOS transistor.In another embodiment, use the switch of other type that is suitable for driving LED.

Figure 12 is according to the circuit diagram of the fault detector circuit 1000 of the embodiment of the present invention.Fault detector circuit 1000 comprises the electronic circuit corresponding with drive circuit, the relay control switch of Fig. 8 and the visual detector of Fig. 9 of the input logic circuit of Fig. 6 and non-volatile memory device, Fig. 7.These electronic circuits can be as operated above for as described in each corresponding electronic circuit.

Comprise the RC filter of multiple parallel connections, for the HFS of filtered input signal, and prevent that the other parts of HFS and fault detector circuit 1000 from interacting.The RC assembly of multiple series connection is used as delay element.

Reset switch 1002 provides reset signal to fault detector circuit 1000 in the time that this switch is closed.Reset signal is provided by the high-voltage level that comes from power supply 1001.In shown embodiment, in the time that reset switch 1002 is closed, power supply provides 5V to the input of fault detector circuit 1000.Input 1005 provides fault-signal to fault detector circuit 1000.Fault-signal can produce in the optional position of aircraft electrical subsystem, and offers fault detector circuit 1000 by input 1005.

Figure 13 be according to the embodiment of the present invention can be for the circuit diagram of the power supply module 1400 to fault detector circuit supply.

Power supply module 1400 comprises the control line 1401 that is connected to power supply 1430 by resistor 1431.Power supply 1430 is by being connected to the first by-pass capacitor 1432 ground connection of power supply 1430 inputs 1402, and by being connected to the second by-pass capacitor 1434 ground connection of power supply 1430 outputs 1403.Power supply 1430 has all two other terminals of ground connection.Diode 1435 is connected across between the input 1402 and output 1403 of power supply 1435.Power supply module 1400 is done as a wholely to receive input and be connected to ground wire from control line 1401.Power supply module 1400 has an output 1403.

Power supply 1430 receives electric current in a small amount and provides stable supply of electric power by its output 1403 to each element of fault detector circuit 1000 from control line 1401.Diode 1435 prevents that direct current from flowing to the output 1403 of power supply from control line 140, but allows the reverse flow of electric current.The high fdrequency component of the first by-pass capacitor 1432 and the second by-pass capacitor 1434 filter current and voltage is in case stop loss bad power supply 1430.In one embodiment, control line 1401 carries 15V, and power supply module 1430 uses the electric current that is enough to produce at output 1403 stable 5V voltage supply.Supply voltage can be used as Vcc signal and is provided for each transistor of fault detector circuit 1000 and other assembly.In alternative embodiment, control line can provide AC voltage, and power supply can correspondingly be configured.

In one embodiment, micropower small outline transistor (SOT) is for realizing power supply 1430.In one embodiment, the Linear Technology that uses the linear technique Co., Ltd in this city of Mil's Pitta, California to manufacture ^tMthe low reference power supply that reverses of LT1790 micropower SOT-23.Diode can utilize high electricity to lead fast diode, for example Fairchild Semicondctor ^tMiN4148 realize.The first by-pass capacitor 1432 of input end can use the capacitor (25V) of 0.1 μ F to realize.The second by-pass capacitor 1434 of output can use the electric capacity (10V) of 1 μ F to realize.Resistor can be the resistor of 2.43K Ω.

Figure 14 is according to the schematic diagram of the fault detector circuit that comprises electromagnetic shielding of the embodiment of the present invention.Fault detector circuit 1100 is connected to the coil of relay 1110, and this coil is connected to load 1120.Fault detector circuit 1100 comprises input logic circuit 1103, electromechanical switch 1105 and electromagnetic shielding 1140.

Fault detector circuit 1100 receives fault-signal and control inputs signal, and produces control output signal.Input logic circuit 1103 receives fault-signal and reset signal, and controls the electromechanical switch 1105 in fault detector circuit 1100.Input logic circuit triggers electromechanical switch 1105 in the time that fault-signal indication fault exists.As response, electromechanical switch 105 disconnects the current circuit that electric current is provided to relay 1110.Electromechanical switch is used as nonvolatile memory, and maintains the record of this fault by maintaining the state of fault detector circuit, until fault detector circuit is reset.Reset signal or stimulation are also provided for fault detector circuit 1100.Electromechanical switch carrys out control relay by the external control signal of machine interruption in due course (disconnecting) control relay.Fault is removed in the reset of fault detector circuit 1100, and instruction electromechanical switch 1105 allows control signal to pass through.Reset signal is removed fault in the past, and prior fault is worked as in fault-signal indication.In many embodiment, reset signal is provided by switch.In many embodiment, switch is the parts of Pop-up fault detector.In other embodiments, switch separates with any failure indicating circuit.

The impact of the electromagnetic field that electromechanical switch may produce due to for example relay coil and being inadvertently triggered.According to embodiments of the invention, electromagnetic shielding 1140 reduces the electromotive force of the electromagnetic field of the operation generation interference of the electromechanical switch to fault detector circuit 1100 inside.

Fault detector circuit 1100 and relay 1110 can utilize multiple commercial can with product realize.Electromagnetic shielding 1140 can utilize the material that interacts, absorbs or destroy any type of electromagnetic field with electromagnetic field to realize.In one embodiment, metal material is for electromagnetic shielding.

In certain embodiments, utilize the ferroalloy with high magnetic permeability to form magnetic screen.Some examples of these materials comprise cold-rolled steel, mild steel, electric iron (electric iron), mild steel, silicon steel and are classified as the HyMu alloy of a class alloy with high magnetic permeability level (mu).Can comprise superalloy (Supermalloy), Hymu800, Silectron Z, supermendur (Supermendur), permalloy (Permalloy), Hy-Ra80, Orthanol, Deltamax (Deltamax), Hipernik (Hypernik) and mu-metal (Mu-metal) for the example of some materials of realizing magnetic screen.

Electromechanical switch 1105 can utilize reed switch or anchor relay to realize.Reed switch is the electric switch operating by applying magnetic field.Can utilize permanent magnet or apply magnetic field by electromagnet.One type of reed switch comprises by a pair of contact that adopts the magnetic material of seal glass encapsulation to manufacture.Contact normally disconnects, and closure while existing in magnetic field, or be normally closed, and disconnect in the time applying magnetic field.Anchor relay generally includes the one or more reed switches by electromagnet control.

Reed switch and anchor relay are formed and make to utilize magnetic field to trigger, and do not need actual machinery or electricity to trigger.Reed switch is operated by its corresponding electromagnet.But reed switch is subject to be present in the impact of the stray magnetic fields in this switch surrounding environment.Depend on the sensitivity of reed switch, reed switch can be disturbed near multiple magnetic field, and triggers reed switch in the time not intending by operation logic circuit triggers.

A critical nature of electromechanical switch is its sensitivity, and it is the amount of the required magnetic energy of energizing switch.For example, in the time utilizing coil electromagnetism body excitation electromechanical switch, adopt the unit of the ampere-number of turn to measure sensitivity, the ampere-number of turn is multiplied by the number of turn corresponding to the electric current of coil.Avoid for the protection of electromechanical switch the sensitivity that the electromagnetic shielding of unplanned triggering is selected as mating electromechanical switch.For example, the reed switch with muting sensitivity needs highfield to encourage, and can protect with a thin slice iron-bearing materials.Similarly, hair-trigger high sensitivity reed switch need to even not allow the thicker shielding that the sub-fraction of parasitic electromagnetic field is passed through.

Once fault is eliminated, just providing to reset to fault detector circuit stimulates.Figure 15 a illustrates the visual detector and the hand-reset mechanism that use together with fault detector circuit 1100 '.Fault detector circuit 1100 ' comprises Pop-up indicating device 1210, and it can be Pop-up button.Fault-signal triggers the electromechanical switch 1105 ' in fault detector circuit 1100 '.Electromechanical switch turn-off current loop, and upwards shift Pop-up indicating device 1210 onto position 1230(referring to Figure 15 B from position 1220).In fact the Pop-up indicating device 1210 of electromechanical switch maintains the record of fault upper position (1230) and locates.Once fault is eliminated, Pop-up indicating device is back into upper/lower positions 1220 from upper position 1230 downwards and just make fault detector circuit 1100 ' reset, and make electromechanical switch 1105 ' that control signal is passed to relay.

In the embodiment of Figure 15 A and 15B, Pop-up indicating device ejects in response to fault, and the vision indication of fault is provided, and is also used as the nonvolatile memory of fault, until reset simultaneously.In the embodiment illustrating, in the time that Pop-up indicating device is depressed, fault detector circuit is by hand-reset.In other embodiments, can utilize and different carry out hand-reset electromechanical switch in moving resetting device.

Although described the present invention with reference to some exemplary embodiment, should be appreciated that and can, in the case of not deviating from the spirit or scope of the present invention that appended claims and equivalent thereof limit, make various modifications and variations to the present invention.

Claims

1. a fault detector circuit, comprising:

Input logic circuit, is configured to receive indication and detects the reset signal of the request of fault described in the fault-signal of fault and indication reset; And

Electromechanical switch, is connected to the output of described input logic circuit, and the output of wherein said input logic circuit obtains according to described fault-signal and described reset signal;

Wherein said electromechanical switch is configured to, the control relay in response to the output of described input logic circuit; And

Wherein said electromechanical switch conductively-closed material surrounds, and described shielding material reduces the impact of the operation of external magnetic field on described electromechanical switch.

2. fault detector circuit according to claim 1, wherein said electromechanical switch is reed switch.

3. fault detector circuit according to claim 1, the screening ability of wherein said shielding material is greater than the magnetic sensitivity of described electromechanical switch.

4. fault detector circuit according to claim 1, wherein said shielding is made up of ferromagnetic material.