CN103870261A - SRAM (Static Random Access Memory) antenna LEF generation method - Google Patents
SRAM (Static Random Access Memory) antenna LEF generation method Download PDFInfo
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- CN103870261A CN103870261A CN201210544217.XA CN201210544217A CN103870261A CN 103870261 A CN103870261 A CN 103870261A CN 201210544217 A CN201210544217 A CN 201210544217A CN 103870261 A CN103870261 A CN 103870261A
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Abstract
The invention discloses an SRAM antenna LEF generation method. A user only needs to perform antenna LEF extraction on a minority of SRAMs of estimated sizes when designing the SRAMs to obtain corresponding data, afterwards, when a customer customizes an SRAM of a specific size, antenna information of every corresponding interface of the SRAM of the customized size can be found out and a corresponding antenna LEF can be generated by setting corresponding parameters, namely, by performing matching through matching splicing rules in a co-interface pin-splicing rule-submodule port-antenna information mapping table. Therefore, extraction of antenna LEF does not need to be performed on SRAM layout data, and time needed for generating SRAM antenna LEF of the specific size after the SRAM layout data is compiled can be greatly shortened.
Description
Technical field
The present invention relates to semiconductor design technology, particularly a kind of generation method of SRAM aerial information file.
Background technology
Design for general SOC (System On a Chip system level chip), on-chip memory SRAM(Static Random Access Memory, static RAM), ROM (READ_ONLY MEMORY, ROM (read-only memory)) etc. accounts for 20% left and right of chip area.These are Memory Compiler (storer compiler) generation for on-chip memory major part.When SRAM layout data is provided, a series of other design documents need to be provided, wherein just comprise SRAM Antenna LEF(SRAM aerial information file).
Generally as shown in Figure 1, SRAM comprises memory location unit B IT, line decoder XDEC, column decoder YDEC, sense amplifier SENSA, input-output unit IO, global controller Global Control, preposition controller Prodecoder to the structure of SRAM; In Fig. 1, SRAM is divided into 6 block structures, and respectively each is numbered.
In the process of manufacturing at chip (Wafer), because make the relation of plasma (PLASM) Implantation, the conductor layer that a large amount of charge accumulateds may expose by chip (Wafer) surface is transferred to gate leve region, cause gate leve oxide film impaired, affect device yield, we are called this " antenna effect ".
SRAM Antenna LEF(SRAM aerial information file) be exactly the file that antenna (Antenna) information of each interface (pin) of customization SRAM is offered to client, to guarantee can not cause antenna effect because of SRAM after client's domain placement-and-routing.General Antenna LEF(aerial information file) form is as follows:
The parameter of the SRAM that may choose due to client be non-definite value with unpredictable, and according to the parameter difference of customer selecting, the submodule of composition SRAM also has great difference, so SRAM Antenna LEF(SRAM aerial information file) only may after providing relevant parameter and generated SRAM layout data by Memory Compiler (storer compiler), client carry out the extraction of physical layout with professional tool (as instrument Abstract), like this for the SRAM of customer selecting different parameters, user needs repeatedly to be generated by Memory Compiler (storer compiler) the SRAM layout data of relevant parameter, use again professional tool (as instrument Abstract) to carry out the extraction of physical layout, just can obtain the Antenna Lef (aerial information file) of the SRAM of relevant parameter, and large SRAM carry out physical layout extract need to consume the more time, more time-consuming.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of generation method of SRAM aerial information file, can generate fast the aerial information file of the SRAM of specific size.
For solving the problems of the technologies described above, the generation method of SRAM aerial information file provided by the invention, comprises the following steps:
One. generate the splicing rule file of a kind of SRAM;
Described splicing rule file comprises one or more interfaces;
Each interface is corresponding to one or more interface rules;
Every interface rules, it need satisfy condition and comprise the byte degree of depth, multiplexing way, bitline width, word line length scope; Word line length scope, for the byte degree of depth should be satisfied divided by multiplexing way scope;
Every interface rules, corresponding to a strip module splicing rule;
Every strip module splicing is regular, comprises the identification code of one or more submodules;
The identification code of each submodule, corresponding to one or more stitch number of this interface;
Two. extract the corresponding table of interface pin-splicing rule-submodule port in the splicing rule file of this kind of SRAM;
Obtain N altogether of minimum interface rules in the splicing rule file of this kind of SRAM;
Three. according to the N in the splicing rule file of this kind of SRAM minimum interface rules, estimate simulation splicing and generate N SRAM layout data; Extract the aerial information of each interface pin of described N SRAM layout data;
Four. the corresponding table of interface pin splicing rule-submodule port of the splicing rule file of this SRAM extracting according to step 2, and the aerial information of each interface pin of described N SRAM layout data, corresponding the showing of interface pin-splicing rule-submodule port-aerial information that obtains the splicing rule file of this SRAM;
Five. according to the parameter byte degree of depth, multiplexing way, the bitline width of user's input, the splicing rule that inquiry matches from the corresponding table of described interface pin-splicing rule-submodule port-aerial information, according to the corresponding interface pin of splicing rule, the aerial information that match, generate under this parameter the aerial information file corresponding to the splicing rule file of this kind of SRAM, the data item of aerial information file comprises interface pin, aerial information.
Preferably, obtain the method for the minimum interface rules in the splicing rule file of this kind of SRAM, comprise the following steps:
(1) extract whole splicings rules in the splicing rule file of this kind of SRAM and whole submodules;
Extract each submodule set of splicing under rule of each interface of the splicing rule file of this kind of SRAM;
(2) if regular need of splicing satisfy condition by the need of another splicing rule satisfy condition comprise and both corresponding submodules splicing rules identical, from whole splicing rules of the splicing rule file of SRAM, remove this involved splicing rule, finally obtain the minimum interface rules in the splicing rule file of this kind of SRAM.
The generation method of SRAM aerial information file of the present invention, only need in the time that SRAM designs, estimate big or small SRAM to minority and carry out the extraction of aerial information file (Antenna Lef), obtain corresponding data, after this in the time of the SRAM of the specific size of customization, by setting corresponding parameter, can mate by the coupling splicing rule in the corresponding table of same interface pin-splicing rule-submodule port-aerial information, find out the SRAM of the specific size of this customization each corresponding interface aerial information and generate corresponding aerial information file (Antenna Lef), without the extraction of again SRAM layout data being carried out aerial information file (Antenna Lef), greatly reduce the time of SRAM layout data generates the SRAM of specific size afterwards aerial information file (Antenna Lef) in compiling, client does not need the aerial information file (Antenna Lef) of the SRAM that uses professional tool yet can obtain into specific size.
Accompanying drawing explanation
In order to be illustrated more clearly in technical scheme of the present invention, below the accompanying drawing that will use required for the present invention is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the structural representation of SRAM;
Fig. 2 is the generation method flow diagram of SRAM aerial information file of the present invention;
Fig. 3 is the schematic diagram of address wire interface A in the SRAM under a kind of parameter;
Fig. 4 is the schematic diagram of address wire interface A in the SRAM under another kind of parameter.
Embodiment
Below in conjunction with accompanying drawing, the technical scheme in the present invention is carried out to clear, complete description, obviously, described embodiment is a part of embodiment of the present invention, rather than whole embodiment.Based on the embodiment in the present invention, all other embodiment that those of ordinary skills obtain under the prerequisite of not making creative work, belong to the scope of protection of the invention.
Embodiment mono-
The generation method of SRAM aerial information file, as shown in Figure 2, comprises the following steps:
One. generate the splicing rule file of a kind of SRAM;
Described splicing rule file comprises one or more interfaces;
Each interface is corresponding to one or more interface rules;
Every interface rules, it need satisfy condition and comprise the byte degree of depth, multiplexing way, bitline width, word line length scope; Word line length scope, for the byte degree of depth should be satisfied divided by multiplexing way scope;
Every interface rules, corresponding to a strip module splicing rule;
Every strip module splicing is regular, comprises the identification code of one or more submodules;
The identification code of each submodule, corresponding to one or more stitch number of this interface;
A splicing rule file of SRAM, is the splicing characteristic according to SRAM, by the various possibilities of SRAM interface (Pin) structure, forms according to setting form; SRAM splicing rule file because must providing when the design SRAM, SRAM designer or SRAM splice program author relevantly splices and combines definition, so smoothly just can complete;
The format sample of the splicing rule file of a kind of SRAM:
PIN:A,Multi
RULE:NW(Z)Mux(8)NB(Z)WordLine(0_4)
CELL:HXP24_M8(3_4)HYP12_M8(2)HYP24XR_M8(0_1)
RULE:NW(Z)Mux(16)NB(Z)WordLine(5_8)
CELL:HXP38_M32(4_6)HYP12_M32(2_3)HYP24XR_M32(0_1)
......
END?PIN
PIN:B,Multi
......
END?PIN
The form of the splicing rule file by this kind of SRAM, defines submodule and the splicing condition of each interface (Pin) of this kind of SRAM of composition, wherein:
PIN:A, Multi represents that the title of interface (PIN) is A, and Multi represents interface A(PIN A) be series interfaces;
RULE represents splicing rule, NW, Mux, NB, WordLine are that a splicing rule needs satisfied condition, NW represents the byte degree of depth (Word depth), MUX represents multiplexing way (mux), NB represents byte bitline width (Number of Bit), Wordline represents word line length scope, Wordline(word line length scope) be the scope that the byte degree of depth should be satisfied with the ratio (Word depth/Mux) of multiplexing way.In the form of the splicing rule file of above-mentioned SRAM, Z in bracket represents arbitrarily, 8 represent that multiplexing way MUX is at 8 o'clock, and the 0_4 in WordLine unquote represents that the byte degree of depth should be less than or equal to 4 and be more than or equal to 0 with the ratio (Word depth/Mux) of multiplexing way.
CELL is submodule splicing rule, be illustrated in a splicing rule lower affect interface A(Pin A) submodule, HXP38_M32 (4_6) expression HXP38_M32 submodule affects interface A(Pin A) the 4th pin to the 6 pins: Pin[A4] Pin[A5] Pin[A6];
END PIN represents that an interface (PIN) definition finishes;
Two. extract the corresponding table of interface pin-splicing rule-submodule port in the splicing rule file of this kind of SRAM;
Obtain N altogether of minimum interface rules in the splicing rule file of this kind of SRAM;
The method that obtains the minimum interface rules in the splicing rule file of this kind of SRAM, comprises the following steps:
(1) extract whole splicings rules in the splicing rule file of this kind of SRAM and whole submodules, the SRAM of for example above-mentioned example be splicing rule file whole submodules comprise interface A(Pin A) under whole submodule HXP24_M8, HYP12_M8, HYP24XR_M8, HXP38_M32, HYP12_M32, HYP24XR_M32 and interface B(Pin B) whole submodules;
Extract the lower submodule set of each of each interface splicing rule of the splicing rule file of this kind of SRAM, the interface A(Pin A of the splicing rule file of the SRAM of for example above-mentioned example) the submodule set $ Rule of each splicing under regular be:
$Rule{NW(Z)_Mux(8)_NB(Z)_WordLine(0_4)}={HXP24_M8,HYP12_M8,HYP24XR_M8}
$Rule{NW(Z)_Mux(16)_NB(Z)_WordLine(5_8)}={HXP38_M32(4_6),HYP12_M32(2_3),HYP24XR_M32(0_1)}
(2) if regular need of splicing satisfy condition by the need of another splicing rule satisfy condition comprise and both corresponding submodules splicing rules identical, from whole splicing rules of the splicing rule file of this kind of SRAM, remove this involved splicing rule, finally obtain the minimum interface rules in the splicing rule file of this kind of SRAM;
The corresponding submodule splicing of minimum interface rules rule in the splicing rule file of this kind of SRAM, can comprise the whole submodules in the splicing rule file of this kind of SRAM, and quantity whole splicing rules of the splicing rule file of this kind of SRAM greatly reduce;
For example: the minimum interface rules in the splicing rule file of the SRAM of above-mentioned example has two:
NW(Z)_Mux(8)_NB(Z)_WordLine(0_4)
NW(Z)_Mux(16)_NB(Z)_WordLine(5_8)；
The corresponding table of interface pin-splicing rule-submodule port is as shown in the table:
Three. according to the N in the splicing rule file of this kind of SRAM minimum interface rules, estimate simulation splicing and generate N SRAM layout data; Extract the aerial information of each interface pin of described N SRAM layout data;
For example: the minimum interface rules finally obtaining according to the splicing rule file of the SRAM of above-mentioned example, designer just can estimate the following SRAM layout data of simulation splicing:
SRAM1:NW=32NB=4MUX=8
SRAM2:NW=128NB=32MUX=16
Use Memory Compiler (storer compiler) to generate this SRAM1 and SRAM2, and carry out antenna (Antenna) information extraction, aerial information form is similar as follows, and each interface pin is corresponding to corresponding aerial information:
PIN?A[5]
#DIRECTION?INPUT;
ANTENNAPARTIALMETALSIDEAREA?6.22?LAYER?met1;
ANTENNAPARTIALMETALSIDEAREA?0.72?LAYER?met2;
ANTENNADIFFAREA?1.00?LAYER?met1;
ANTENNADIFFAREA?1.00?LAYER?met2;
ANTENNAPARTIALCUTAREA?0.04?LAYER?via;
ANTENNAGATEAREA?0.27?LAYER?met1;
ANTENNAGATEAREA?0.27?LAYER?met2;
END?A[5]
PIN?A[4]
#DIRECTION?INPUT;
ANTENNAPARTIALMETALSIDEAREA?23.44?LAYER?met1;
ANTENNAPARTIALMETALSIDEAREA?0.72?LAYER?met2;
ANTENNADIFFAREA?1.00?LAYER?met1;
ANTENNADIFFAREA?1.00?LAYER?met2;
ANTENNAPARTIALCUTAREA?0.04?LAYER?via;
ANTENNAGATEAREA?0.27?LAYER?met2;
ANTENNAGATEAREA?0.27?LAYER?met1;
END?A[4]
Four. the corresponding table of interface pin-splicing rule-submodule port of the splicing rule file of this SRAM extracting according to step 2, and the aerial information of each interface pin of described N SRAM layout data, corresponding the showing of interface pin-splicing rule-submodule port-aerial information that obtains the splicing rule file of this SRAM;
Five. according to the parameter byte degree of depth, multiplexing way, the bitline width of user's input, the splicing rule that inquiry matches from the corresponding table of described interface pin-splicing rule-submodule port-aerial information, according to the corresponding interface pin of splicing rule, the aerial information that match, generate under this parameter the aerial information file corresponding to the splicing rule file of this kind of SRAM, the data item of aerial information file comprises interface pin, aerial information.
Be mainly the byte degree of depth (Word depth), multiplexing way (mux) because affect the parameter of SRAM, bitline width (Number of Bit), the submodule of composition SRAM address wire interface (Pin) is also different, but these submodules can be from same set.Address wire interface in a SRAM (Pin A) is as shown in Figure 4, Figure 5:
In the time that the byte degree of depth in the required SRAM parameter of user is less than or equal to <=4 and multiplexing way (mux) and is 8 with the ratio (Word depth/Mux) of multiplexing way, address wire interface A(Pin A in this SRAM) formed by submodules such as HXP24_M8, HYP12_M8, HYP24XR_M8;
When the byte degree of depth in the required SRAM parameter of user is more than or equal to 5 and be less than or equal to 8 with the ratio (Word depth/Mux) of multiplexing way, and when Mux=16, address wire interface A(Pin A in this SRAM) formed by submodules such as HXP38_M32, HYP24_M32, HYP24XR_M32;
And address wire interface A(Pin A) antenna (Antenna) information just decided by these submodules.
The generation method of SRAM aerial information file of the present invention, by SRAM splicing rule file is carried out to statistical simulation, obtain obtaining the minimum splicing principle combinations of all submodule information of SRAM, then estimate simulation splicing according to minimum splicing rule and generate a few SRAM layout data, extract the aerial information of each interface pin of this few SRAM layout data, obtain the corresponding table of interface pin-splicing rule-submodule port-aerial information of the splicing rule file of this SRAM of this extraction.User is mated with regard to the coupling splicing rule in the corresponding table of same interface pin-splicing rule-submodule port-aerial information after input SRAM parameter information, according to the corresponding interface pin of splicing rule, the aerial information that match, generate under this parameter the aerial information file corresponding to the splicing rule file of this kind of SRAM.
The generation method of SRAM aerial information file of the present invention, only need in the time that SRAM designs, estimate big or small SRAM to minority and carry out the extraction of aerial information file (Antenna Lef), obtain corresponding data, after this in the time of the SRAM of the specific size of customization, by setting corresponding parameter, can mate by the coupling splicing rule in the corresponding table of same interface pin-splicing rule-submodule port-aerial information, find out the SRAM of the specific size of this customization each corresponding interface aerial information and generate corresponding aerial information file (Antenna Lef), without the extraction of again SRAM layout data being carried out aerial information file (Antenna Lef), greatly reduce the time of SRAM layout data generates the SRAM of specific size afterwards aerial information file (Antenna Lef) in compiling, client does not need the aerial information file (Antenna Lef) of the SRAM that uses professional tool yet can obtain into specific size.
The foregoing is only preferred embodiment of the present invention, in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of making, be equal to replacement, improvement etc., within all should being included in the scope of protection of the invention.
Claims (2)
1. a generation method for SRAM aerial information file, is characterized in that, comprises the following steps:
One. generate the splicing rule file of a kind of SRAM;
Described splicing rule file comprises one or more interfaces;
Each interface is corresponding to one or more interface rules;
Every interface rules, it need satisfy condition and comprise the byte degree of depth, multiplexing way, bitline width, word line length scope; Word line length scope, for the byte degree of depth should be satisfied divided by multiplexing way scope;
Every interface rules, corresponding to a strip module splicing rule;
Every strip module splicing is regular, comprises the identification code of one or more submodules;
The identification code of each submodule, corresponding to one or more stitch number of this interface;
Two. extract the corresponding table of interface pin-splicing rule-submodule port in the splicing rule file of this kind of SRAM;
Obtain N altogether of minimum interface rules in the splicing rule file of this kind of SRAM;
Three. according to the N in the splicing rule file of this kind of SRAM minimum interface rules, estimate simulation splicing and generate N SRAM layout data; Extract the aerial information of each interface pin of described N SRAM layout data;
Four. the corresponding table of interface pin-splicing rule-submodule port of the splicing rule file of this SRAM extracting according to step 2, and the aerial information of each interface pin of described N SRAM layout data, corresponding the showing of interface pin-splicing rule-submodule port-aerial information that obtains the splicing rule file of this SRAM;
Five. according to the parameter byte degree of depth, multiplexing way, the bitline width of user's input, the splicing rule that inquiry matches from the corresponding table of described interface pin-splicing rule-submodule port-aerial information, according to the corresponding interface pin of splicing rule, the aerial information that match, generate under this parameter the aerial information file corresponding to the splicing rule file of this kind of SRAM, the data item of aerial information file comprises interface pin, aerial information.
2. the generation method of SRAM aerial information file according to claim 1, is characterized in that,
The method that obtains the minimum interface rules in the splicing rule file of this kind of SRAM, comprises the following steps:
(1) extract whole splicings rules in the splicing rule file of this kind of SRAM and whole submodules;
Extract each submodule set of splicing under rule of each interface of the splicing rule file of this kind of SRAM;
(2) if regular need of splicing satisfy condition by the need of another splicing rule satisfy condition comprise and both corresponding submodules splicing rules identical, from whole splicing rules of the splicing rule file of SRAM, remove this involved splicing rule, finally obtain the minimum interface rules in the splicing rule file of this kind of SRAM.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106874543A (en) * | 2017-01-04 | 2017-06-20 | 上海华虹宏力半导体制造有限公司 | The LEF graphic processing methods of domain |
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| CN101197009A (en) * | 2006-12-07 | 2008-06-11 | 株式会社半导体能源研究所 | Semiconductor device |
| CN101610472A (en) * | 2009-04-16 | 2009-12-23 | 成都众山科技有限公司 | A kind of SMS universal data transmission equipment |
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|---|---|---|---|---|
| US5450344A (en) * | 1994-04-22 | 1995-09-12 | Trimble Navigation Limited | GPS receivers with data ports for the uploading and downloading of absolute position information |
| CN101197009A (en) * | 2006-12-07 | 2008-06-11 | 株式会社半导体能源研究所 | Semiconductor device |
| CN101610472A (en) * | 2009-04-16 | 2009-12-23 | 成都众山科技有限公司 | A kind of SMS universal data transmission equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106874543A (en) * | 2017-01-04 | 2017-06-20 | 上海华虹宏力半导体制造有限公司 | The LEF graphic processing methods of domain |
| CN106874543B (en) * | 2017-01-04 | 2020-06-09 | 上海华虹宏力半导体制造有限公司 | LEF graph processing method of layout |
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